db3f88f3af
- move IRQ control to main code (only the main code knows exactly which combination of pins is used for com2) - split one big module into multiple smaller files (easier to maintain)
66 lines
2.1 KiB
NASM
66 lines
2.1 KiB
NASM
; ***************************************************************************
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; copyright : (C) 2026 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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#ifndef AVR_MODULES_COM2W2_MSGWRITE_H
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#define AVR_MODULES_COM2W2_MSGWRITE_H
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.cseg
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; ---------------------------------------------------------------------------
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; @routine com2w2SendMsg
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;
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; @param X pointer to bytes to send
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; @param Y pointer to interface data in SRAM
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; @return CFLAG set if message sent, cleared otherwise
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; @clobbers R16, R18 (R20, R22, R24, R25, X)
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com2w2SendMsg:
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ldi r20, 6 ; wait for about 60us for clock low
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rcall com2w2WaitForClockLowMulti10Us ; (R16, R20, R22)
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brcs com2w2SendMsg_busy ; CLK got low while waiting, so line is busy
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push r15
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in r15, SREG
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cli ; atomic disable irq and set CLK low
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rcall com2w2DisableClkIrq ; (none)
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rcall com2w2ClkSetLow ; reserve bus (none)
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out SREG, r15
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pop r15
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adiw xh:xl, NETMSG_OFFS_MSGLEN
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ld r18, X
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sbiw xh:xl, NETMSG_OFFS_MSGLEN
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inc r18 ; adjust for DESTADDR
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inc r18 ; adjust for MSGLEN
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inc r18 ; adjust for CRCBYTE
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rcall com2w2WaitTime1 ; longer wait period (R22)
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rcall com2w2SendBytes ; (r16, r17, r18, r22, X)
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rcall com2w2ClkSetHigh ; make sure bus is released
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rcall com2w2DataSetHigh
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rcall com2w2EnableClkIrq ; (none)
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ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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sec
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ret
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com2w2SendMsg_busy:
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ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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clc
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ret
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; @end
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#endif
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