132 lines
2.8 KiB
NASM
132 lines
2.8 KiB
NASM
; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; ***************************************************************************
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; macros
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; @param @0 register to use
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; ***************************************************************************
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; defines
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; ***************************************************************************
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; data
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.dseg
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; ***************************************************************************
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; code
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.cseg
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; ---------------------------------------------------------------------------
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; @routine SPISW_Init @global
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;
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SPISW_Init:
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPISW_MasterStart @global
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;
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; Start SPI software master.
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; @clobbers none
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SPISW_MasterStart:
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; setup pins
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sbi SPISW_MOSI_DDR, SPISW_MOSI_PIN ; MOSI: output
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cbi SPISW_MISO_DDR, SPISW_MISO_PIN ; MISO: input
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sbi SPISW_SCK_DDR, SPISW_SCK_PIN ; SCK: output
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cbi SPISW_SCK_OUTPUT, SPISW_SCK_PIN ; clock low
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPISW_MasterStop @global
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;
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; Stop SPI software master. Put all ports to high-Z mode.
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; @clobbers none
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SPISW_MasterStop:
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; setup pins
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cbi SPISW_MOSI_DDR, SPISW_MOSI_PIN ; MOSI: input
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cbi SPISW_MOSI_OUTPUT, SPISW_MOSI_PIN ; disable pullup
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cbi SPISW_MISO_DDR, SPISW_MISO_PIN ; MISO: input
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cbi SPISW_MISO_OUTPUT, SPISW_MISO_PIN ; disable pullup
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cbi SPISW_SCK_DDR, SPISW_SCK_PIN ; SCK: input
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cbi SPISW_SCK_OUTPUT, SPISW_SCK_PIN ; disable pullup
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPIHW_MasterExchangeByteMode0 @global
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;
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; @param r16 byte to send
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; @return r16 byte received
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; @clobbers r17, r18, r19, r23
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SPISW_MasterExchangeByteMode0:
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push r15
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inr r15, SREG
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cli
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ldi r23, 8
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SPISW_MasterExchangeByteMode0_loop:
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; clock low
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cbi SPISW_SCK_OUTPUT, SPISW_SCK_PIN
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nop
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; write MOSI
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sbrs r16, 7
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cbi SPISW_MOSI_OUTPUT, SPISW_MOSI_PIN
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sbrc r16, 7
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sbi SPISW_MOSI_OUTPUT, SPISW_MOSI_PIN
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nop
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lsl r16
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; clock high
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sbi SPISW_SCK_OUTPUT, SPISW_SCK_PIN
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nop
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; read MISO
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lsl r17
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sbic SPISW_MISO_INPUT, SPISW_MISO_PIN
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inc r17
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dec r23
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brne SPISW_MasterExchangeByteMode0_loop
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mov r16, r17
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outr SREG, r15
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pop r15
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ret
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; @end
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