219 lines
5.1 KiB
NASM
219 lines
5.1 KiB
NASM
; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; ***************************************************************************
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; macros
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; @param @0 register to use
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.macro M_SPIHW_MASTER_SEND_BYTE
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outr SPDR, @0 ; masterSend Byte
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l1_%:
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inr @0, SPSR
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sbrs @0, SPIF
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rjmp l1_%
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inr @0, SPDR
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.endm
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; ***************************************************************************
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; defines
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.equ SPIHW_MODE_SPEED0_BIT = 0 ; 00=CLK/4, 01=CLK/16
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.equ SPIHW_MODE_SPEED1_BIT = 1 ; 10=CLK/64, 11=CLK/128
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.equ SPIHW_MODE_DOUBLESPEED_BIT = 2 ; 1=double speed from SPIHW_MODE_SPEED0/1_BIT
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.equ SPIHW_MODE_DATAORDER_BIT = 3 ; 1=LSB first, 0=MSB first
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.equ SPIHW_MODE_CPOL_BIT = 4 ; 0=leading edge rising/trailing edge falling
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.equ SPIHW_MODE_CPHA_BIT = 5 ; 0=sample on leading edge, setup on trailing edge
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; ***************************************************************************
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; data
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.dseg
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; ***************************************************************************
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; code
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.cseg
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; ---------------------------------------------------------------------------
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; @routine SPIHW_Init @global
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;
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SPIHW_Init:
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sbi SPIHW_SS0_DDR, SPIHW_SS0_PIN ; SS0= output
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sbi SPIHW_SS1_DDR, SPIHW_SS1_PIN ; SS1= output
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sbi SPIHW_SS2_DDR, SPIHW_SS2_PIN ; SS2= output
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPIHW_Fini @global
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;
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SPIHW_Fini:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPIHW_MasterStart @global
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;
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; Start SPI hardware master with the given mode (see @ref SPIHW_MODE_SPEED0_BIT
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; and others).
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; @param r16 mode
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; @param r17 device num (0-7)
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; @clobbers r17
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SPIHW_MasterStart:
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; setup pins
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sbi SPIHW_SS_DDR, SPIHW_SS_PIN ; SS : output
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sbi SPIHW_MOSI_DDR, SPIHW_MOSI_PIN ; MOSI: output
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cbi SPIHW_MISO_DDR, SPIHW_MISO_PIN ; MISO: input
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sbi SPIHW_SCK_DDR, SPIHW_SCK_PIN ; SCK: output
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; select device
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sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN ; SS high
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rcall spiHwSelectDevice ; (none)
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; cbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN ; SS low
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; setup SPCR
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clr r17
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sbrc r16, SPIHW_MODE_DATAORDER_BIT
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sbr r17, (1<<DORD)
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sbrc r16, SPIHW_MODE_CPOL_BIT
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sbr r17, (1<<CPOL)
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sbrc r16, SPIHW_MODE_CPHA_BIT
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sbr r17, (1<<CPHA)
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sbrc r16, SPIHW_MODE_SPEED0_BIT
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sbr r17, (1<<SPR0)
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sbrc r16, SPIHW_MODE_SPEED1_BIT
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sbr r17, (1<<SPR1)
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sbr r17, (1<<SPE) | (1<<MSTR)
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outr SPCR, r17
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; setup SPSR
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clr r17
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sbrc r16, SPIHW_MODE_DOUBLESPEED_BIT
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sbr r17, (1<<SPI2X)
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outr SPSR, r17
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPIHW_MasterStop @global
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;
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; Stop SPI hardware master.
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; @clobbers r16
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SPIHW_MasterStop:
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; sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN ; SS high
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inr r16, SPCR
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cbr r16, (1<<SPE)
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outr SPCR, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine spiHwSelectDevice
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;
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; Select given device via SS0-SS2 pins
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;
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; @param r17=device
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; @clobbers none
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spiHwSelectDevice:
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cbi SPIHW_SS0_OUTPUT, SPIHW_SS0_PIN
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sbrc r17, 0
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sbi SPIHW_SS0_OUTPUT, SPIHW_SS0_PIN
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cbi SPIHW_SS1_OUTPUT, SPIHW_SS1_PIN
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sbrc r17, 1
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sbi SPIHW_SS1_OUTPUT, SPIHW_SS1_PIN
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cbi SPIHW_SS2_OUTPUT, SPIHW_SS2_PIN
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sbrc r17, 2
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sbi SPIHW_SS2_OUTPUT, SPIHW_SS2_PIN
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPIHW_MasterTransfer @global
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;
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; Complete transfer sending ony byte and receiving another.
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;
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; @param r16 byte to send
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; @param r16 byte received
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; @clobbers none
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SPIHW_MasterTransfer:
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rcall SPIHW_MasterSendByte ; (none)
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rjmp SPIHW_WaitForTransferComplete ; (none)
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPIHW_MasterSendByte @global
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;
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; Send a byte to the SPI interface. Does not wait for result, you need to
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; call @ref SPIHW_WaitForTransferComplete to complete the request and to
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; get the response.
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; This allows for transfers in background so that the caller can do other stuff
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; instead of idly waiting for the transfer to complete.
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; However, before calling this routine again you MUST call SPIHW_WaitForTransferComplete!
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; @param r16 byte to send
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; @clobbers none
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SPIHW_MasterSendByte:
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outr SPDR, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine SPIHW_WaitForTransferComplete @global
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;
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; Wait for a transfer to complete and return the byte received.
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;
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; @return r16 byte received
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; @clobbers none
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SPIHW_WaitForTransferComplete:
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inr r16, SPSR
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sbrs r16, SPIF
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rjmp SPIHW_WaitForTransferComplete
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inr r16, SPDR
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ret
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; @end
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