177 lines
4.7 KiB
NASM
177 lines
4.7 KiB
NASM
; ***************************************************************************
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; copyright : (C) 2024 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; ***************************************************************************
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; code
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.cseg
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OWIMASTER_BEGIN:
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; ---------------------------------------------------------------------------
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; @routine OwiMaster_Init @global
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;
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; @return CFLAG set if okay, clear on error
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OwiMaster_Init:
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cbi OWI_DDR, OWI_PINNUM ; set to input
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cbi OWI_PORTOUT, OWI_PINNUM ; disable internal pullup
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine OwiMaster_Reset @global
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;
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; Cave: Needs interrupts to be disabled!
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;
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; @return r16 0xff if slave presence signal received, 0x00 otherwise
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; @clobbers r22
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OwiMaster_Reset:
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; send RESET pulse (min. 480usec)
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sbi OWI_DDR, OWI_PINNUM ; set to output
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cbi OWI_PORTOUT, OWI_PINNUM ; set value to zero
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rcall Utils_WaitFor100MicroSecs ; wait for about 500 usecs
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rcall Utils_WaitFor100MicroSecs
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rcall Utils_WaitFor100MicroSecs
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rcall Utils_WaitFor100MicroSecs
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rcall Utils_WaitFor100MicroSecs
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cbi OWI_DDR, OWI_PINNUM ; set to input
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; if present slave pulls line low for 60 usecs (we check after 30 usecs)
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Utils_WaitNanoSecs 30000, 0, r22
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clr r16
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sbic OWI_PORTIN, OWI_PINNUM
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rjmp OwiMaster_Reset_done
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dec r16
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rcall owiWaitForDataState1ms ; wait for line pulled up
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OwiMaster_Reset_done:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine OwiMaster_SendByte @global
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; Cave: Needs interrupts to be disabled!
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;
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; @param r16 byte to send
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; @clobbers r16, r21, r22
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OwiMaster_SendByte:
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cbi OWI_DDR, OWI_PINNUM ; set to input
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cbi OWI_PORTOUT, OWI_PINNUM ; set value to zero
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ldi r21, 8
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OwiMaster_SendByte_loop:
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sbi OWI_DDR, OWI_PINNUM ; set to output
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lsr r16 ; bit to send -> CARRY
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brcs OwiMaster_SendByte_setHigh
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OwiMaster_SendByte_setLow:
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Utils_WaitNanoSecs 60000, 0, r22 ; set to low for 60 usecs ("0")
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cbi OWI_DDR, OWI_PINNUM ; set to output
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Utils_WaitNanoSecs 5000, 0, r22 ; set to low for 5 usecs ("1")
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rjmp OwiMaster_SendByte_loopEnd
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OwiMaster_SendByte_setHigh:
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Utils_WaitNanoSecs 5000, 0, r22 ; set to low for 5 usecs ("1")
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cbi OWI_DDR, OWI_PINNUM ; set to output
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Utils_WaitNanoSecs 60000, 0, r22 ; keep high for remainder of write slot
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OwiMaster_SendByte_loopEnd:
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dec r21
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brne OwiMaster_SendByte_loop
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine OwiMaster_RecvByte @global
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;
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; Receive a byte (slot size about 70 usecs)
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; Cave: Needs interrupts to be disabled!
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;
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; @return r16 byte received
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; @return CFLAG set if okay, cleared on error
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; @clobbers r17, r20, r21, r22
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OwiMaster_RecvByte:
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cbi OWI_DDR, OWI_PINNUM ; set to input
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cbi OWI_PORTOUT, OWI_PINNUM ; set value to zero
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clr r17
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ldi r20, 8
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OwiMaster_RecvByte_loop:
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sbi OWI_DDR, OWI_PINNUM ; set to output
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Utils_WaitNanoSecs 5000, 0, r22 ; set to low for 5 usecs ("1")
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cbi OWI_DDR, OWI_PINNUM ; set to input
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Utils_WaitNanoSecs 5000, 0, r22 ; wait for 5 usecs
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sec
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sbic OWI_PORTIN, OWI_PINNUM ; sample line
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rjmp OwiMaster_RecvByte_recv1
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Utils_WaitNanoSecs 55000, 0, r22
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clc ; shift-in ZERO
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rjmp OwiMaster_RecvByte_shiftIn
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OwiMaster_RecvByte_recv1:
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Utils_WaitNanoSecs 55000, 0, r22
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sec
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OwiMaster_RecvByte_shiftIn:
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ror r17
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Utils_WaitNanoSecs 5000, 0, r22 ; time between bits
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OwiMaster_RecvByte_loopEnd:
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dec r20
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brne OwiMaster_RecvByte_loop
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mov r16, r17
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sec
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ret
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OwiMaster_RecvByte_error:
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clc
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine owiWaitForDataState1ms
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;
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; @return CFLAG set if state reached, cleared otherwise
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; @param r16 state to wait for (00 for low, 0xff for high)
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; @clobbers r21, r22
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owiWaitForDataState1ms:
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ldi r21, 10
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owiWaitForDataState1ms_loop:
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in r22, OWI_PORTIN
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eor r22, r16
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andi r22, (1<<OWI_PINNUM)
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breq owiWaitForDataState1ms_stateReached
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nop
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nop
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nop
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dec r21
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brne owiWaitForDataState1ms_loop
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clc
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ret
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owiWaitForDataState1ms_stateReached:
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sec
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ret
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; @end
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OWIMASTER_END:
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.equ MODULE_SIZE_OWIMASTER = OWIMASTER_END-OWIMASTER_BEGIN
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