848 lines
22 KiB
NASM
848 lines
22 KiB
NASM
; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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#ifndef AVR_MODULES_UART_HW2_COMONUART0_H
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#define AVR_MODULES_UART_HW2_COMONUART0_H
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.dseg
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comOnUart0_iface: .byte UART_HW2_IFACE_SIZE
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.cseg
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_Init @global
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;
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; @clobbers R16, R17, Y (X)
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ComOnUart0_Init:
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rcall comOnUart0StopRx
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rcall comOnUart0StopTx
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall NET_Interface_Init ; (R16, R17, X)
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ldi r16, 0xff
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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ldi r16, UART_HW2_MODE_IDLE
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std Y+UART_HW2_IFACE_OFFS_MODE, r16
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clr r16
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std Y+NET_IFACE_OFFS_IFACENUM, r16
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rcall comOnUart0SetAttnInput
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sbi COM_IRQ_ADDR_ATTN0, COM_IRQ_BIT_ATTN0 ; enable pin change irq for ATTN line
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inr r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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sbr r16, (1<<COM_IRQ_GIMSK_ATTN0)
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outr GIMSK, r16
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ldi r16, (1<<COM_IRQ_GIFR_ATTN0) ; clear pending irq by writing 1 to ATTN bit
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outr GIFR, r16
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; set baudrate
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.if clock == 8000000
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ldi r16, 25 ; (19.2Kb/s at 8MHz)
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ldi r17, 0
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.endif
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.if clock == 1000000
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ldi r16, 2 ; (19.2Kb/s at 1MHz)
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ldi r17, 0
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.endif
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outr UBRR0H, r17
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outr UBRR0L, r16
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; set character format
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ldi r16, (1<<USBS0)|(3<<UCSZ00)
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outr UCSR0C, r16
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_Periodically @global
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;
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; @clobbers R16, Y
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ComOnUart0_Periodically:
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push r15
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in r15, SREG
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cli
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall NET_Interface_Periodically
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODECOUNTER
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inc r16
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breq ComOnUart0_Periodically_end
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std Y+UART_HW2_IFACE_OFFS_MODECOUNTER, r16
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ComOnUart0_Periodically_end:
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out SREG, r15
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pop r15
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0SetMode
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;
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; @param R16 mode
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; @clobbers R17
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comOnUart0SetMode:
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push r15
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in r15, SREG
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cli
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ldd r17, Y+UART_HW2_IFACE_OFFS_MODE
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cp r16, r17
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breq comOnUart0SetMode_end
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std Y+UART_HW2_IFACE_OFFS_MODE, r16
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clr r17
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std Y+UART_HW2_IFACE_OFFS_MODECOUNTER, r17
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comOnUart0SetMode_end:
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out SREG, r15
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pop r15
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0StartReading
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, X
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comOnUart0StartReading:
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mov xl, yl
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mov xh, yh
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adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
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ldi r16, UART_HW2_BUFFER_SIZE-1
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std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r16
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clr r16
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std Y+UART_HW2_IFACE_OFFS_BUFUSED, r16
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ldi r16, UART_HW2_MODE_READING
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rcall comOnUart0SetMode ; (R17)
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rcall comOnUart0StartRx ; should be the last call here
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0StartWriting
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;
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; @param Y pointer to interface data in SRAM
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; @param R16 buffer number
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; @return CFLAG set if writing started, cleared otherwise
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; @clobbers R16, R17, X, Z (R22, R24, R25)
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comOnUart0StartWriting:
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push r15
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inr r15, SREG
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cli
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rcall comOnUart0StartWriting_noIrq
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brcc comOnUart0StartWriting_clc
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outr SREG, r15
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pop r15
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sec
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ret
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comOnUart0StartWriting_clc:
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outr SREG, r15
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pop r15
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clc
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ret
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comOnUart0StartWriting_noIrq:
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rcall comOnUart0AcquireAttn ; (R22)
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brcc comOnUart0StartWriting_ebusy
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; copy buffer
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rcall NET_Buffer_Locate ; (R17)
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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adiw xh:xl, NETMSG_OFFS_MSGLEN+1
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ld r17, X
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sbiw xh:xl, NETMSG_OFFS_MSGLEN+1
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subi r17, -3 ; add dest addr, msglen, crc
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; TODO: check size!
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std Y+UART_HW2_IFACE_OFFS_BUFUSED, r17
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std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
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; copy into IFACE buffer
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mov zl, yl
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mov zh, yh
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adiw zh:zl, UART_HW2_IFACE_OFFS_BUFFER ; dest
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, zl
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, zh
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adiw xh:xl, 1 ; src (skip buffer header)
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comOnUart0StartWriting_loop:
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ld r16, X+
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st Z+, r16
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dec r17
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brne comOnUart0StartWriting_loop
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ldi r16, UART_HW2_MODE_WRITING
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rcall comOnUart0SetMode ; (R17)
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rcall comOnUart0StartTx ; should be the last call here (R16)
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sec
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rjmp comOnUart0StartWriting_end
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comOnUart0StartWriting_ebusy:
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ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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clc
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comOnUart0StartWriting_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ComOnUart0_Run @global
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;
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; @clobbers all
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ComOnUart0_Run:
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
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ComOnUart0_Run_loop:
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push r16 ; current state
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rcall comOnUart0RunMode ; (all but Y)
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pop r17 ; previous state (pop from r16 into r17)
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; read new state
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
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cp r16, r17
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brne ComOnUart0_Run_loop ; state changed, run again
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunMode
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;
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; @clobbers all
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comOnUart0RunMode:
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cpi r16, UART_HW2_MODE_NUM
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brcs ComOnUart0_Run_jump
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ldi r16, UART_HW2_MODE_IDLE ; unknown mode, set to idle
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rcall comOnUart0SetMode ; (R17)
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ret
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ComOnUart0_Run_jump:
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ldi zl, LOW(comOnUart0ModeJumpTable)
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ldi zh, HIGH(comOnUart0ModeJumpTable)
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add zl, r16
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adc zh, r16
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sub zh, r16
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ijmp
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comOnUart0ModeJumpTable:
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rjmp comOnUart0RunIdle
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rjmp comOnUart0RunReading
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rjmp comOnUart0RunSkipping
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rjmp comOnUart0RunMsgReceived
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rjmp comOnUart0RunWriting
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rjmp comOnUart0RunWaitBufferEmpty
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rjmp comOnUart0RunMsgSent
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunIdle
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, R24, R25, X, Z
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comOnUart0RunIdle:
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; look for outbound message
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rcall NET_Interface_PeekNextOutgoingMsgNum ; r16=msgNum
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brcc comOnUart0RunIdle_end ; no outmsg in queue
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rcall comOnUart0StartWriting ; (R16, R17, R22, R24, R25, X, Z)
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brcc comOnUart0RunIdle_end
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rcall NET_Interface_GetNextOutgoingMsgNum ; take current msg off the queue
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comOnUart0RunIdle_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunReading
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers none
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comOnUart0RunReading:
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; TODO: check for timeout
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunSkipping
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16 (R17)
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comOnUart0RunSkipping:
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rcall comOnUart0IsAttnLow ; (none)
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brcs comOnUart0RunSkipping_end ; still low
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ldi r16, UART_HW2_MODE_IDLE ; is high now, leave skipping mode
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rcall comOnUart0SetMode ; (R17)
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comOnUart0RunSkipping_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunMsgReceived
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, R18, X, Z (R19, R20, R24, R25)
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comOnUart0RunMsgReceived:
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mov xl, yl
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mov xh, yh
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adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
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mov zl, xl ; Z=buffer in IFACE
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mov zh, xh
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rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
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brcc comOnUart0RunMsgReceived_econtent
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; msg valid, alloc buffer
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rcall NET_Buffer_Alloc ; X=buffer, R16=bufnum (R16, R17, X)
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brcc comOnUart0RunMsgReceived_enobuf
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mov r18, r16 ; buffer num
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rcall NET_Interface_SetIfaceNumInBuffer ; (R16, R17)
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adiw xh:xl, 1 ; skip buffer header
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ldd r17, Y+UART_HW2_IFACE_OFFS_BUFUSED ; always is at least 2 here
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comOnUart0RunMsgReceived_copyLoop:
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ld r16, Z+
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st X+, r16
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dec r17
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brne comOnUart0RunMsgReceived_copyLoop
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mov r16, r18 ; buffer num
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rcall NET_AddIncomingMsgNum ; (R17, R18, X)
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brcc comOnUart0RunMsgReceived_enoadd
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ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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rjmp comOnUart0RunMsgReceived_setIdleAndEnd
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comOnUart0RunMsgReceived_enoadd:
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rcall NET_Buffer_ReleaseByNum
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rjmp comOnUart0RunMsgReceived_enobuf
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comOnUart0RunMsgReceived_enobuf:
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ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
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rjmp comOnUart0RunMsgReceived_err
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comOnUart0RunMsgReceived_econtent:
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ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
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comOnUart0RunMsgReceived_err:
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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comOnUart0RunMsgReceived_setIdleAndEnd:
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ldi r16, UART_HW2_MODE_IDLE
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rcall comOnUart0SetMode ; (R17)
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comOnUart0RunMsgReceived_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWriting
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers none
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comOnUart0RunWriting:
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; TODO: check for timeout
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWaitBufferEmpty
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;
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; @clobbers none
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comOnUart0RunWaitBufferEmpty:
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; TODO: check for timeout etc.
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0RunWriting
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16 (R17, R22, R24, R25, X)
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comOnUart0RunMsgSent:
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ldd r16, Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM
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rcall NET_Buffer_ReleaseByNum ; (R16, X)
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ldi r16, 0xff
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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ldi r16, UART_HW2_MODE_IDLE
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rcall comOnUart0SetMode ; (R17)
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rcall comOnUart0SetAttnInput ; release ATTN (none)
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rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least high for a short period (R22)
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0AcquireAttn
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;
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; Set ATTN low only if it is high.
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; @return CFLAG set if ATTN acquired (including waiting time), cleared otherwise
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;
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; @clobbers R22
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comOnUart0AcquireAttn:
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rcall comOnUart0IsAttnLow ; (none)
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brcc comOnUart0AcquireAttn_isHigh
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clc
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rjmp comOnUart0AcquireAttn_end
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comOnUart0AcquireAttn_isHigh:
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; set ATTN low
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rcall comOnUart0SetAttnLow ; (none)
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Utils_WaitNanoSecs COM_BIT_LENGTH, 0, r22 ; wait for one bit duration
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Utils_WaitNanoSecs COM_BIT_LENGTH, 0, r22 ; wait for one bit duration
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sec
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comOnUart0AcquireAttn_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0StartRx
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;
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; @clobbers R16
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comOnUart0StartRx:
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inr r16, UCSR0B
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sbr r16, (1<<RXCIE0) | (1<<RXEN0) ; enable RX complete interrupt, enable receive
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outr UCSR0B, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0StopRx
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;
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; @clobbers R16
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comOnUart0StopRx:
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inr r16, UCSR0B
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cbr r16, (1<<RXCIE0 | (1<<RXEN0)) ; disable RX complete interrupt, disable receive
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outr UCSR0B, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0StartTx
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;
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; @clobbers R16
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comOnUart0StartTx:
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inr r16, UCSR0A
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cbr r16, (1<<TXC0) ; clear TXCn interrupt
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outr UCSR0A, r16
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inr r16, UCSR0B
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sbr r16, (1<<UDRIE0) | (1<<TXCIE0) | (1<<TXEN0) ; enable TX UDRE and TXC0 interrupt, enable transceive
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outr UCSR0B, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0StopTx
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;
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; @clobbers R16
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comOnUart0StopTx:
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inr r16, UCSR0B
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cbr r16, (1<<UDRIE0) | (1<<TXCIE0) | (1<<TXEN0) ; disable TX UDRE and TXC0 interrupt, enable transceive
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outr UCSR0B, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0SetAttnInput
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;
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; Set ATTN line as input (making it effectively HIGH due to pull-up resistor on
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; the line)
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;
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; @clobbers none
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comOnUart0SetAttnInput:
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cbi COM_ATTN0_DDR, COM_ATTN0_PIN ; set ATTN as input
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.ifdef COM_ATTN0_PUE
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; cbi COM_ATTN0_PUE, COM_ATTN_PIN ; disable pullup on ATTN
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.else
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cbi COM_ATTN0_OUTPUT, COM_ATTN0_PIN ; disable pullup on ATTN
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.endif
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0SetAttnLow
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;
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; Set ATTN line low.
|
|
;
|
|
; @clobbers none
|
|
|
|
comOnUart0SetAttnLow:
|
|
sbi COM_ATTN0_DDR, COM_ATTN0_PIN ; set ATTN as output
|
|
cbi COM_ATTN0_OUTPUT, COM_ATTN0_PIN ; set ATTN low
|
|
ret
|
|
; @end
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine comOnUart0IsAttnLow
|
|
;
|
|
; Check whether ATTN is low
|
|
;
|
|
; @return CFLAG set if ATTN1 is low
|
|
; @clobbers none
|
|
|
|
comOnUart0IsAttnLow:
|
|
clc
|
|
sbis COM_ATTN0_INPUT, COM_ATTN0_PIN ; ATTN high?
|
|
sec ; no
|
|
ret
|
|
; @end
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine ComOnUart0_RxCharIsr @global @isr
|
|
;
|
|
; @clobbers none
|
|
|
|
ComOnUart0_RxCharIsr:
|
|
push r15
|
|
in r15, SREG
|
|
push r16
|
|
push r17
|
|
push r18
|
|
push r24
|
|
push r25
|
|
push xl
|
|
push xh
|
|
push yl
|
|
push yh
|
|
ldi yl, LOW(comOnUart0_iface)
|
|
ldi yh, HIGH(comOnUart0_iface)
|
|
rcall comOnUart0RxCharIsr ; (R16, R17, R18, R24, R25, X)
|
|
pop yh
|
|
pop yl
|
|
pop xh
|
|
pop xl
|
|
pop r25
|
|
pop r24
|
|
pop r18
|
|
pop r17
|
|
pop r16
|
|
out SREG, r15
|
|
pop r15
|
|
reti
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine ComOnUart0_TxUdreIsr @global @isr
|
|
;
|
|
; @clobbers none
|
|
|
|
ComOnUart0_TxUdreIsr:
|
|
push r15
|
|
in r15, SREG
|
|
push r16
|
|
push r17
|
|
push xl
|
|
push xh
|
|
push yl
|
|
push yh
|
|
ldi yl, LOW(comOnUart0_iface)
|
|
ldi yh, HIGH(comOnUart0_iface)
|
|
rcall comOnUart0TxUdreIsr ; (R16, R17, X)
|
|
pop yh
|
|
pop yl
|
|
pop xh
|
|
pop xl
|
|
pop r17
|
|
pop r16
|
|
out SREG, r15
|
|
pop r15
|
|
reti
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine ComOnUart0_TxCharIsr @global @isr
|
|
;
|
|
; @clobbers none
|
|
|
|
ComOnUart0_TxCharIsr:
|
|
push r15
|
|
in r15, SREG
|
|
push r16
|
|
push r17
|
|
push yl
|
|
push yh
|
|
ldi yl, LOW(comOnUart0_iface)
|
|
ldi yh, HIGH(comOnUart0_iface)
|
|
rcall comOnUart0TxCharIsr ; (R16, R17)
|
|
pop yh
|
|
pop yl
|
|
pop r17
|
|
pop r16
|
|
out SREG, r15
|
|
pop r15
|
|
reti
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine ComOnUart0AttnChangeIsr @global @isr
|
|
;
|
|
; @clobbers none
|
|
|
|
|
|
ComOnUart0_AttnChangeIsr:
|
|
push r15
|
|
in r15, SREG
|
|
rcall ComOnUart0_HandleAttnChange
|
|
out SREG, r15
|
|
pop r15
|
|
reti
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine ComOnUart0_HandleAttnChange @global
|
|
;
|
|
; @clobbers none
|
|
|
|
ComOnUart0_HandleAttnChange:
|
|
push r16
|
|
push r17
|
|
push xl
|
|
push xh
|
|
push yl
|
|
push yh
|
|
ldi yl, LOW(comOnUart0_iface)
|
|
ldi yh, HIGH(comOnUart0_iface)
|
|
rcall comOnUart0ActOnAttn ; (R16, R17, X)
|
|
pop yh
|
|
pop yl
|
|
pop xh
|
|
pop xl
|
|
pop r17
|
|
pop r16
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine comOnUart0ActOnAttn @global
|
|
;
|
|
; @param Y pointer to interface data in SRAM
|
|
; @clobbers R16 (R17, X)
|
|
|
|
comOnUart0ActOnAttn:
|
|
ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
|
|
rcall comOnUart0IsAttnLow ; (none)
|
|
brcc comOnUart0ActOnAttn_attnHigh
|
|
; ATTN low
|
|
cpi r16, UART_HW2_MODE_IDLE
|
|
brne comOnUart0ActOnAttn_end ; not idle
|
|
rcall comOnUart0StartReading ; (R16, R17, X)
|
|
rjmp comOnUart0ActOnAttn_end
|
|
; ATTN high
|
|
comOnUart0ActOnAttn_attnHigh:
|
|
cpi r16, UART_HW2_MODE_SKIPPING
|
|
brne comOnUart0ActOnAttn_end
|
|
ldi r16, UART_HW2_MODE_IDLE ; leave skipping mode
|
|
rcall comOnUart0SetMode ; (R17)
|
|
comOnUart0ActOnAttn_end:
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine comOnUart0RxCharIsr @global
|
|
;
|
|
; @param Y pointer to interface data in SRAM
|
|
; @clobbers R16, R17, R18, R24, R25, X
|
|
|
|
comOnUart0RxCharIsr:
|
|
; check for errors
|
|
inr r16, UCSR0A ; check for errors
|
|
andi r16, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
|
|
brne comOnUart0RxCharIsr_hwerr
|
|
|
|
inr r16, UCSR0A ; read status: data available?
|
|
sbrs r16, RXC0
|
|
rjmp comOnUart0RxCharIsr_end ; jmp if no data
|
|
inr r16, UDR0 ; r16=received char
|
|
; check mode
|
|
ldd r17, Y+UART_HW2_IFACE_OFFS_MODE
|
|
cpi r17, UART_HW2_MODE_READING
|
|
brne comOnUart0RxCharIsr_overrun
|
|
; store char
|
|
ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
|
|
ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
|
|
st X+, r16 ; last byte written
|
|
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
|
|
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
|
|
; handle counters
|
|
ldd r18, Y+UART_HW2_IFACE_OFFS_BUFUSED
|
|
inc r18
|
|
std Y+UART_HW2_IFACE_OFFS_BUFUSED, r18
|
|
ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
|
|
dec r17
|
|
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
|
|
breq comOnUart0RxCharIsr_complete
|
|
; check msg size
|
|
cpi r18, 2
|
|
brne comOnUart0RxCharIsr_end
|
|
; determine msg size
|
|
inc r16 ; last byte was payload length, add byte for crc
|
|
cp r16, r17 ; compare remaining length against remaining space
|
|
brcc comOnUart0RxCharIsr_emsgsize ; msg too long
|
|
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r16 ; set new number of bytes left
|
|
tst r16
|
|
brne comOnUart0RxCharIsr_end ; jmp if still bytes left to receive
|
|
comOnUart0RxCharIsr_complete:
|
|
rcall comOnUart0StopRx
|
|
ldi r16, UART_HW2_MODE_MSGRECEIVED
|
|
rcall comOnUart0SetMode ; (R17)
|
|
rjmp comOnUart0RxCharIsr_end
|
|
comOnUart0RxCharIsr_hwerr:
|
|
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
|
|
rjmp comOnUart0RxCharIsr_err
|
|
comOnUart0RxCharIsr_overrun:
|
|
ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
|
|
rjmp comOnUart0RxCharIsr_err
|
|
comOnUart0RxCharIsr_emsgsize:
|
|
ldi r16, NET_IFACE_OFFS_ERR_MSGSIZE_LOW
|
|
comOnUart0RxCharIsr_err:
|
|
rcall NET_Interface_IncCounter16 ; (R24, R25)
|
|
rcall comOnUart0StopRx ; (R16)
|
|
ldi r16, UART_HW2_MODE_SKIPPING ; skipping mode is left after ATTN becomes high again
|
|
rcall comOnUart0SetMode ; (R17)
|
|
comOnUart0RxCharIsr_end:
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine comOnUart0TxUdreIsr @global
|
|
;
|
|
; Handler for UDRE1 interrupt called when TX data register is empty.
|
|
;
|
|
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
|
; @clobbers R16, R17, X
|
|
|
|
comOnUart0TxUdreIsr:
|
|
inr r16, UCSR0A
|
|
sbrs r16, UDRE0
|
|
rjmp comOnUart0TxUdreIsr_disable_irq ; not ready
|
|
; check bytes left
|
|
ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
|
|
tst r17
|
|
breq comOnUart0TxUdreIsr_finished
|
|
; read byte
|
|
ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
|
|
ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
|
|
ld r16, X+
|
|
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
|
|
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
|
|
; send byte
|
|
outr UDR0, r16 ; send byte
|
|
; decreased counter
|
|
dec r17
|
|
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
|
|
brne comOnUart0TxUdreIsr_end ; still bytes left to send, jump
|
|
comOnUart0TxUdreIsr_finished:
|
|
ldi r16, UART_HW2_MODE_WAITBUFFEREMPTY
|
|
rcall comOnUart0SetMode ; (R17)
|
|
comOnUart0TxUdreIsr_disable_irq:
|
|
; disable further DRE interrupts
|
|
inr r16, UCSR0B
|
|
cbr r16, (1<<UDRIE0) ; disable TX data register empty interrupt
|
|
outr UCSR0B, r16
|
|
comOnUart0TxUdreIsr_end:
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine comOnUart0TxCharIsr @global
|
|
;
|
|
; Handler for TXC0 interrupt called when the last byte has been completely sent and
|
|
; the data register is empty.
|
|
;
|
|
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
|
; @clobbers R16, R17
|
|
|
|
comOnUart0TxCharIsr:
|
|
; disable further TXC interrupts
|
|
inr r16, UCSR0B
|
|
cbr r16, (1<<TXCIE0) ; disable TXC1 interrupt
|
|
outr UCSR0B, r16
|
|
rcall comOnUart0StopTx ; (R16)
|
|
ldi r16, UART_HW2_MODE_MSGSENT
|
|
rcall comOnUart0SetMode ; (R17)
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#endif ; AVR_MODULES_UART_HW2_COMONUART0_H
|