740 lines
19 KiB
NASM
740 lines
19 KiB
NASM
; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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#ifndef AVR_MODULES_UART_HW2_TTYONUART1_H
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#define AVR_MODULES_UART_HW2_TTYONUART1_H
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.equ TTYONUART1_SKIPTIME = 2
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.equ TTYONUART_IFACE_OFFS_BEGIN = UART_HW2_IFACE_SIZE
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.equ TTYONUART_IFACE_OFFS_BUFFER2 = TTYONUART_IFACE_OFFS_BEGIN
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.equ TTYONUART_IFACE_SIZE = TTYONUART_IFACE_OFFS_BUFFER2+UART_HW2_BUFFER_SIZE
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.dseg
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; ttyOnUart1_iface: .byte TTYONUART_IFACE_SIZE
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ttyOnUart1_iface: .byte UART_HW2_IFACE_SIZE
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.cseg
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; ---------------------------------------------------------------------------
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; @routine TtyOnUart1_Init @global
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;
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; @clobbers R16, R17, Y (X)
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TtyOnUart1_Init:
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rcall comOnUart0StopRx
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rcall comOnUart0StopTx
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ldi yl, LOW(ttyOnUart1_iface)
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ldi yh, HIGH(ttyOnUart1_iface)
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rcall NET_Interface_Init ; (R16, R17, X)
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ldi r16, 0xff
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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ldi r16, UART_HW2_MODE_IDLE
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std Y+UART_HW2_IFACE_OFFS_MODE, r16
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clr r16
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std Y+NET_IFACE_OFFS_IFACENUM, r16
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; set baudrate
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.if clock == 8000000
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ldi r16, 25 ; (19.2Kb/s at 8MHz)
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ldi r17, 0
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.endif
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.if clock == 1000000
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ldi r16, 2 ; (19.2Kb/s at 1MHz)
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ldi r17, 0
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.endif
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outr UBRR1H, r17
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outr UBRR1L, r16
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; set character format
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; ldi r16, (1<<USBS1)|(3<<UCSZ10)
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; outr UCSR1C, r16
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ldi r16, (1<<UCSZ11) | (1<<UCSZ10) ; 1 stop bit, 8 databits
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outr UCSR1C, r16
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; receiver always on!
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rcall ttyOnUart1StartRx
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine TtyOnUart1_Periodically @global
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;
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; @clobbers R16, Y
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TtyOnUart1_Periodically:
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push r15
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in r15, SREG
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cli
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ldi yl, LOW(ttyOnUart1_iface)
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ldi yh, HIGH(ttyOnUart1_iface)
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rcall NET_Interface_Periodically
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODECOUNTER
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inc r16
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breq TtyOnUart1_Periodically_end
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std Y+UART_HW2_IFACE_OFFS_MODECOUNTER, r16
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TtyOnUart1_Periodically_end:
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out SREG, r15
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pop r15
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1SetMode
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;
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; @param R16 mode
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; @clobbers R17
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ttyOnUart1SetMode:
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push r15
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in r15, SREG
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cli
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ldd r17, Y+UART_HW2_IFACE_OFFS_MODE
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cp r16, r17
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breq ttyOnUart1SetMode_end
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std Y+UART_HW2_IFACE_OFFS_MODE, r16
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clr r17
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std Y+UART_HW2_IFACE_OFFS_MODECOUNTER, r17
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ttyOnUart1SetMode_end:
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out SREG, r15
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pop r15
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1StartReading
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, X
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ttyOnUart1StartReading:
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mov xl, yl
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mov xh, yh
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adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
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ldi r16, UART_HW2_BUFFER_SIZE-1
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std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r16
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clr r16
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std Y+UART_HW2_IFACE_OFFS_BUFUSED, r16
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ldi r16, UART_HW2_MODE_READING
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rcall ttyOnUart1SetMode ; (R17)
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; rcall ttyOnUart1StartRx ; should be the last call here
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1StartWriting
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;
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; @param Y pointer to interface data in SRAM
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; @param R16 buffer number
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; @return CFLAG set if writing started, cleared otherwise
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; @clobbers R16, R17, X, Z (R22, R24, R25)
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ttyOnUart1StartWriting:
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push r15
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inr r15, SREG
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cli
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rcall ttyOnUart1StartWriting_noIrq
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brcc ttyOnUart1StartWriting_clc
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outr SREG, r15
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pop r15
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sec
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ret
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ttyOnUart1StartWriting_clc:
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outr SREG, r15
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pop r15
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clc
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ret
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ttyOnUart1StartWriting_noIrq:
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; copy buffer
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rcall NET_Buffer_Locate ; (R17)
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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adiw xh:xl, NETMSG_OFFS_MSGLEN+1
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ld r17, X
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sbiw xh:xl, NETMSG_OFFS_MSGLEN+1
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inc r17 ; add dest addr
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inc r17 ; add msg len
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inc r17 ; add crc
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; subi r17, -3 ; add dest addr, msglen, crc
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; TODO: check size!
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std Y+UART_HW2_IFACE_OFFS_BUFUSED, r17
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std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
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; copy into IFACE buffer
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mov zl, yl
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mov zh, yh
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adiw zh:zl, UART_HW2_IFACE_OFFS_BUFFER ; dest
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, zl
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, zh
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adiw xh:xl, 1 ; src (skip buffer header)
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ttyOnUart1StartWriting_loop:
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ld r16, X+
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st Z+, r16
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dec r17
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brne ttyOnUart1StartWriting_loop
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ldi r16, UART_HW2_MODE_WRITING
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rcall ttyOnUart1SetMode ; (R17)
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rcall ttyOnUart1StartTx ; should be the last call here (R16)
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sec
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ttyOnUart1StartWriting_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine TtyOnUart1_Run @global
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;
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; @clobbers all
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TtyOnUart1_Run:
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ldi yl, LOW(ttyOnUart1_iface)
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ldi yh, HIGH(ttyOnUart1_iface)
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push r15
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inr r15, SREG
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cli
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
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TtyOnUart1_Run_loop:
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push r16 ; current state
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rcall ttyOnUart1RunMode ; (all but Y)
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pop r17 ; previous state (pop from r16 into r17)
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; read new state
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
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cp r16, r17
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brne TtyOnUart1_Run_loop ; state changed, run again
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outr SREG, r15
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pop r15
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RunMode
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;
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; @clobbers all
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ttyOnUart1RunMode:
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cpi r16, UART_HW2_MODE_NUM
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brcs TtyOnUart1_Run_jump
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ldi r16, UART_HW2_MODE_IDLE ; unknown mode, set to idle
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rcall ttyOnUart1SetMode ; (R17)
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ret
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TtyOnUart1_Run_jump:
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ldi zl, LOW(ttyOnUart1ModeJumpTable)
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ldi zh, HIGH(ttyOnUart1ModeJumpTable)
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add zl, r16
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adc zh, r16
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sub zh, r16
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ijmp
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ttyOnUart1ModeJumpTable:
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rjmp ttyOnUart1RunIdle
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rjmp ttyOnUart1RunReading
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rjmp ttyOnUart1RunSkipping
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rjmp ttyOnUart1RunMsgReceived
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rjmp ttyOnUart1RunWriting
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rjmp ttyOnUart1RunWaitBufferEmpty
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rjmp ttyOnUart1RunMsgSent
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RunIdle
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, R24, R25, X, Z
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ttyOnUart1RunIdle:
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; look for outbound message
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rcall NET_Interface_PeekNextOutgoingMsgNum ; r16=msgNum
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brcc ttyOnUart1RunIdle_end ; no outmsg in queue
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rcall ttyOnUart1StartWriting ; (R16, R17, R22, R24, R25, X, Z)
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brcc ttyOnUart1RunIdle_end
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rcall NET_Interface_GetNextOutgoingMsgNum ; take current msg off the queue
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ttyOnUart1RunIdle_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RunReading
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers none
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ttyOnUart1RunReading:
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; TODO: check for timeout
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RunSkipping
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16 (R17)
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ttyOnUart1RunSkipping:
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ldd r16, Y+NET_IFACE_OFFS_READTIMER
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cpi r16, TTYONUART1_SKIPTIME
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brcs ttyOnUart1RunSkipping_end
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; leave skip mode (enter idle)
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ldi r16, UART_HW2_MODE_IDLE
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rcall ttyOnUart1SetMode ; (R17)
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ttyOnUart1RunSkipping_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RunMsgReceived
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, R18, X, Z (R19, R20, R24, R25)
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ttyOnUart1RunMsgReceived:
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mov xl, yl
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mov xh, yh
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adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
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mov zl, xl ; Z=buffer in IFACE
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mov zh, xh
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rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
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brcc ttyOnUart1RunMsgReceived_econtent
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; msg valid, alloc buffer
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rcall NET_Buffer_Alloc ; X=buffer, R16=bufnum (R16, R17, X)
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brcc ttyOnUart1RunMsgReceived_enobuf
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mov r18, r16 ; buffer num
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rcall NET_Interface_SetIfaceNumInBuffer ; (R16, R17)
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adiw xh:xl, 1
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ldd r17, Y+UART_HW2_IFACE_OFFS_BUFUSED ; always is at least 2 here
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ttyOnUart1RunMsgReceived_copyLoop:
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ld r16, Z+
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st X+, r16
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dec r17
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brne ttyOnUart1RunMsgReceived_copyLoop
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mov r16, r18 ; buffer num
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rcall NET_AddIncomingMsgNum ; (R17, R18, X)
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brcc ttyOnUart1RunMsgReceived_enoadd
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ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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rjmp ttyOnUart1RunMsgReceived_setIdleAndEnd
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ttyOnUart1RunMsgReceived_enoadd:
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rcall NET_Buffer_ReleaseByNum
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rjmp ttyOnUart1RunMsgReceived_enobuf
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ttyOnUart1RunMsgReceived_enobuf:
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ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
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rjmp ttyOnUart1RunMsgReceived_err
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ttyOnUart1RunMsgReceived_econtent:
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ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
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ttyOnUart1RunMsgReceived_err:
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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ttyOnUart1RunMsgReceived_setIdleAndEnd:
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ldi r16, UART_HW2_MODE_IDLE
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rcall ttyOnUart1SetMode ; (R17)
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ttyOnUart1RunMsgReceived_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RunWriting
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers none
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ttyOnUart1RunWriting:
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; TODO: check for timeout
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RunWaitBufferEmpty
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;
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; @clobbers none
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ttyOnUart1RunWaitBufferEmpty:
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; TODO: check for timeout etc.
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RunWriting
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;
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; @param Y pointer to interface data in SRAM
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; @clobbers R16 (R17, R22, R24, R25, X)
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ttyOnUart1RunMsgSent:
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ldd r16, Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM
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rcall NET_Buffer_ReleaseByNum ; (R16, X)
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ldi r16, 0xff
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std Y+UART_HW2_IFACE_OFFS_WRITEBUFNUM, r16
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ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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ldi r16, UART_HW2_MODE_IDLE
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rcall ttyOnUart1SetMode ; (R17)
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1StartRx
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;
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; @clobbers R16
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ttyOnUart1StartRx:
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inr r16, UCSR1B
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sbr r16, (1<<RXCIE1) | (1<<RXEN1) ; enable RX complete interrupt, enable receive
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outr UCSR1B, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1StopRx
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;
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; @clobbers R16
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ttyOnUart1StopRx:
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inr r16, UCSR1B
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cbr r16, (1<<RXCIE1 | (1<<RXEN1)) ; disable RX complete interrupt, disable receive
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outr UCSR1B, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1StartTx
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;
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; @clobbers R16
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ttyOnUart1StartTx:
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inr r16, UCSR1A
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cbr r16, (1<<TXC1) ; clear TXCn interrupt
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outr UCSR1A, r16
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inr r16, UCSR1B
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; sbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; enable TX UDRE and TXC1 interrupt, enable transceive
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sbr r16, (1<<UDRIE1) | (1<<TXEN1) ; enable TX UDRE interrupt, enable transceive
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outr UCSR1B, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1StopTx
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;
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; @clobbers R16
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ttyOnUart1StopTx:
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inr r16, UCSR1B
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cbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; disable TX UDRE and TXC1 interrupt, enable transceive
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outr UCSR1B, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine TtyOnUart1_RxCharIsr @global @isr
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;
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; @clobbers none
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TtyOnUart1_RxCharIsr:
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push r15
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in r15, SREG
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push r16
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push r17
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push r18
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push r24
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push r25
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push xl
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push xh
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push yl
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push yh
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ldi yl, LOW(ttyOnUart1_iface)
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ldi yh, HIGH(ttyOnUart1_iface)
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rcall ttyOnUart1RxCharIsr ; (R16, R17, R18, R24, R25, X)
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pop yh
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pop yl
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pop xh
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pop xl
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pop r25
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pop r24
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pop r18
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pop r17
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pop r16
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out SREG, r15
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pop r15
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reti
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; @end
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; ---------------------------------------------------------------------------
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; @routine TtyOnUart1_TxUdreIsr @global @isr
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;
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; @clobbers none
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TtyOnUart1_TxUdreIsr:
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push r15
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in r15, SREG
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push r16
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push r17
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push xl
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push xh
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push yl
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push yh
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ldi yl, LOW(ttyOnUart1_iface)
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ldi yh, HIGH(ttyOnUart1_iface)
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rcall ttyOnUart1TxUdreIsr ; (R16, R17, X)
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pop yh
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pop yl
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pop xh
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pop xl
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pop r17
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pop r16
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out SREG, r15
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pop r15
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reti
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; @end
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; ---------------------------------------------------------------------------
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; @routine TtyOnUart1_TxCharIsr @global @isr
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;
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; @clobbers none
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TtyOnUart1_TxCharIsr:
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push r15
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in r15, SREG
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push r16
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push r17
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push yl
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push yh
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ldi yl, LOW(ttyOnUart1_iface)
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ldi yh, HIGH(ttyOnUart1_iface)
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rcall ttyOnUart1TxCharIsr ; (R16, R17)
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pop yh
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pop yl
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pop r17
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pop r16
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out SREG, r15
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pop r15
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|
reti
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; @end
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; ---------------------------------------------------------------------------
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; @routine ttyOnUart1RxCharIsr @global
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;
|
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; @param Y pointer to interface data in SRAM
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; @clobbers R16, R17, R18, R24, R25, X
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|
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ttyOnUart1RxCharIsr:
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
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cpi r16, UART_HW2_MODE_READING
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breq ttyOnUart1RxCharIsr_readChar
|
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cpi r16, UART_HW2_MODE_SKIPPING
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breq ttyOnUart1RxCharIsr_skipChar
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cpi r16, UART_HW2_MODE_IDLE
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brne ttyOnUart1RxCharIsr_skipChar
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; is in idle mode, start reading mode (prepare buffer etc)
|
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rcall ttyOnUart1StartReading ; (R16, R17, X)
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|
ttyOnUart1RxCharIsr_readChar:
|
|
; check for errors
|
|
inr r16, UCSR1A ; check for errors
|
|
andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
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brne ttyOnUart1RxCharIsr_hwerr
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|
|
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inr r16, UCSR1A ; read status: data available?
|
|
sbrs r16, RXC1
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rjmp ttyOnUart1RxCharIsr_end ; jmp if no data
|
|
inr r16, UDR1 ; r16=received char
|
|
; check mode
|
|
ldd r17, Y+UART_HW2_IFACE_OFFS_MODE
|
|
cpi r17, UART_HW2_MODE_READING
|
|
brne ttyOnUart1RxCharIsr_overrun
|
|
; store char
|
|
ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
|
|
ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
|
|
st X+, r16
|
|
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
|
|
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
|
|
; handle counters
|
|
ldd r18, Y+UART_HW2_IFACE_OFFS_BUFUSED
|
|
inc r18
|
|
std Y+UART_HW2_IFACE_OFFS_BUFUSED, r18
|
|
ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
|
|
dec r17
|
|
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
|
|
breq ttyOnUart1RxCharIsr_complete
|
|
; check msg size
|
|
cpi r18, 2
|
|
brne ttyOnUart1RxCharIsr_end
|
|
; determine msg size
|
|
inc r16 ; last byte was payload length, add byte for crc
|
|
cp r16, r17 ; compare remaining length against remaining space
|
|
brcc ttyOnUart1RxCharIsr_emsgsize ; msg too long
|
|
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r16 ; set new number of bytes left
|
|
tst r16
|
|
brne ttyOnUart1RxCharIsr_end ; jmp if still bytes left to receive
|
|
ttyOnUart1RxCharIsr_complete:
|
|
; rcall ttyOnUart1StopRx
|
|
ldi r16, UART_HW2_MODE_MSGRECEIVED
|
|
rcall ttyOnUart1SetMode ; (R17)
|
|
rjmp ttyOnUart1RxCharIsr_end
|
|
ttyOnUart1RxCharIsr_hwerr:
|
|
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
|
|
rjmp ttyOnUart1RxCharIsr_err
|
|
ttyOnUart1RxCharIsr_overrun:
|
|
ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
|
|
rjmp ttyOnUart1RxCharIsr_err
|
|
ttyOnUart1RxCharIsr_emsgsize:
|
|
ldi r16, NET_IFACE_OFFS_ERR_MSGSIZE_LOW
|
|
ttyOnUart1RxCharIsr_err:
|
|
rcall NET_Interface_IncCounter16 ; (R24, R25)
|
|
; rcall ttyOnUart1StopRx ; (R16)
|
|
ldi r16, UART_HW2_MODE_SKIPPING
|
|
rcall ttyOnUart1SetMode ; (R17)
|
|
rjmp ttyOnUart1RxCharIsr_end
|
|
ttyOnUart1RxCharIsr_skipChar:
|
|
inr r16, UCSR1A ; read status: data available?
|
|
sbrs r16, RXC1
|
|
rjmp ttyOnUart1RxCharIsr_end ; jmp if no data
|
|
inr r16, UDR1 ; r16=received char
|
|
ttyOnUart1RxCharIsr_end:
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine ttyOnUart1TxUdreIsr @global
|
|
;
|
|
; Handler for UDRE1 interrupt called when TX data register is empty.
|
|
;
|
|
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
|
; @clobbers R16, R17, X
|
|
|
|
ttyOnUart1TxUdreIsr:
|
|
inr r16, UCSR1A
|
|
sbrs r16, UDRE1
|
|
rjmp ttyOnUart1TxUdreIsr_disable_irq ; not ready
|
|
|
|
; check bytes left
|
|
ldd r17, Y+UART_HW2_IFACE_OFFS_BUFLEFT
|
|
tst r17
|
|
breq ttyOnUart1TxUdreIsr_finished
|
|
; read byte
|
|
ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
|
|
ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
|
|
ld r16, X+
|
|
std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
|
|
std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
|
|
; send byte
|
|
outr UDR1, r16 ; send byte
|
|
; decrease counter
|
|
dec r17
|
|
std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
|
|
brne ttyOnUart1TxUdreIsr_end ; still bytes left to send, jump
|
|
ttyOnUart1TxUdreIsr_finished:
|
|
ldi r16, UART_HW2_MODE_WAITBUFFEREMPTY
|
|
rcall ttyOnUart1SetMode ; (R17)
|
|
ttyOnUart1TxUdreIsr_disable_irq:
|
|
; disable further DRE interrupts
|
|
inr r16, UCSR1B
|
|
cbr r16, (1<<UDRIE1) ; disable TX data register empty interrupt
|
|
sbr r16, (1<<TXC1) ; enable TXC1 interrupt
|
|
outr UCSR1B, r16
|
|
ttyOnUart1TxUdreIsr_end:
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine ttyOnUart1TxCharIsr @global
|
|
;
|
|
; Handler for TXC1 interrupt called when the last byte has been completely sent and
|
|
; the data register is empty.
|
|
;
|
|
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
|
|
; @clobbers R16, R17
|
|
|
|
ttyOnUart1TxCharIsr:
|
|
; disable further TXC interrupts
|
|
inr r16, UCSR1B
|
|
cbr r16, (1<<TXCIE1) ; disable TXC1 interrupt
|
|
outr UCSR1B, r16
|
|
rcall ttyOnUart1StopTx ; (R16)
|
|
|
|
ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
|
|
cpi r16, UART_HW2_MODE_WAITBUFFEREMPTY
|
|
breq ttyOnUart1TxCharIsr_setMode
|
|
ldi r16, UART_HW2_MODE_IDLE
|
|
rjmp ttyOnUart1TxCharIsr_setMode
|
|
ttyOnUart1TxCharIsr_msgComplete:
|
|
ldi r16, UART_HW2_MODE_MSGSENT
|
|
ttyOnUart1TxCharIsr_setMode:
|
|
rcall ttyOnUart1SetMode ; (R17)
|
|
ttyOnUart1TxCharIsr_disableIrq:
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#endif ; AVR_MODULES_UART_HW2_TTYONUART1_H
|