235 lines
5.4 KiB
NASM
235 lines
5.4 KiB
NASM
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.equ COM_BIT_LENGTH = 52000 ; 104000=9600, 52000=19200, 26000=38400
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.equ COM_DATA_OFFS_ID = 0
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.equ COM_DATA_OFFS_FLAGS = 1
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.equ COM_DATA_OFFS_ADDR_DDR_DATA = 2
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.equ COM_DATA_OFFS_ADDR_PORT_DATA = 3
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.equ COM_DATA_OFFS_ADDR_PIN_DATA = 4
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.equ COM_DATA_OFFS_PINMASK_DATA = 5
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.equ COM_DATA_OFFS_ADDR_DDR_ATTN = 6
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.equ COM_DATA_OFFS_ADDR_PORT_ATTN = 7
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.equ COM_DATA_OFFS_ADDR_PIN_ATTN = 8
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.equ COM_DATA_OFFS_PINMASK_ATTN = 9
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.equ COM_DATA_OFFS_IRQNUM_ATTN = 10 ; 0 for PCINT0, 1 for PCINT1
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.equ COM_DATA_OFFS_IRQMASK_ATTN = 11 ; e.g. 0x80 for PCINT7 in PCMSK0
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.equ COM_DATA_SIZE = 12
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.equ COM_BUFFER_FLAGS_DONE = 0x80
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.equ COM_BUFFER_FLAGS_RECEIVED = 0x40
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; interface data in SRAM
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.equ COM_SRAM_OFFS_ID = 0
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.equ COM_SRAM_OFFS_FLAGS = 1
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.equ COM_SRAM_OFFS_ADDRESS = 2
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.equ COM_SRAM_OFFS_MODULE_ID = 3
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.equ COM_SRAM_OFFS_SUBNET_START = 4
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.equ COM_SRAM_OFFS_SUBNET_END = 5
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.equ COM_SRAM_OFFS_DATA_BITMASK = 6
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.equ COM_SRAM_OFFS_DATA_INPUT_PORT = 7
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.equ COM_SRAM_OFFS_DATA_OUTPUT_PORT = 8
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.equ COM_SRAM_OFFS_DATA_DDR_PORT = 9
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.equ COM_SRAM_OFFS_ATTN_BITMASK = 10
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.equ COM_SRAM_OFFS_ATTN_INPUT_PORT = 11
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.equ COM_SRAM_OFFS_ATTN_OUTPUT_PORT = 12
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.equ COM_SRAM_OFFS_ATTN_DDR_PORT = 13
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.equ COM_SRAM_OFFS_STAT_PACKETS_IN = 14 ; 2 bytes
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.equ COM_SRAM_OFFS_STAT_PACKETS_OUT = 16 ; 2 bytes
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.equ COM_SRAM_OFFS_STAT_COLLISIONS = 18 ; 2 bytes
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.equ COM_SRAM_OFFS_STAT_RECVERR = 20 ; 2 bytes
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.equ COM_SRAM_OFFS_STAT_MISSED = 22 ; 2 bytes
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.equ COM_SRAM_SIZE = 24
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; ***************************************************************************
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; macros
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; ---------------------------------------------------------------------------
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; comSetRamBitInX
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;
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; Set a given bit in the byte pointed to by X.
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; IN:
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; - @0: bit mask to check
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; - @1: temporary register to use
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; OUT:
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; - nothing
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; MODIFIED REGS: temporary register
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; CYCLES: 4
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.macro comSetRamBitInX
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ld @1, x ; 1
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or @1, @0 ; 1
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st x, @1 ; 2
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.endmacro
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; ---------------------------------------------------------------------------
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; comClearRamBitInX
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;
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; Clear a given bit in the byte pointed to by X.
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; IN:
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; - @0: bit mask to check
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; - @1: temporary register to use
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; OUT:
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; - nothing
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; MODIFIED REGS: temporary register
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; CYCLES: 6 (CAVE: two cycles more than comSetRamBitInX!)
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.macro comClearRamBitInX
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ld @1, x ; 1
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com @0 ; 1
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and @1, @0 ; 1
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com @0 ; 1
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st x, @1 ; 2
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.endmacro
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; ---------------------------------------------------------------------------
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; comTestRamBitInX
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;
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; Test a given bit in the byte pointed to by X.
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; IN:
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; - @0: bit mask to check
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; - @1: temporary register to use
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; OUT:
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; - ZFLAG: set if bit is zero, cleared otherwise
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; MODIFIED REGS: temporary register
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; CYCLES: 6 (CAVE: two cycles more than comSetRamBitInX!)
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.macro comTestRamBitInX
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ld @1, x ; 1
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and @1, @0 ; 1
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.endmacro
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; ***************************************************************************
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; code
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.cseg
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; ---------------------------------------------------------------------------
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; Com_Init
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;
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; IN:
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; - Y: pointer to SRAM data
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; - Z: pointer to FLASH data
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; OUT:
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; - CFLAG: set if okay, clear on error
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; USED:
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Com_Init:
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mov xh, yh
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mov xl, yl
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clr r16
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ldi r17, COM_SRAM_SIZE
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rcall Utils_FillSram
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; copy data from flash to sram
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push zh
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push zl
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lsl zl
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rol zh
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lpm r16, z+ ; id
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std y+COM_SRAM_OFFS_ID, r16
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lpm r16, z+ ; flags
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std y+COM_SRAM_OFFS_FLAGS, r16
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lpm r16, z+ ; ADDR_DDR_DATA
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std y+COM_SRAM_OFFS_DATA_DDR_PORT, r16
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lpm r16, z+ ; ADDR_PORT_DATA
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std y+COM_SRAM_OFFS_DATA_OUTPUT_PORT, r16
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lpm r16, z+ ; ADDR_PIN_DATA
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std y+COM_SRAM_OFFS_DATA_INPUT_PORT, r16
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lpm r16, z+ ; PINMASK_DATA
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std y+COM_SRAM_OFFS_DATA_INPUT_PORT, r16
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lpm r16, z+ ; ADDR_DDR_ATTN
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std y+COM_SRAM_OFFS_ATTN_DDR_PORT, r16
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lpm r16, z+ ; ADDR_PORT_ATTN
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std y+COM_SRAM_OFFS_ATTN_OUTPUT_PORT, r16
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lpm r16, z+ ; ADDR_PIN_ATTN
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std y+COM_SRAM_OFFS_ATTN_INPUT_PORT, r16
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lpm r16, z+ ; PINMASK_ATTN
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std y+COM_SRAM_OFFS_ATTN_INPUT_PORT, r16
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lpm r17, z+ ; IRQNUM_ATTN
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lpm r18, z+ ; COM_DATA_OFFS_IRQMASK_ATTN
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pop zl
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pop zh
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; set DATA port as input
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clr xh
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ldd xl, y+COM_SRAM_OFFS_DATA_DDR_PORT
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ldd r4, y+COM_SRAM_OFFS_DATA_BITMASK
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comClearRamBitInX r4, r16
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; disable internal pullup for DATA
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ldd xl, y+COM_SRAM_OFFS_DATA_OUTPUT_PORT
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comClearRamBitInX r4, r16
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; set ATTN as input
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ldd xl, y+COM_SRAM_OFFS_ATTN_DDR_PORT
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ldd r4, y+COM_SRAM_OFFS_ATTN_BITMASK
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comClearRamBitInX r4, r16
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; disable internal pullup for DATA
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ldd xl, y+COM_SRAM_OFFS_ATTN_OUTPUT_PORT
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comClearRamBitInX r4, r16
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; setup pin IRQ for ATTN (intnum in r17, irqmask in r18)
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tst r17
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brne Com_Init_setupInt1
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Com_Init_setupInt0:
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; enable PCIE0
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in r16, GIMSK
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ori r16, (1 << PCIE0)
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out GIMSK, r16
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; clear pending interrupts
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in r16, GIFR
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andi r16, ~(1 << PCIF0)
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out GIFR, r16
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ldi xl, PCMSK0+0x20
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rjmp Com_Init_enablePinIrq
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Com_Init_setupInt1:
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; enable PCIE1
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in r16, GIMSK
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ori r16, (1 << PCIE1)
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out GIMSK, r16
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; clear pending interrupts
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in r16, GIFR
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andi r16, ~(1 << PCIF1)
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out GIFR, r16
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ldi xl, PCMSK1+0x20
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Com_Init_enablePinIrq:
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ld r16, x
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or r16, r18 ; set mask bits
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st x, r16
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sec
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ret
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