aqhomecontrol/avr/modules/uart_hw/lowlevel_uart1.asm

; ***************************************************************************
; copyright   : (C) 2025 by Martin Preuss
; email       : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome".                              *
; * Please see toplevel file COPYING of that project for license details.   *
; ***************************************************************************



.cseg



; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_Init @global
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
; @clobbers R16, R17, X

UART_HW_Uart1_Init:
  M_UART_HW_Uart_Init 1
  ret
; @end



; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_StartRx @global
;
; @clobbers R16

UART_HW_Uart1_StartRx:
  M_UART_HW_Uart_StartRx 1
  ret
; @end



; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_StopRx @global
;
; @clobbers R16

UART_HW_Uart1_StopRx:
  M_UART_HW_Uart_StopRx 1
  ret
; @end



; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_StartTx @global
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
; @clobbers R16

UART_HW_Uart1_StartTx:
  M_UART_HW_Uart_StartTx 1
  ret
; @end



; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_StopTx @global
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
; @clobbers R16

UART_HW_Uart1_StopTx:
  M_UART_HW_Uart_StopTx 1
  ret
; @end


; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_Flush
;
; Flush receiption buffer.
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @clobbers R16

UART_HW_Uart1_Flush:
  M_UART_HW_Uart_Flush 1
  ret
; @end



; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_RxCharIsr @global
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @clobbers R16 (R17, R18, R24, R25, X)

UART_HW_Uart1_RxCharIsr:
  ; check for errors
  lds r16, UCSR1A                              ; check for errors
  andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
  brne UART_HW_Uart1_RxCharIsr_hwerr
  ; read char
  lds r16, UCSR1A
  sbrs r16, RXC1
    rjmp UART_HW_Uart1_RxCharIsr_end                                ; no data
  lds r16, UDR1                                ; r16=received char
  ; check read mode
  ldd r17, Y+UART_HW_IFACE_OFFS_READMODE
  cpi r17, UART_HW_READMODE_READING
  breq UART_HW_Uart1_RxCharIsr_storeChar
  cpi r17, UART_HW_READMODE_SKIPPING
  breq UART_HW_Uart1_RxCharIsr_skipChar
  rjmp UART_HW_Uart1_RxCharIsr_overrun                              ; neither read nor skip mode
UART_HW_Uart1_RxCharIsr_skipChar:
  clr r16
  std Y+NET_IFACE_OFFS_READTIMER, r16           ; reset read timer
  rjmp UART_HW_Uart1_RxCharIsr_end
UART_HW_Uart1_RxCharIsr_storeChar:
  mov r18, r16                                  ; r18=received char
  ; check buffer
  ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
  cpi r16, 0xff
  breq UART_HW_Uart1_RxCharIsr_overrun

  ; check for buffer overrun
  ldd r17, Y+UART_HW_IFACE_OFFS_READBUFLEFT     ; r17=bytes left
  tst r17
  breq UART_HW_Uart1_RxCharIsr_econtent         ; msg too long

  ; actually store byte, increment/decrement counters and pos
  ldd xl, Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW
  ldd xh, Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH
  st X+, r18                                    ; r18=byte to store
  clr r16
  std Y+NET_IFACE_OFFS_READTIMER, r16           ; reset read timer
  std Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW, xl
  std Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH, xh
  ldd r18, Y+UART_HW_IFACE_OFFS_READBUFUSED     ; r18=bytes in buffer
  inc r18
  std Y+UART_HW_IFACE_OFFS_READBUFUSED, r18
  dec r17
  std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r17
  breq UART_HW_Uart1_RxCharIsr_msgFinished

  ; check msg size
  cpi r18, 2                                    ; bytes in buffer, exactly 2?
  brne UART_HW_Uart1_RxCharIsr_end                                    ; nope, done
  sbiw xh:xl, 1                                 ; yes, determine message length (msgLen at previous pos)
  ld r16, X+                                    ; read payload length byte
  subi r16, -3                                  ; add 3 (dest addr, length, crc byte)
  cpi r16, (NET_BUFFERS_SIZE-1)                 ; total msg length ok?
  brcc UART_HW_Uart1_RxCharIsr_econtent                               ; content error (msg too long)
  subi r16, 2                                   ; subtract bytes already received
  std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r16     ; set new number of bytes left
  brne UART_HW_Uart1_RxCharIsr_end              ; jmp if still bytes left to receive

UART_HW_Uart1_RxCharIsr_msgFinished:
  ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
  ldi r17, UART_HW_READMODE_MSGRECEIVED
  rjmp UART_HW_Uart1_RxCharIsr_incCounterAndEnterMode
UART_HW_Uart1_RxCharIsr_hwerr:
  ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
  rjmp UART_HW_Uart1_RxCharIsr_incCounterAndEnterSkipping
UART_HW_Uart1_RxCharIsr_econtent:
  ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
  rjmp UART_HW_Uart1_RxCharIsr_incCounterAndEnterSkipping
UART_HW_Uart1_RxCharIsr_overrun:
  ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
UART_HW_Uart1_RxCharIsr_incCounterAndEnterSkipping:
  ldi r17, UART_HW_READMODE_SKIPPING
UART_HW_Uart1_RxCharIsr_incCounterAndEnterMode:
  rcall NET_Interface_IncCounter16              ; (R24, R25)
  std Y+UART_HW_IFACE_OFFS_READMODE, r17        ; set read mode
UART_HW_Uart1_RxCharIsr_end:
  ret
; @end
  ret
; @end



; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_TxUdreIsr @global
;
; Handler for UDRE1 interrupt called when TX data register is empty.
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @clobbers R16, R17, X

UART_HW_Uart1_TxUdreIsr:
  M_UART_HW_Uart_TxUdreIsr 1
  ret
; @end



; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_TxCharIsr @global
;
; Handler for TXC1 interrupt called when a last byte has been completely sent and
; the data register is empty.
;
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @clobbers R16

UART_HW_Uart1_TxCharIsr:
  M_UART_HW_Uart_TxCharIsr 1
  ret
; @end