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mp-2025_05
...
mp-2025_05
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77bb64fbb6 |
@@ -117,6 +117,26 @@ void _handleMsgValue(AQH_NODE_SERVER *xo, const AQH_MESSAGE *msg)
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if (ni==NULL) {
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DBG_INFO(AQH_LOGDOMAIN, "Error handling message");
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}
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else {
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uint8_t valueId;
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uint16_t val;
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val=AQH_ValueMessage_GetValueNom(msg);
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valueId=AQH_ValueMessage_GetValueId(msg);
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switch(valueId) {
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case AQH_ENDPOINT_VID_STATS_PACKETS_IN: AQH_NodeInfo_SetStatsPacketsIn(ni, val); AQH_NodeDb_SetModified(xo->nodeDb); break;
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case AQH_ENDPOINT_VID_STATS_PACKETS_OUT: AQH_NodeInfo_SetStatsPacketsOut(ni, val); AQH_NodeDb_SetModified(xo->nodeDb); break;
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case AQH_ENDPOINT_VID_STATS_ERRS_CONTENT: AQH_NodeInfo_SetStatsCrcErrors(ni, val); AQH_NodeDb_SetModified(xo->nodeDb); break;
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case AQH_ENDPOINT_VID_STATS_ERRS_IO: AQH_NodeInfo_SetStatsIoErrors(ni, val); AQH_NodeDb_SetModified(xo->nodeDb); break;
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case AQH_ENDPOINT_VID_STATS_ERRS_NOBUF: break;
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case AQH_ENDPOINT_VID_STATS_ERRS_COLLISIONS: AQH_NodeInfo_SetStatsCollisions(ni, val); AQH_NodeDb_SetModified(xo->nodeDb); break;
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case AQH_ENDPOINT_VID_STATS_ERRS_BUSY: AQH_NodeInfo_SetStatsBusy(ni, val); AQH_NodeDb_SetModified(xo->nodeDb); break;
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case AQH_ENDPOINT_VID_STATS_HEAP_USED: break;
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case AQH_ENDPOINT_VID_STATS_HEAP_FREE: break;
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default:
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}
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}
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}
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@@ -145,11 +165,13 @@ void _handleMsgComSendStat(AQH_NODE_SERVER *xo, const AQH_MESSAGE *msg)
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if (ni==NULL) {
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DBG_INFO(AQH_LOGDOMAIN, "Error handling message");
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}
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AQH_NodeInfo_SetStatsPacketsOut(ni, AQH_SendStatsMessage_GetPacketsOut(msg));
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AQH_NodeInfo_SetStatsCollisions(ni, AQH_SendStatsMessage_GetCollisions(msg));
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AQH_NodeInfo_SetStatsBusy(ni, AQH_SendStatsMessage_GetBusyErrors(msg));
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AQH_NodeDb_SetModified(xo->nodeDb);
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_updateTimestampLastChange(ni);
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else {
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AQH_NodeInfo_SetStatsPacketsOut(ni, AQH_SendStatsMessage_GetPacketsOut(msg));
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AQH_NodeInfo_SetStatsCollisions(ni, AQH_SendStatsMessage_GetCollisions(msg));
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AQH_NodeInfo_SetStatsBusy(ni, AQH_SendStatsMessage_GetBusyErrors(msg));
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AQH_NodeDb_SetModified(xo->nodeDb);
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_updateTimestampLastChange(ni);
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}
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}
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@@ -34,6 +34,18 @@
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#define AQH_ENDPOINT_VID_STATS_PACKETS_IN 0xe0
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#define AQH_ENDPOINT_VID_STATS_PACKETS_OUT 0xe1
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#define AQH_ENDPOINT_VID_STATS_ERRS_CONTENT 0xe2
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#define AQH_ENDPOINT_VID_STATS_ERRS_IO 0xe3
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#define AQH_ENDPOINT_VID_STATS_ERRS_NOBUF 0xe4
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#define AQH_ENDPOINT_VID_STATS_ERRS_COLLISIONS 0xe5
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#define AQH_ENDPOINT_VID_STATS_ERRS_BUSY 0xe6
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#define AQH_ENDPOINT_VID_STATS_HEAP_USED 0xe7
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#define AQH_ENDPOINT_VID_STATS_HEAP_FREE 0xe8
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AQH_OBJECT *AQH_NodeServer_new(AQH_EVENT_LOOP *eventLoop);
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int AQH_NodeServer_Init(AQH_OBJECT *o, int argc, char **argv);
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void AQH_NodeServer_Fini(AQH_OBJECT *o);
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@@ -170,7 +170,13 @@ void _printNode(const AQH_NODE_INFO *ni, int printAll)
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fprintf(stdout, ", firmware=%d.%d.%d (%d), ",
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(u>>16) & 0xff, (u>>8) & 0xff, u & 0xff, (u>>24) & 0xff);
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if (ts)
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fprintf(stdout, "last seen %s, ", GWEN_Timestamp_GetString(ts));
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fprintf(stdout, "last seen %04d/%02d/%02d-%02d:%02d:%02d, ",
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GWEN_Timestamp_GetYear(ts),
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GWEN_Timestamp_GetMonth(ts),
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GWEN_Timestamp_GetDay(ts),
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GWEN_Timestamp_GetHour(ts),
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GWEN_Timestamp_GetMinute(ts),
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GWEN_Timestamp_GetSecond(ts));
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fprintf(stdout, "pkg out: %d, pkg in: %d, collisions: %d, busy: %d, crc: %d, io: %d\n",
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AQH_NodeInfo_GetStatsPacketsOut(ni),
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AQH_NodeInfo_GetStatsPacketsIn(ni),
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@@ -261,6 +261,12 @@ int AQH_ValueModality_fromString(const char *s)
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return AQH_ValueModality_RGBW;
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else if (strcasecmp(s, "motion")==0)
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return AQH_ValueModality_Motion;
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else if (strcasecmp(s, "co2")==0)
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return AQH_ValueModality_Co2;
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else if (strcasecmp(s, "tvoc")==0)
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return AQH_ValueModality_TVOC;
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else if (strcasecmp(s, "stats")==0)
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return AQH_ValueModality_Stats;
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}
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return AQH_ValueModality_Unknown;
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}
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@@ -276,6 +282,9 @@ const char *AQH_ValueModality_toString(int i)
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case AQH_ValueModality_RGB: return "rgb";
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case AQH_ValueModality_RGBW: return "rgbw";
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case AQH_ValueModality_Motion: return "motion";
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case AQH_ValueModality_Co2: return "co2";
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case AQH_ValueModality_TVOC: return "tvoc";
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case AQH_ValueModality_Stats: return "stats";
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case AQH_ValueModality_Unknown:
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default: return "unknown";
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}
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@@ -42,7 +42,10 @@ enum {
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AQH_ValueModality_Door,
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AQH_ValueModality_RGB,
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AQH_ValueModality_RGBW,
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AQH_ValueModality_Motion
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AQH_ValueModality_Motion,
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AQH_ValueModality_Co2,
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AQH_ValueModality_TVOC,
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AQH_ValueModality_Stats
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};
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@@ -21,36 +21,36 @@ This app can watch for up to two node-value pairs.
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----------------
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RGB Value for activated light:
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aqhome-tool setValue -N nodes/XXXXXXXX/MALRGBWVALUE -v GRWB
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aqhome-tool setdata -N nodes/XXXXXXXX/MALRGBWVALUE -v GRWB
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Example:
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Set color of LED strip to blue (half intensity)
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aqhome-tool setValue -N nodes/12345678/MALRGBWVALUE -v 0x80
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aqhome-tool setdata -N nodes/12345678/MALRGBWVALUE -v 0x80
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1.2 MALONTIME
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-------------
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On-Time after activation:
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aqhome-tool setValue -N nodes/XXXXXXXX/MALONTIME TIME_IN_1/10_SECS
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aqhome-tool setdata -N nodes/XXXXXXXX/MALONTIME TIME_IN_1/10_SECS
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Example:
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Keep light on after activation for 20 seconds
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aqhome-tool setValue -N nodes/12345678/MALONTIME -v 200
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aqhome-tool setdata -N nodes/12345678/MALONTIME -v 200
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1.3. MALSOURCE1, MALSOURCE2
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---------------------------
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Sources for Motion Messages:
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aqhome-tool setValue -N nodes/XXXXXXXX/MALSOURCE1 -v VVNN
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aqhome-tool setValue -N nodes/XXXXXXXX/MALSOURCE2 -v VVNN
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aqhome-tool setdata -N nodes/XXXXXXXX/MALSOURCE1 -v VVNN
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aqhome-tool setdata -N nodes/XXXXXXXX/MALSOURCE2 -v VVNN
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VVNN is a 16-bit value, lower 8 bit contain the source node address, higher 8 bit contain the
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value id to react to.
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Example:
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React to value report messages with value id 7 from node with address 2
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aqhome-tool setValue -N nodes/12345678/MALSOURCE1 -v 0x0702
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aqhome-tool setdata -N nodes/12345678/MALSOURCE1 -v 0x0702
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@@ -11,7 +11,7 @@
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; ***************************************************************************
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; defines
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.equ APP_STATS_INTERVAL_MINS = 10
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.equ APP_STATS_INTERVAL_MINS = 11
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@@ -63,22 +63,93 @@ AppStats_OnEveryMinute_store:
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ldi yl, LOW(netInterfaceData)
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ldi yh, HIGH(netInterfaceData)
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cpi r16, 1
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breq AppStats_OnEveryMinute_sendRxdStats
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cpi r16, 2
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breq AppStats_OnEveryMinute_sendTxdStats
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cpi r16, 3
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breq AppStats_OnEveryMinute_sendDevice
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cpi r16, 2
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breq AppStats_OnEveryMinute_sendPacketsIn
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cpi r16, 3
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breq AppStats_OnEveryMinute_sendPacketsOut
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cpi r16, 4
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breq AppStats_OnEveryMinute_sendMemStats
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ret
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AppStats_OnEveryMinute_sendTxdStats:
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rjmp AppNetwork_SendTxdStats
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AppStats_OnEveryMinute_sendRxdStats:
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rjmp AppNetwork_SendRxdStats
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AppStats_OnEveryMinute_sendMemStats:
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rjmp AppNetwork_SendMemStats
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breq AppStats_OnEveryMinute_sendContentErrs
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cpi r16, 5
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breq AppStats_OnEveryMinute_sendIoErrs
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cpi r16, 6
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breq AppStats_OnEveryMinute_sendNoBufErrs
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cpi r16, 7
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breq AppStats_OnEveryMinute_sendCollisionErrs
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cpi r16, 8
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breq AppStats_OnEveryMinute_sendBusyErrs
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#ifdef MODULES_HEAP
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cpi r16, 9
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breq AppStats_OnEveryMinute_sendHeapUsed
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cpi r16, 10
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breq AppStats_OnEveryMinute_sendHeapfree
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#endif
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AppStats_OnEveryMinute_sendDevice:
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rjmp AppNetwork_SendDevice
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AppStats_OnEveryMinute_sendPacketsIn:
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ldi r17, AQHOME_VALUEID_STATS_PACKETS_IN
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ldd r18, Y+NET_IFACE_OFFS_PACKETSIN_LOW
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ldd r19, Y+NET_IFACE_OFFS_PACKETSIN_HIGH
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rjmp appStatsSend16BitValue
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AppStats_OnEveryMinute_sendPacketsOut:
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ldi r17, AQHOME_VALUEID_STATS_PACKETS_OUT
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ldd r18, Y+NET_IFACE_OFFS_PACKETSOUT_LOW
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ldd r19, Y+NET_IFACE_OFFS_PACKETSOUT_HIGH
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rjmp appStatsSend16BitValue
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AppStats_OnEveryMinute_sendContentErrs:
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ldi r17, AQHOME_VALUEID_STATS_ERRS_CONTENT
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ldd r18, Y+NET_IFACE_OFFS_ERR_CONTENT_LOW
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ldd r19, Y+NET_IFACE_OFFS_ERR_CONTENT_HIGH
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rjmp appStatsSend16BitValue
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AppStats_OnEveryMinute_sendIoErrs:
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ldi r17, AQHOME_VALUEID_STATS_ERRS_IO
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ldd r18, Y+NET_IFACE_OFFS_ERR_IO_LOW
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ldd r19, Y+NET_IFACE_OFFS_ERR_IO_HIGH
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rjmp appStatsSend16BitValue
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AppStats_OnEveryMinute_sendNoBufErrs:
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ldi r17, AQHOME_VALUEID_STATS_ERRS_NOBUF
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ldd r18, Y+NET_IFACE_OFFS_ERR_NOBUF_LOW
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ldd r19, Y+NET_IFACE_OFFS_ERR_NOBUF_HIGH
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rjmp appStatsSend16BitValue
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AppStats_OnEveryMinute_sendCollisionErrs:
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ldi r17, AQHOME_VALUEID_STATS_ERRS_COLLISIONS
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ldd r18, Y+NET_IFACE_OFFS_ERR_COLLISIONS_LOW
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ldd r19, Y+NET_IFACE_OFFS_ERR_COLLISIONS_HIGH
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rjmp appStatsSend16BitValue
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AppStats_OnEveryMinute_sendBusyErrs:
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ldi r17, AQHOME_VALUEID_STATS_ERRS_BUSY
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ldd r18, Y+NET_IFACE_OFFS_ERR_BUSY_LOW
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ldd r19, Y+NET_IFACE_OFFS_ERR_BUSY_HIGH
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rjmp appStatsSend16BitValue
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#ifdef MODULES_HEAP
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AppStats_OnEveryMinute_sendHeapUsed:
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ldi r17, AQHOME_VALUEID_STATS_HEAP_USED
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lds r18, heapUsed
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lds r19, heapUsed+1
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rjmp appStatsSend16BitValue
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AppStats_OnEveryMinute_sendHeapfree:
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ldi r17, AQHOME_VALUEID_STATS_HEAP_FREE
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lds r18, heapFree
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lds r19, heapFree+1
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rjmp appStatsSend16BitValue
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#endif
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; @end
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||||
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||||
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||||
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; ---------------------------------------------------------------------------
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; @routine AppStats_OnEveryMinute @global
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;
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; @param R17 value id
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; @param R19:R18 value
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appStatsSend16BitValue:
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ldi r20, 1
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clr r21
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ldi r22, AQHOME_VALUETYPE_STATS
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rjmp Main_SendValueReport
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; @end
|
||||
|
||||
|
||||
|
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@@ -21,6 +21,10 @@
|
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utils_wait.asm
|
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utils_wait_fixed.asm
|
||||
utils_wait_pin.asm
|
||||
wait_100us.asm
|
||||
wait_10us.asm
|
||||
wait_1ms.asm
|
||||
wait_50us.asm
|
||||
watchdog.asm
|
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list.asm
|
||||
tree.asm
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
#if 0
|
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; M_IO_READ DEST, SRC
|
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.macro M_IO_READ
|
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.if @1 < 64
|
||||
@@ -27,3 +27,26 @@
|
||||
sts @0, @1
|
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.endif
|
||||
.endmacro
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
; inr DEST, SRC
|
||||
.macro inr
|
||||
.if @1 < 64
|
||||
in @0, @1
|
||||
.else
|
||||
lds @0, @1
|
||||
.endif
|
||||
.endmacro
|
||||
|
||||
|
||||
|
||||
; outr DEST, SRC
|
||||
.macro outr
|
||||
.if @0 < 64
|
||||
out @0, @1
|
||||
.else
|
||||
sts @0, @1
|
||||
.endif
|
||||
.endmacro
|
||||
|
||||
@@ -8,84 +8,10 @@
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitFor10MicroSecs @global
|
||||
;
|
||||
; wait for 10 microsecs (minus cycles for call and ret).
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitFor10MicroSecs:
|
||||
Utils_WaitNanoSecs 10000, 7, r22 ; wait for 10us (minus RCALL and RET)
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitFor50MicroSecs @global
|
||||
;
|
||||
; wait for 50 microsecs (minus cycles for call and ret).
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitFor50MicroSecs:
|
||||
Utils_WaitNanoSecs 50000, 7, r22 ; wait for 50us (minus RCALL and RET)
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitFor100MicroSecs @global
|
||||
;
|
||||
; wait for about 100 microsecs.
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitFor100MicroSecs:
|
||||
rcall Utils_WaitFor50MicroSecs
|
||||
rcall Utils_WaitFor50MicroSecs
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitFor1MilliSec @global
|
||||
;
|
||||
; wait for about 1ms.
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitFor1MilliSec:
|
||||
push r21
|
||||
ldi r21, 10
|
||||
Utils_WaitFor1MilliSec_loop:
|
||||
rcall Utils_WaitFor100MicroSecs ; (R22)
|
||||
dec r21
|
||||
brne Utils_WaitFor1MilliSec_loop
|
||||
pop r21
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitForMilliSecs @global
|
||||
;
|
||||
; wait for given amount of milliseconds
|
||||
; @param r16 number of millisecs to wait
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitForMilliSecs:
|
||||
rcall Utils_WaitFor100MicroSecs ; (R22)
|
||||
dec r16
|
||||
brne Utils_WaitForMilliSecs
|
||||
ret
|
||||
; @end
|
||||
.include "common/wait_100us.asm"
|
||||
.include "common/wait_10us.asm"
|
||||
.include "common/wait_1ms.asm"
|
||||
.include "common/wait_50us.asm"
|
||||
|
||||
|
||||
|
||||
|
||||
27
avr/common/wait_100us.asm
Normal file
27
avr/common/wait_100us.asm
Normal file
@@ -0,0 +1,27 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2023 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitFor100MicroSecs @global
|
||||
;
|
||||
; wait for about 100 microsecs.
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitFor100MicroSecs:
|
||||
rcall Utils_WaitFor50MicroSecs
|
||||
rcall Utils_WaitFor50MicroSecs
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
25
avr/common/wait_10us.asm
Normal file
25
avr/common/wait_10us.asm
Normal file
@@ -0,0 +1,25 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2023 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitFor10MicroSecs @global
|
||||
;
|
||||
; wait for 10 microsecs (minus cycles for call and ret).
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitFor10MicroSecs:
|
||||
Utils_WaitNanoSecs 10000, 7, r22 ; wait for 10us (minus RCALL and RET)
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
47
avr/common/wait_1ms.asm
Normal file
47
avr/common/wait_1ms.asm
Normal file
@@ -0,0 +1,47 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2023 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitFor1MilliSec @global
|
||||
;
|
||||
; wait for about 1ms.
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitFor1MilliSec:
|
||||
push r21
|
||||
ldi r21, 10
|
||||
Utils_WaitFor1MilliSec_loop:
|
||||
rcall Utils_WaitFor100MicroSecs ; (R22)
|
||||
dec r21
|
||||
brne Utils_WaitFor1MilliSec_loop
|
||||
pop r21
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitForMilliSecs @global
|
||||
;
|
||||
; wait for given amount of milliseconds
|
||||
; @param r16 number of millisecs to wait
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitForMilliSecs:
|
||||
rcall Utils_WaitFor100MicroSecs ; (R22)
|
||||
dec r16
|
||||
brne Utils_WaitForMilliSecs
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
24
avr/common/wait_50us.asm
Normal file
24
avr/common/wait_50us.asm
Normal file
@@ -0,0 +1,24 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2023 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine Utils_WaitFor50MicroSecs @global
|
||||
;
|
||||
; wait for 50 microsecs (minus cycles for call and ret).
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
Utils_WaitFor50MicroSecs:
|
||||
Utils_WaitNanoSecs 50000, 7, r22 ; wait for 50us (minus RCALL and RET)
|
||||
ret
|
||||
; @end
|
||||
|
||||
278
avr/devices/all/attn.asm
Normal file
278
avr/devices/all/attn.asm
Normal file
@@ -0,0 +1,278 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
; not used for now
|
||||
|
||||
|
||||
|
||||
; ***************************************************************************
|
||||
; macros
|
||||
|
||||
|
||||
.macro mAttnInitInt0
|
||||
; select falling edge of ATTN
|
||||
inr r16, MCUCR
|
||||
cbr r16, (1<<ISC01) | (1<<ISC00)
|
||||
sbr r16, (1<<ISC01) | (0<<ISC00)
|
||||
outr MCUCR, r16
|
||||
.endmacro
|
||||
|
||||
|
||||
|
||||
.macro mAttnInitPCI
|
||||
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
|
||||
ori r16, (1<<COM_IRQ_GIMSK_ATTN)
|
||||
out GIMSK, R16
|
||||
ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
|
||||
out GIFR, r16
|
||||
.endmacro
|
||||
|
||||
|
||||
|
||||
.macro mAttnEnableIrqInt0
|
||||
inr r16, COM_IRQ_ADDR_ATTN
|
||||
sbr r16, (1<<ATTN_IRQ_BIT)
|
||||
outr COM_IRQ_ADDR_ATTN, r16
|
||||
.endmacro
|
||||
|
||||
|
||||
|
||||
.macro mAttnEnableIrqPCI
|
||||
sbi COM_IRQ_ADDR_ATTN, ATTN_IRQ_BIT ; enable pin change irq for ATTN line
|
||||
.endmacro
|
||||
|
||||
|
||||
|
||||
.macro mAttnDisableIrqInt0
|
||||
inr r16, COM_IRQ_ADDR_ATTN ; disable irq for ATTN line
|
||||
cbr r16, (1<<ATTN_IRQ_BIT)
|
||||
outr COM_IRQ_ADDR_ATTN, r16
|
||||
.endmacro
|
||||
|
||||
|
||||
|
||||
.macro mAttnDisableIrqPCI
|
||||
cbi COM_IRQ_ADDR_ATTN, ATTN_IRQ_BIT ; disable pin change irq for ATTN line
|
||||
.endmacro
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
; ***************************************************************************
|
||||
; code
|
||||
|
||||
.cseg
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ATTN_Init @global
|
||||
;
|
||||
; @clobbers R16
|
||||
|
||||
ATTN_Init:
|
||||
.ifdef INT0
|
||||
.if ATTN_IRQ_BIT == INT0
|
||||
mAttnInitInt0
|
||||
.else
|
||||
mAttnInitPCI
|
||||
.endif
|
||||
.else
|
||||
mAttnInitPCI
|
||||
.endif
|
||||
|
||||
rcall ATTN_SetHighEnableIrq
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ATTN_SetLowDisableIrq @global
|
||||
;
|
||||
; @clobbers R16
|
||||
|
||||
ATTN_SetLowDisableIrq:
|
||||
.ifdef INT0
|
||||
.if ATTN_IRQ_BIT == INT0
|
||||
mAttnDisableIrqInt0
|
||||
.else
|
||||
mAttnDisableIrqPCI
|
||||
.endif
|
||||
.else
|
||||
mAttnDisableIrqPCI
|
||||
.endif
|
||||
|
||||
sbi ATTN_DDR, ATTN_PIN ; set ATTN as output
|
||||
cbi ATTN_OUTPUT, ATTN_PIN ; set ATTN low
|
||||
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ATTN_SetHighEnableIrq @global
|
||||
;
|
||||
; @clobbers R16
|
||||
|
||||
ATTN_SetHighEnableIrq:
|
||||
cbi ATTN_DDR, ATTN_PIN ; set ATTN as input
|
||||
.ifdef ATTN_PUE
|
||||
cbi ATTN_PUE, ATTN_PIN ; disable pullup on ATTN
|
||||
.else
|
||||
cbi ATTN_OUTPUT, ATTN_PIN ; disable pullup on ATTN
|
||||
.endif
|
||||
|
||||
.ifdef INT0
|
||||
.if ATTN_IRQ_BIT == INT0
|
||||
mAttnEnableIrqInt0
|
||||
.else
|
||||
mAttnEnableIrqPCI
|
||||
.endif
|
||||
.else
|
||||
mAttnEnableIrqPCI
|
||||
.endif
|
||||
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ATTN_IsHigh @global
|
||||
;
|
||||
; @return CFLAG set if ATTN is high
|
||||
; @clobbers none
|
||||
|
||||
ATTN_IsHigh:
|
||||
clc
|
||||
sbic ATTN_INPUT, ATTN_PIN ; ATTN low?
|
||||
sec ; yes, set CF
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ATTN_WaitForStateSeconds
|
||||
;
|
||||
; Wait for ATTN state max given seconds
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @param R16 expected state (0xff for high, 0 for low)
|
||||
; @param r20 maximum number of seconds to wait
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ATTN_WaitForStateSeconds:
|
||||
ATTN_WaitForStateSeconds_loop:
|
||||
push r20
|
||||
rcall ATTN_WaitForState1s ; (r20, r22)
|
||||
pop r20
|
||||
brcs ATTN_WaitForStateSeconds_gotit
|
||||
sbi LED_PIN, LED_PINNUM ; toggle (doen't work on AtMega8515)
|
||||
dec r20
|
||||
brne ATTN_WaitForStateSeconds_loop
|
||||
clc
|
||||
ATTN_WaitForStateSeconds_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ATTN_WaitForState1s
|
||||
;
|
||||
; Wait for ATTN state for max 1s
|
||||
;
|
||||
; @param R16 expected state (0xff for high, 0 for low)
|
||||
; @return CFLAG set if okay (ATTN state reached), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ATTN_WaitForState1s:
|
||||
ldi r20, 100
|
||||
ATTN_WaitForState1s_loop:
|
||||
push r20
|
||||
rcall ATTN_WaitForState10ms ; (R20, R22)
|
||||
pop r20
|
||||
brcs ATTN_WaitForState1s_gotit
|
||||
dec r20
|
||||
brne ATTN_WaitForState1s_loop
|
||||
clc
|
||||
ATTN_WaitForState1s_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ATTN_WaitForState10ms
|
||||
;
|
||||
; Wait for ATTN state for max 10 milliseconds.
|
||||
;
|
||||
; @param R16 expected state (0xff for high, 0 for low)
|
||||
; @return CFLAG set if okay (ATTN state reached), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ATTN_WaitForState10ms:
|
||||
.if clock == 8000000
|
||||
ldi r20, 80
|
||||
.endif
|
||||
.if clock == 1000000
|
||||
ldi r20, 10
|
||||
.endif
|
||||
ATTN_WaitForState10ms_loop:
|
||||
push r20
|
||||
rcall ATTN_WaitForState1000Cycles ; (r20, r22)
|
||||
pop r20
|
||||
brcs ATTN_WaitForState10ms_gotit
|
||||
dec r20
|
||||
brne ATTN_WaitForState10ms_loop
|
||||
clc
|
||||
ATTN_WaitForState10ms_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ATTN_WaitForStateState1000Cycles
|
||||
;
|
||||
; Wait for ATTN state for max 1000 clock cycles
|
||||
; (about 1ms at 1MHz, 0.125ms at 8MHz)
|
||||
;
|
||||
; @param R16 expected state (0xff for high, 0 for low)
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ATTN_WaitForState1000Cycles:
|
||||
ldi r20, 90 ; 1
|
||||
ATTN_WaitForState1000Cycles_loop:
|
||||
push r17 ; +2
|
||||
in r17, COM_ATTN_INPUT ; +1
|
||||
eor r17, r16 ; +1
|
||||
andi r17, (1<<COM_ATTN_PIN) ; +1
|
||||
pop r17 ; +2
|
||||
breq ATTN_WaitForState1000Cycles_stateReached ; +1
|
||||
dec r20 ; +1
|
||||
brne ATTN_WaitForState1000Cycles_loop ; +2
|
||||
clc
|
||||
ret
|
||||
ATTN_WaitForState1000Cycles_stateReached:
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -20,6 +20,22 @@
|
||||
.equ AQHOME_VALUETYPE_MOTION = 6
|
||||
.equ AQHOME_VALUETYPE_CO2 = 7
|
||||
.equ AQHOME_VALUETYPE_TVOC = 8
|
||||
.equ AQHOME_VALUETYPE_STATS = 9
|
||||
|
||||
|
||||
; Value Ids
|
||||
|
||||
.equ AQHOME_VALUEID_STATS_PACKETS_IN = 0xe0
|
||||
.equ AQHOME_VALUEID_STATS_PACKETS_OUT = 0xe1
|
||||
.equ AQHOME_VALUEID_STATS_ERRS_CONTENT = 0xe2
|
||||
.equ AQHOME_VALUEID_STATS_ERRS_IO = 0xe3
|
||||
.equ AQHOME_VALUEID_STATS_ERRS_NOBUF = 0xe4
|
||||
.equ AQHOME_VALUEID_STATS_ERRS_COLLISIONS = 0xe5
|
||||
.equ AQHOME_VALUEID_STATS_ERRS_BUSY = 0xe6
|
||||
.equ AQHOME_VALUEID_STATS_HEAP_USED = 0xe7
|
||||
.equ AQHOME_VALUEID_STATS_HEAP_FREE = 0xe8
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -69,25 +69,25 @@ systemSleep:
|
||||
; only modify SE, SM2, SM1 and SM0
|
||||
cli
|
||||
|
||||
M_IO_READ r16, MCUCR
|
||||
inr r16, MCUCR
|
||||
cbr r16, (1<<SE) | (1<<SM2) | (1<<SM1)
|
||||
M_IO_WRITE MCUCR, r16
|
||||
outr MCUCR, r16
|
||||
|
||||
M_IO_READ r16, EMCUCR
|
||||
inr r16, EMCUCR
|
||||
cbr r16, (1<<SM0)
|
||||
M_IO_WRITE EMCUCR, r16
|
||||
outr EMCUCR, r16
|
||||
|
||||
sei ; make sure interrupts really are enabled
|
||||
|
||||
M_IO_READ r16, MCUCR ; enable sleep mode
|
||||
inr r16, MCUCR ; enable sleep mode
|
||||
sbr r16, (1<<SE)
|
||||
M_IO_WRITE MCUCR, r16
|
||||
outr MCUCR, r16
|
||||
|
||||
sleep ; sleep, wait for interrupt
|
||||
|
||||
M_IO_READ r16, MCUCR ; disable sleep mode
|
||||
inr r16, MCUCR ; disable sleep mode
|
||||
cbr r16, (1<<SE)
|
||||
M_IO_WRITE MCUCR, r16
|
||||
outr MCUCR, r16
|
||||
|
||||
ret
|
||||
; @end
|
||||
@@ -140,13 +140,13 @@ systemSetupTimer0: ; setup timer for IRQ every 100ms
|
||||
.endif
|
||||
|
||||
.ifdef TIMSK0
|
||||
M_IO_READ r16, TIMSK0
|
||||
inr r16, TIMSK0
|
||||
sbr r16, (1<<OCIE0) ; Timer/Counter0 Output Compare Match A Interrupt Enable
|
||||
M_IO_WRITE TIMSK0, r16
|
||||
outr TIMSK0, r16
|
||||
.else
|
||||
M_IO_READ r16, TIMSK
|
||||
inr r16, TIMSK
|
||||
sbr r16, (1<<OCIE0) ; Timer/Counter0 Output Compare Match A Interrupt Enable
|
||||
M_IO_WRITE TIMSK, r16
|
||||
outr TIMSK, r16
|
||||
.endif
|
||||
|
||||
sec
|
||||
|
||||
@@ -1,11 +1,24 @@
|
||||
|
||||
<device name="aqua_c01" driver="nodes">
|
||||
<manufacturer>AQUA</manufacturer>
|
||||
<devicetype>N</devicetype>
|
||||
<devicetype>C</devicetype>
|
||||
<deviceversion>1</deviceversion>
|
||||
|
||||
<values>
|
||||
<value name="LEDTIMING" id="0x88" type="actor" dataType="uint16" />
|
||||
|
||||
<value name="stats_packets_in" id="0xe0" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_packets_out" id="0xe1" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_content_errors" id="0xe2" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_io_errors" id="0xe3" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_nobuf_errors" id="0xe4" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_collision_errors" id="0xe5" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_busy_errors" id="0xe6" type="sensor" dataType="uint16" denom="1" />
|
||||
|
||||
<value name="stats_heap_used" id="0xe7" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_heap_free" id="0xe8" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_noram_errors" id="0xe9" type="sensor" dataType="uint16" denom="1" />
|
||||
|
||||
</values>
|
||||
|
||||
</device>
|
||||
|
||||
@@ -115,16 +115,19 @@ main:
|
||||
; ***************************************************************************
|
||||
; includes
|
||||
|
||||
.include "common/utils_wait_fixed.asm"
|
||||
.include "common/wait_10us.asm"
|
||||
.include "common/utils_copy_from_flash.asm"
|
||||
.include "common/utils_copy_sdram.asm"
|
||||
|
||||
.include "modules/flash/defs.asm"
|
||||
.include "modules/flash/eeprom.asm"
|
||||
.include "modules/flash/io.asm"
|
||||
.include "modules/flash/io_attn.asm"
|
||||
;.include "modules/flash/io_attn.asm"
|
||||
.include "modules/flash/io_uart.asm"
|
||||
.include "modules/flash/io_uart_all_attn.asm"
|
||||
;.include "modules/flash/io_uart_all_attn.asm"
|
||||
|
||||
.include "modules/flash/io_uart_attn_small.asm"
|
||||
|
||||
.include "modules/flash/flash1pmega.asm"
|
||||
.include "modules/flash/flashxp.asm"
|
||||
.include "modules/flash/flashprocess.asm"
|
||||
|
||||
@@ -67,6 +67,12 @@
|
||||
.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400
|
||||
.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter
|
||||
|
||||
.equ COM_DATA_DDR = DDRD ; use RX pin
|
||||
.equ COM_DATA_INPUT = PIND
|
||||
.equ COM_DATA_OUTPUT = PORTD
|
||||
.equ COM_DATA_PIN = PORTD0
|
||||
|
||||
|
||||
.equ COM_ATTN_DDR = DDRD
|
||||
.equ COM_ATTN_INPUT = PIND
|
||||
.equ COM_ATTN_OUTPUT = PORTD
|
||||
|
||||
@@ -61,6 +61,8 @@
|
||||
#define MODULES_NETWORK
|
||||
;#define MODULES_COMONUART0
|
||||
#define MODULES_UART_HW
|
||||
;#define MODULES_UART_BITBANG
|
||||
|
||||
#define MODULES_SPI_HW
|
||||
#define MODULES_ILI9341
|
||||
;#define MODULES_FONT_8X8
|
||||
@@ -221,6 +223,6 @@ onEveryLoop:
|
||||
; defines for network interface
|
||||
|
||||
.equ netInterfaceData = netUartIface
|
||||
|
||||
;.equ netInterfaceData = uart_bitbang_iface
|
||||
|
||||
|
||||
|
||||
@@ -12,6 +12,18 @@
|
||||
<value name="SGP30_TVOC" id="0x09" type="sensor" dataType="rational" modality="tvoc" denom="1" />
|
||||
<value name="SGP30_CO2" id="0x0a" type="sensor" dataType="rational" modality="co2" denom="1" />
|
||||
|
||||
<value name="stats_packets_in" id="0xe0" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_packets_out" id="0xe1" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_content_errors" id="0xe2" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_io_errors" id="0xe3" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_nobuf_errors" id="0xe4" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_collision_errors" id="0xe5" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_busy_errors" id="0xe6" type="sensor" dataType="uint16" denom="1" />
|
||||
|
||||
<value name="stats_heap_used" id="0xe7" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_heap_free" id="0xe8" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_noram_errors" id="0xe9" type="sensor" dataType="uint16" denom="1" />
|
||||
|
||||
<value name="LEDTIMING" id="0x88" type="actor" dataType="uint16" />
|
||||
</values>
|
||||
|
||||
|
||||
@@ -12,6 +12,18 @@
|
||||
<value name="SGP30_TVOC" id="0x09" type="sensor" dataType="rational" modality="tvoc" denom="1" />
|
||||
<value name="SGP30_CO2" id="0x0a" type="sensor" dataType="rational" modality="co2" denom="1" />
|
||||
|
||||
<value name="stats_packets_in" id="0xe0" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_packets_out" id="0xe1" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_content_errors" id="0xe2" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_io_errors" id="0xe3" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_nobuf_errors" id="0xe4" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_collision_errors" id="0xe5" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_busy_errors" id="0xe6" type="sensor" dataType="uint16" denom="1" />
|
||||
|
||||
<value name="stats_heap_used" id="0xe7" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_heap_free" id="0xe8" type="sensor" dataType="uint16" denom="1" />
|
||||
<value name="stats_noram_errors" id="0xe9" type="sensor" dataType="uint16" denom="1" />
|
||||
|
||||
<value name="LEDTIMING" id="0x88" type="actor" dataType="uint16" />
|
||||
</values>
|
||||
|
||||
|
||||
@@ -13,10 +13,10 @@
|
||||
; AtTiny84
|
||||
; --------
|
||||
; VCC 1 14 GND
|
||||
; PB0 2 13 PA0 AUX-A0
|
||||
; AUX-PB2 PB0 2 13 PA0 AUX-PA0
|
||||
; PIR PB1 3 12 PA1 COM-DATA
|
||||
; /RESET PB3 4 11 PA2
|
||||
; AUX-B2 PB2 5 10 PA3 LED
|
||||
; /RESET PB3 4 11 PA2 AUX-PA2
|
||||
; PB2 5 10 PA3 LED
|
||||
; COM_ATTN PA7 6 9 PA4 TWI-SCL
|
||||
; TWI-SDA PA6 7 8 PA5
|
||||
; --------
|
||||
|
||||
@@ -55,7 +55,7 @@ bootLoader:
|
||||
sbi LED_DDR, LED_PINNUM ; out
|
||||
sbi LED_PORT, LED_PINNUM ; off
|
||||
|
||||
ldi r19, 20 ; loop count
|
||||
ldi r19, 10 ; loop count
|
||||
ldi r20, 2 ; on time
|
||||
ldi r21, 2 ; off time
|
||||
rcall bootLoaderBlinkLed
|
||||
@@ -66,13 +66,13 @@ bootLoader:
|
||||
brcc bootLoader_waitAndRestartBootLoader
|
||||
; try to start firmware
|
||||
bootLoader_startFirmware:
|
||||
ldi r19, 10 ; loop count
|
||||
ldi r19, 6 ; loop count
|
||||
ldi r20, 4 ; on time
|
||||
ldi r21, 1 ; off time
|
||||
rcall bootLoaderBlinkLed
|
||||
rjmp firmwareStart
|
||||
bootLoader_waitAndRestartBootLoader:
|
||||
ldi r19, 5 ; loop count
|
||||
ldi r19, 3 ; loop count
|
||||
ldi r20, 1 ; on time
|
||||
ldi r21, 8 ; off time
|
||||
rcall bootLoaderBlinkLed
|
||||
|
||||
170
avr/modules/flash/io_softuart.asm
Normal file
170
avr/modules/flash/io_softuart.asm
Normal file
@@ -0,0 +1,170 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
.equ UARTSOFT_WAITFORSYNCSTART = 200
|
||||
|
||||
|
||||
; ***************************************************************************
|
||||
; code
|
||||
|
||||
|
||||
.cseg
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
uartSoftWaitAndReadSyncByte:
|
||||
; wait for begin of startbit
|
||||
ldi r24, LOW(UARTSOFT_WAITFORSYNCSTART)
|
||||
ldi r25, HIGH(UARTSOFT_WAITFORSYNCSTART)
|
||||
uartSoftWaitAndReadSyncByte_loop0:
|
||||
sbis COM_DATA_INPUT, COM_DATA_PIN
|
||||
rjmp uartSoftWaitAndReadSyncByte_gotStartBit
|
||||
sbiw r25:r24, 1
|
||||
brne uartSoftWaitAndReadSyncByte_loop0
|
||||
uartSoftWaitAndReadSyncByte_error: ; timeout
|
||||
clc
|
||||
ret
|
||||
|
||||
uartSoftWaitAndReadSyncByte_gotStartBit:
|
||||
clr r25
|
||||
clr r24
|
||||
; count cycles while DATA low (count length of startBit)
|
||||
uartSoftWaitAndReadSyncByte_loopLow: ; 5 cycles per loop +3 cycles to leave loop
|
||||
sbic COM_DATA_INPUT, COM_DATA_PIN ; +2 (skip)/+1 (no skip)
|
||||
rjmp uartSoftWaitAndReadSyncByte_startDataBit1 ; +0 (skip) / +2 (no skip)
|
||||
adiw r25:r24, 1 ; +1
|
||||
brne uartSoftWaitAndReadSyncByte_loopLow ; +2
|
||||
rjmp uartSoftWaitAndReadSyncByte_error
|
||||
|
||||
uartSoftWaitAndReadSyncByte_startDataBit1:
|
||||
clr r25
|
||||
clr r24
|
||||
ldi r17, 4
|
||||
uartSoftWaitAndReadSyncByte_loopData:
|
||||
; count cycles while DATA high (count length of dataBit)
|
||||
uartSoftWaitAndReadSyncByte_loopDataHigh: ; 5 cycles per loop +3 cycles to leave loop
|
||||
sbis COM_DATA_INPUT, COM_DATA_PIN ; +2 (skip)/+1 (no skip)
|
||||
rjmp uartSoftWaitAndReadSyncByte_startLowDataBit ; +0 (skip) / +2 (no skip)
|
||||
adiw r25:r24, 1 ; +1
|
||||
brne uartSoftWaitAndReadSyncByte_loopDataHigh ; +2
|
||||
; too long LOW
|
||||
rjmp uartSoftWaitAndReadSyncByte_error
|
||||
uartSoftWaitAndReadSyncByte_startLowDataBit:
|
||||
; count cycles while DATA low (count length of dataBit)
|
||||
uartSoftWaitAndReadSyncByte_loopDataLow: ; 5 cycles per loop +3 cycles to leave loop
|
||||
sbic COM_DATA_INPUT, COM_DATA_PIN ; +2 (skip)/+1 (no skip)
|
||||
rjmp uartSoftWaitAndReadSyncByte_startHighDataBit ; +0 (skip) / +2 (no skip)
|
||||
adiw r25:r24, 1 ; +1
|
||||
brne uartSoftWaitAndReadSyncByte_loop4 ; +2
|
||||
; too long LOW
|
||||
rjmp uartSoftWaitAndReadSyncByte_error
|
||||
uartSoftWaitAndReadSyncByte_startHighDataBit:
|
||||
dec r17
|
||||
brne uartSoftWaitAndReadSyncByte_loopData
|
||||
; calc average (8 values)
|
||||
lsr r25 ; /2
|
||||
ror r24
|
||||
lsr r25 ; /4
|
||||
ror r24
|
||||
lsr r25 ; /8
|
||||
ror r24
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
uartSoftReceiveByte:
|
||||
; wait for begin of startbit
|
||||
ldi r24, LOW(UARTSOFT_WAITFORSYNCSTART)
|
||||
ldi r25, HIGH(UARTSOFT_WAITFORSYNCSTART)
|
||||
uartSoftReceiveByte_waitForBeginOfStartBit:
|
||||
sbis COM_DATA_INPUT, COM_DATA_PIN
|
||||
rjmp uartSoftReceiveByte_gotBeginOfStartBit
|
||||
sbiw r25:r24, 1
|
||||
brne uartSoftReceiveByte_waitForBeginOfStartBit
|
||||
uartSoftReceiveByte_error: ; timeout
|
||||
clc
|
||||
ret
|
||||
|
||||
uartSoftReceiveByte_gotBeginOfStartBit:
|
||||
clr r25
|
||||
clr r24
|
||||
; count cycles while DATA low (count length of startBit)
|
||||
uartSoftReceiveByte_waitForEndOfStartBit: ; 5 cycles per loop
|
||||
sbic COM_DATA_INPUT, COM_DATA_PIN ; +2 (skip)/+1 (no skip)
|
||||
rjmp uartSoftReceiveByte_gotEndOfStartBit ; +0 (skip) / +2 (no skip)
|
||||
adiw r25:r24, 1 ; +1
|
||||
brne uartSoftWaitAndReadSyncByte_loopLow ; +2
|
||||
rjmp uartSoftReceiveByte_error
|
||||
uartSoftReceiveByte_gotEndOfStartBit:
|
||||
; r25:r24=counter equivalent for length of startbit
|
||||
clr r16
|
||||
ldi r17, 8
|
||||
uartSoftReceiveByte_bitLoop:
|
||||
; TODO: receive 8bits, wait for start of endbit
|
||||
|
||||
ret
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
uartSoftCountDataLow: ; 5 cycles per loop +5 cycles outside (+3 cycles RCALL)
|
||||
sbic COM_DATA_INPUT, COM_DATA_PIN ; +2 (skip)/+1 (no skip)
|
||||
rjmp uartSoftCountDataLow_ok ; +0 (skip) / +2 (no skip)
|
||||
adiw r25:r24, 1 ; +1
|
||||
brne uartSoftCountDataLow ; +2
|
||||
clc
|
||||
ret
|
||||
uartSoftCountDataLow_ok:
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
uartSoftCountDataHigh: ; 5 cycles per loop +5 cycles outside (+3 cycles RCALL)
|
||||
sbis COM_DATA_INPUT, COM_DATA_PIN ; +2 (skip)/+1 (no skip)
|
||||
rjmp uartSoftCountDataHigh_ok ; +0 (skip) / +2 (no skip)
|
||||
adiw r25:r24, 1 ; +1
|
||||
brne uartSoftCountDataHigh ; +2
|
||||
clc
|
||||
ret
|
||||
uartSoftCountDataHigh_ok:
|
||||
sec ; +1
|
||||
ret ; +4
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
uartSoftWaitBitTime: ; 5 cycles per loop +5 cycles outside (+3 cycles RCALL)
|
||||
uartSoftWaitBitTime_loop:
|
||||
nop ; +1
|
||||
nop ; +1
|
||||
sbiw r25:r24, 1 ; +1
|
||||
brne uartSoftWaitBitTime_loop ; +2
|
||||
nop ; +1
|
||||
ret ; +4
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
@@ -259,7 +259,7 @@ ioRecvMsg:
|
||||
pop xl
|
||||
brcs ioRecvMsg_end
|
||||
ioRecvMsg_error:
|
||||
rcall ioRecvSkipMessage ; skip remainder of the message
|
||||
; rcall ioRecvSkipMessage ; skip remainder of the message
|
||||
clc
|
||||
ioRecvMsg_end:
|
||||
ret
|
||||
@@ -267,6 +267,7 @@ ioRecvMsg_end:
|
||||
|
||||
|
||||
|
||||
#if 0
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvSkipMessage
|
||||
;
|
||||
@@ -299,6 +300,7 @@ ioRecvFlush:
|
||||
M_IO_READ r16, UART_REG_UDR ; read data byte
|
||||
rjmp ioRecvFlush
|
||||
; @end
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
@@ -322,9 +324,9 @@ ioRawRecvMsg:
|
||||
; read first two bytes
|
||||
ldi r17, 2 ; 2 bytes: address byte, msg len
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
|
||||
rcall ioRawRecvBytes ; (r16, r17, r20, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
cp r16, r20 ; check size
|
||||
cp r16, r18 ; check size
|
||||
brcc ioRawRecvMsg_error
|
||||
inc r16 ; account for checksum byte
|
||||
; read remaining bytes including checksum byte
|
||||
@@ -475,7 +477,7 @@ ioRawWaitForData10ms_gotit:
|
||||
; @routine ioRawWaitForData1000Cycles
|
||||
;
|
||||
; Wait for incoming data for max 1000 clock cycles
|
||||
; (about 1ms at 1MHz, 0.125 at 8MHz)
|
||||
; (about 1ms at 1MHz, 0.125ms at 8MHz)
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
592
avr/modules/flash/io_uart_attn_small.asm
Normal file
592
avr/modules/flash/io_uart_attn_small.asm
Normal file
@@ -0,0 +1,592 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
; ***************************************************************************
|
||||
; code
|
||||
|
||||
|
||||
.cseg
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawInit
|
||||
; Send a message
|
||||
;
|
||||
; @clobbers r16, r17
|
||||
|
||||
ioRawInit:
|
||||
; set baudrate
|
||||
.if clock == 8000000
|
||||
ldi r16, 25 ; (19.2Kb/s at 8MHz)
|
||||
ldi r17, 0
|
||||
.endif
|
||||
|
||||
.if clock == 1000000
|
||||
ldi r16, 3 ; (19.2Kb/s at 1MHz)
|
||||
ldi r17, 0
|
||||
.endif
|
||||
|
||||
outr UART_REG_UBRRH, r17
|
||||
outr UART_REG_UBRRL, r16
|
||||
|
||||
; set character format (asynchronous USART, 8-bit, one stop bit, no parity)
|
||||
.ifdef URSEL
|
||||
ldi r16, (1<<URSEL) | (1<<UART_BIT_USBS) | (3<<UART_BIT_UCSZ0)
|
||||
.else
|
||||
ldi r16, (1<<UART_BIT_USBS)|(3<<UART_BIT_UCSZ0)
|
||||
.endif
|
||||
; ldi r16, (1<<UART_BIT_UCSZ0) | (1<<UART_BIT_UCSZ1)
|
||||
outr UART_REG_UCSRC, r16
|
||||
|
||||
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
|
||||
|
||||
.ifdef COM_ATTN_PUE
|
||||
inr r16, COM_ATTN_PUE
|
||||
cbr r16, COM_ATTN_PIN ; disable pullup on ATTN
|
||||
outr COM_ATTN_PUE, r16
|
||||
.else
|
||||
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
|
||||
.endif
|
||||
|
||||
ret
|
||||
;@end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsg
|
||||
; Send a message
|
||||
;
|
||||
; @clobbers r16, r17, X
|
||||
|
||||
ioRawSendMsg:
|
||||
ldi xl, LOW(flashSendBuffer)
|
||||
ldi xh, HIGH(flashSendBuffer)
|
||||
rcall ioRawSendMsgWithAttn
|
||||
brcc ioRawSendMsg
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsgWithAttn
|
||||
;
|
||||
; @param X buffer to send
|
||||
; @return CFLAG: set if okay (packet sent), cleared on error
|
||||
; @clobbers r16, r17 (X)
|
||||
|
||||
ioRawSendMsgWithAttn:
|
||||
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
|
||||
nop
|
||||
|
||||
ldi r16, 0xff ; wait for ATTN high
|
||||
ldi r20, 2 ; 2s
|
||||
rcall ioRawWaitForAttnSeconds
|
||||
brcc ioRawSendMsgWithAttn_ret
|
||||
|
||||
sbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as output
|
||||
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; set ATTN low
|
||||
|
||||
rcall ioRawWaitForOneBitLength ; wait for one bit duration (R22)
|
||||
rcall ioRawWaitForOneBitLength ; wait for one bit duration (R22)
|
||||
|
||||
rcall ioRawSendMsgHandleTransceiver ; (r16, r17, X)
|
||||
cbi COM_ATTN_DDR, COM_ATTN_PIN ; release ATTN line (by setting direction to IN)
|
||||
|
||||
ioRawSendMsgWithAttn_ret:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsgHandleTransceiver
|
||||
; Enable transceiver, send packet, disable transceiver.
|
||||
;
|
||||
; @param X buffer to send
|
||||
; @return CFLAG: set if okay (packet sent), cleared on error
|
||||
; @clobbers r16 (r17, X)
|
||||
|
||||
ioRawSendMsgHandleTransceiver:
|
||||
; enable transceiver
|
||||
inr r16, UART_REG_UCSRB
|
||||
sbr r16,(1<<UART_BIT_TXEN) ; enable transmit
|
||||
outr UART_REG_UCSRB, r16
|
||||
rcall ioRawSendMsgDirect
|
||||
; disable transceiver
|
||||
inr r16, UART_REG_UCSRB
|
||||
cbr r16,(1<<UART_BIT_TXEN) ; disable transmit
|
||||
outr UART_REG_UCSRB, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsgDirect
|
||||
; Send packet.
|
||||
;
|
||||
; @param X buffer to send
|
||||
; @return CFLAG: set if okay (packet sent), cleared on error
|
||||
; @clobbers r16, r17, X
|
||||
|
||||
ioRawSendMsgDirect:
|
||||
adiw xh:xl, 1
|
||||
ld r17, X ; read msg size
|
||||
sbiw xh:xl, 1
|
||||
ldi r16, 3 ; add DEST, LEN, CRC bytes
|
||||
add r17, r16
|
||||
ioRawSendMsgDirect_loop:
|
||||
; wait until transceiver ready
|
||||
inr r16, UART_REG_UCSRA
|
||||
sbrs r16, UART_BIT_UDRE
|
||||
rjmp ioRawSendMsgDirect_loop
|
||||
; clear TXC flag by sending a 1
|
||||
sbr r16, (1<<UART_BIT_TXC)
|
||||
outr UART_REG_UCSRA, r16
|
||||
; write byte to uart data register
|
||||
ld r16, X+
|
||||
outr UART_REG_UDR, r16
|
||||
dec r17
|
||||
brne ioRawSendMsgDirect_loop
|
||||
; wait until all data send (i.e. send buffer empty and all bits shifted out)
|
||||
ioRawSendMsgDirect_loopComplete:
|
||||
inr r16, UART_REG_UCSRA
|
||||
sbrs r16, UART_BIT_TXC
|
||||
rjmp ioRawSendMsgDirect_loopComplete
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForValidMsg
|
||||
; Wait for valid incoming msg
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r16, r17, r18 (r19, r22, X)
|
||||
|
||||
ioRawWaitForValidMsg:
|
||||
; ATTN handling
|
||||
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
|
||||
nop
|
||||
|
||||
ldi r16, 0xff ; wait for ATTN high
|
||||
ldi r20, 2 ; 2s
|
||||
rcall ioRawWaitForAttnSeconds
|
||||
brcc ioRawSendMsgWithAttn_ret
|
||||
|
||||
ldi r16, 0x00 ; wait for ATTN low
|
||||
ldi r20, 10 ; 10s
|
||||
rcall ioRawWaitForAttnSeconds
|
||||
brcc ioRawSendMsgWithAttn_ret
|
||||
|
||||
; actual receiption
|
||||
ldi xl, LOW(flashRecvBuffer)
|
||||
ldi xh, HIGH(flashRecvBuffer)
|
||||
ldi r18, FLASH_RECVBUFFER_MAXLEN-3 ; maximum accepted msglen byte
|
||||
rcall ioRecvMsgHandleReceiver ; (r16, r17, r18, r19, r20, r22)
|
||||
brcs ioRawWaitForValidMsg_packetReceived
|
||||
; ATTN handling again
|
||||
ldi r16, 0xff ; wait for ATTN high
|
||||
ldi r20, 10 ; 5s
|
||||
rcall ioRawWaitForAttnSeconds
|
||||
clc
|
||||
ret
|
||||
ioRawWaitForValidMsg_packetReceived:
|
||||
; ATTN handling again
|
||||
ldi r16, 0xff ; wait for ATTN high
|
||||
ldi r20, 10 ; 5s
|
||||
rcall ioRawWaitForAttnSeconds
|
||||
brcc ioRawWaitForValidMsg_end
|
||||
ldi xl, LOW(flashRecvBuffer)
|
||||
ldi xh, HIGH(flashRecvBuffer)
|
||||
rcall NETMSG_CheckMessageInBuffer
|
||||
ioRawWaitForValidMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvMsgHandleReceiver
|
||||
;
|
||||
; Turn receiver on, receive message, turn receiver off.
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param X buffer to receive to
|
||||
; @clobbers r16 (r17, r18, r19, r20, r22)
|
||||
|
||||
ioRecvMsgHandleReceiver:
|
||||
; enable receiver
|
||||
inr r16, UART_REG_UCSRB
|
||||
sbr r16,(1<<UART_BIT_RXEN) ; enable receive
|
||||
outr UART_REG_UCSRB, r16
|
||||
rcall ioRecvMsg
|
||||
inr r16, UART_REG_UCSRB
|
||||
cbr r16,(1<<UART_BIT_RXEN) ; disable receive
|
||||
outr UART_REG_UCSRB, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvMsg
|
||||
;
|
||||
; Wait for next message, if received check validity.
|
||||
; On error skip the currently received message.
|
||||
;
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param R20 max number of secs to wait for incoming message
|
||||
; @param X buffer to receive to
|
||||
; @clobbers (r16, r17, r18, r19, r20, r22)
|
||||
|
||||
ioRecvMsg:
|
||||
rcall ioRawRecvMsg ; (r16, r17, r18, r19, r20, r22)
|
||||
brcc ioRecvMsg_error
|
||||
push xl
|
||||
push xh
|
||||
rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
|
||||
pop xh
|
||||
pop xl
|
||||
brcs ioRecvMsg_end
|
||||
ioRecvMsg_error:
|
||||
; rcall ioRecvSkipMessage ; skip remainder of the message
|
||||
clc
|
||||
ioRecvMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvMsg
|
||||
;
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param X buffer to receive to
|
||||
; @clobbers r16, r17, r19 (r18, r20, r22)
|
||||
|
||||
ioRawRecvMsg:
|
||||
inr r19, UART_REG_UCSRA
|
||||
cbr r19, (1<<UART_BIT_FE) | (1<<UART_BIT_DOR) | (1<<UART_BIT_UPE)
|
||||
outr UART_REG_UCSRA, r19 ; clear errors
|
||||
; wait for begin of message
|
||||
rcall ioRawWaitForData1s ; (r20, r22)
|
||||
brcc ioRawRecvMsg_end
|
||||
clr r19 ; bytecounter
|
||||
; read first two bytes
|
||||
ldi r17, 2 ; 2 bytes: address byte, msg len
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r20, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
cp r16, r18 ; check size
|
||||
brcc ioRawRecvMsg_error
|
||||
inc r16 ; account for checksum byte
|
||||
; read remaining bytes including checksum byte
|
||||
mov r17, r16
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
sub xl, r19 ; let X point back to begin of message
|
||||
sbc xh, r19
|
||||
add xh, r19
|
||||
sec
|
||||
ret
|
||||
ioRawRecvMsg_error:
|
||||
clc
|
||||
ioRawRecvMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvBytes
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @return r16 last byte received
|
||||
; @param r17 number of bytes to read
|
||||
; @param x buffer to receive to
|
||||
; @clobbers r16, r17 (r20, r22)
|
||||
|
||||
ioRawRecvBytes:
|
||||
rcall ioRawRecvByteWithin10ms ; (r20, r22)
|
||||
brcc ioRawRecvBytes_end
|
||||
st X+, r16
|
||||
dec r17
|
||||
brne ioRawRecvBytes
|
||||
sec
|
||||
ioRawRecvBytes_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvByteWithin10ms
|
||||
;
|
||||
; Wait up to 10ms for incoming byte and read it.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @return r16 byte received (if CFLAG set)
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawRecvByteWithin10ms:
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
brcc ioRawRecvByteWithin10ms_end
|
||||
inr r16, UART_REG_UCSRA ; check for errors
|
||||
andi r16, (1<<UART_BIT_FE) | (1<<UART_BIT_DOR) | (1<<UART_BIT_UPE)
|
||||
brne ioRawRecvByteWithin10ms_error
|
||||
inr r16, UART_REG_UDR ; read data byte
|
||||
sec
|
||||
ret
|
||||
ioRawRecvByteWithin10ms_error:
|
||||
clc
|
||||
ioRawRecvByteWithin10ms_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForDataSeconds
|
||||
;
|
||||
; Wait for incoming data for max given seconds
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @param r20 maximum number of seconds to wait
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForDataSeconds:
|
||||
ioRawWaitForDataSeconds_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1s ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForDataSeconds_gotit
|
||||
sbi LED_PIN, LED_PINNUM ; toggle (doen't work on AtMega8515)
|
||||
dec r20
|
||||
brne ioRawWaitForDataSeconds_loop
|
||||
clc
|
||||
ioRawWaitForDataSeconds_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1s
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1s:
|
||||
ldi r20, 100
|
||||
ioRawWaitForData1s_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData1s_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData1s_loop
|
||||
clc
|
||||
ioRawWaitForData1s_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData10ms
|
||||
;
|
||||
; Wait for incoming data for max 10 milliseconds.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData10ms:
|
||||
.if clock == 8000000
|
||||
ldi r20, 80
|
||||
.endif
|
||||
.if clock == 1000000
|
||||
ldi r20, 10
|
||||
.endif
|
||||
ioRawWaitForData10ms_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1000Cycles ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData10ms_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData10ms_loop
|
||||
clc
|
||||
ioRawWaitForData10ms_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1000Cycles
|
||||
;
|
||||
; Wait for incoming data for max 1000 clock cycles
|
||||
; (about 1ms at 1MHz, 0.125ms at 8MHz)
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1000Cycles:
|
||||
ldi r20, 140 ; 1
|
||||
ioRawWaitForData_loop:
|
||||
inr r22, UART_REG_UCSRA ; 2
|
||||
sbrc r22, UART_BIT_RXC ; 2/3
|
||||
rjmp ioRawWaitForData_gotit ; 2
|
||||
dec r20 ; 1
|
||||
brne ioRawWaitForData_loop ; 1/2 -> 7 per loop, max about 1000
|
||||
clc ; 1
|
||||
ret ; 4
|
||||
ioRawWaitForData_gotit:
|
||||
sec ; 1
|
||||
ret ; 4
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForAttnSeconds
|
||||
;
|
||||
; Wait for ATTN state max given seconds
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @param R16 expected state (0xff for high, 0 for low)
|
||||
; @param r20 maximum number of seconds to wait
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForAttnSeconds:
|
||||
ioRawWaitForAttnSeconds_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForAttn1s ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForAttnSeconds_gotit
|
||||
sbi LED_PIN, LED_PINNUM ; toggle (doen't work on AtMega8515)
|
||||
dec r20
|
||||
brne ioRawWaitForAttnSeconds_loop
|
||||
clc
|
||||
ioRawWaitForAttnSeconds_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForAttn1s
|
||||
;
|
||||
; Wait for ATTN state for max 1s
|
||||
;
|
||||
; @param R16 expected state (0xff for high, 0 for low)
|
||||
; @return CFLAG set if okay (ATTN state reached), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForAttn1s:
|
||||
ldi r20, 100
|
||||
ioRawWaitForAttn1s_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForAttn10ms ; (R20, R22)
|
||||
pop r20
|
||||
brcs ioRawWaitForAttn1s_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForAttn1s_loop
|
||||
clc
|
||||
ioRawWaitForAttn1s_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForAttn10ms
|
||||
;
|
||||
; Wait for ATTN state for max 10 milliseconds.
|
||||
;
|
||||
; @param R16 expected state (0xff for high, 0 for low)
|
||||
; @return CFLAG set if okay (ATTN state reached), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForAttn10ms:
|
||||
.if clock == 8000000
|
||||
ldi r20, 80
|
||||
.endif
|
||||
.if clock == 1000000
|
||||
ldi r20, 10
|
||||
.endif
|
||||
ioRawWaitForAttn10ms_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForAttn1000Cycles ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForAttn10ms_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForAttn10ms_loop
|
||||
clc
|
||||
ioRawWaitForAttn10ms_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForAttnState1000Cycles
|
||||
;
|
||||
; Wait for ATTN state for max 1000 clock cycles
|
||||
; (about 1ms at 1MHz, 0.125ms at 8MHz)
|
||||
;
|
||||
; @param R16 expected state (0xff for high, 0 for low)
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForAttn1000Cycles:
|
||||
ldi r20, 90 ; 1
|
||||
ioRawWaitForAttn1000Cycles_loop:
|
||||
push r17 ; +2
|
||||
in r17, COM_ATTN_INPUT ; +1
|
||||
eor r17, r16 ; +1
|
||||
andi r17, (1<<COM_ATTN_PIN) ; +1
|
||||
pop r17 ; +2
|
||||
breq ioRawWaitForAttn1000Cycles_stateReached ; +1
|
||||
dec r20 ; +1
|
||||
brne ioRawWaitForAttn1000Cycles_loop ; +2
|
||||
clc
|
||||
ret
|
||||
ioRawWaitForAttn1000Cycles_stateReached:
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForOneBitLength
|
||||
;
|
||||
; wait for one bit length (minus cycles for call and ret).
|
||||
;
|
||||
; @clobbers r22
|
||||
|
||||
ioRawWaitForOneBitLength:
|
||||
Utils_WaitNanoSecs COM_BIT_LENGTH, 7, r22 ; wait for one bit duration (minus RCALL/RET)
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -7,16 +7,27 @@
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
; Needed vars:
|
||||
; - HEAP_START
|
||||
; - HEAP_SIZE
|
||||
|
||||
|
||||
.equ HEAP_HEADER_BIT_USED = 1
|
||||
; ***************************************************************************
|
||||
; defines
|
||||
|
||||
|
||||
|
||||
.equ HEAP_HEADER_BIT_USED = 0
|
||||
|
||||
|
||||
|
||||
; ***************************************************************************
|
||||
; data
|
||||
|
||||
.dseg
|
||||
|
||||
|
||||
heapPtr: .byte 2
|
||||
heapUsed: .byte 2
|
||||
heapFree: .byte 2
|
||||
@@ -24,6 +35,8 @@ heapDblFree: .byte 1
|
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|
||||
|
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|
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; ***************************************************************************
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||||
; code
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||||
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.cseg
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@@ -43,7 +56,7 @@ Heap_Init:
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||||
st X+, r16 ; write start header
|
||||
st X+, r16
|
||||
sts heapPtr, xl ; store global vars
|
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sts heapPtr+1, xl
|
||||
sts heapPtr+1, xh
|
||||
sts heapFree, r24
|
||||
sts heapFree+1, r25
|
||||
st X+, r24 ; store header of first chunk
|
||||
@@ -80,9 +93,10 @@ heapAllocFirstFit_loop:
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||||
mov r16, r18 ; heap end reached?
|
||||
or r16, r19
|
||||
breq heapAllocFirstFit_memFull
|
||||
sbrc r17, HEAP_HEADER_BIT_USED
|
||||
sbrc r18, HEAP_HEADER_BIT_USED
|
||||
rjmp heapAllocFirstFit_next ; jump if used
|
||||
; current chunk free, check size
|
||||
andi r18, 0xfc
|
||||
mov r16, r18
|
||||
mov r17, r19
|
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sub r16, r24
|
||||
@@ -92,6 +106,7 @@ heapAllocFirstFit_loop:
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sec
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||||
ret
|
||||
heapAllocFirstFit_next:
|
||||
andi r18, 0xfc
|
||||
add xl, r18
|
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adc xh, r19
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adiw xh:xl, 2 ; skip footer
|
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@@ -215,15 +230,20 @@ heapCoalecseUp:
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||||
; read footer of preceeding chunk
|
||||
ld r25, -X
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ld r24, -X
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||||
; R25:R24=footer of preceeding chunk (i.e. size of previous chunk)
|
||||
; R25:R24=footer of preceeding chunk (i.e. size of previous chunk), X points to previous footer
|
||||
mov r16, r24 ; check: beginning of heap reached (header==0x0000)?
|
||||
or r16, r25
|
||||
breq heapCoalecseUp_ret ; yes, jump
|
||||
sbrc r24, HEAP_HEADER_BIT_USED ; block used?
|
||||
rjmp heapCoalecseUp_ret ; jump if used
|
||||
; previous chunk also free, coalesce, X points to current chunk header
|
||||
adiw xh:xl, 2
|
||||
; skip footer
|
||||
ld r16, X+
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||||
ld r17, X+
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||||
sbrc r16, HEAP_HEADER_BIT_USED ; current block used?
|
||||
rjmp heapCoalecseUp_ret ; jump if used
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||||
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||||
; X now points to beginning of current chunk's data, R17:r16=size of current chunk, R25:R24=size of previous chunk
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||||
; to go to start of previous chunk header: sub this chunk header, previous chunk footer, previous chunk header and previous data
|
||||
sbiw xh:xl, 6
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@@ -260,10 +280,10 @@ heapCoalecseUp_ret:
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; @clobbers
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|
||||
heapUseChunk:
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||||
push xh
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push xl
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push xl
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push xh
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tst r17
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breq heapUseChunk_split
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brne heapUseChunk_split
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cpi r16, 8 ; at least 8 bytes left?
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brcs heapUseChunk_directAlloc ; nope, use full chunk
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heapUseChunk_split:
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@@ -84,6 +84,7 @@ ILI9341_Init:
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mov r0, r16
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mov r1, r16
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#if 0
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; set Xpos
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ldi r16, LOW(100)
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mov r4, r16
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@@ -129,6 +130,7 @@ ILI9341_Init:
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||||
ldi r16, 'E'
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||||
rcall ili9341_WriteCharacterX4At
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||||
#endif
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sec
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ret
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@@ -142,3 +142,132 @@ ili9341JumpToFontRenderFn:
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; ---------------------------------------------------------------------------
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; @routine textNibbleToAscii
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;
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||||
; Convert a nibble to an ASCII char.
|
||||
; @return R16 ASCII representation of that nibble (e.g. '0' for 0)
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; @param R16 byte (in bits 0-3)
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; @clobbers r16, r17
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textNibbleToAscii:
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andi r16, 0xf
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cpi r16, 10
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brcs textNibbleToAscii_l1
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ldi r17, 7
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add r16, r17
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textNibbleToAscii_l1:
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ldi r17, '0'
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add r16, r17
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ili9341_WriteCharacterX4At
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; @param R16 byte to write
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; @param r5:r4 X
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; @param r7:r6 Y
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; @param r1:r0 background color
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; @param r3:r2 foreground color
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; @param Z pointer to font (byte address for LPM!)
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||||
; @param X pointer to RAM to store data to
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; @return r5:r4 new X (advanced by character width)
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; @clobbers r16, r17, r18, r19, r24, r25, x, z
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||||
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||||
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ili9341_WriteHexByte:
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||||
push r16
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||||
swap r16
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rcall textNibbleToAscii ; write high nibble (r16, r17)
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||||
push xl
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push xh
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rcall ili9341_WriteCharacterX2At ; (r16, r17, r18, r19, r20, r24, r25, x, z)
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pop xh
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||||
pop xl
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||||
pop r16
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rcall textNibbleToAscii ; write high nibble (r16, r17)
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||||
rcall ili9341_WriteCharacterX2At ; (r16, r17, r18, r19, r20, r24, r25, x, z)
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ret
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; @end
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Debug_WriteHexByte:
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push r16
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; set Xpos
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ldi r16, LOW(50)
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mov r4, r16
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ldi r16, HIGH(50)
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mov r5, r16
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; setYpos
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ldi r16, LOW(200)
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mov r6, r16
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ldi r16, HIGH(200)
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mov r7, r16
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; set font pos
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ldi zl, LOW(font2_6x8*2)
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ldi zh, HIGH(font2_6x8*2)
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; set buffer pos
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; ldi xl, LOW(ILI9341_buffer)
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; ldi xh, HIGH(ILI9341_buffer)
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ldi xl, LOW(0x260)
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ldi xh, HIGH(0x260)
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pop r16
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rjmp ili9341_WriteHexByte
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; @param X=ptr
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; @param r17 size
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Debug_WriteHexBuffer:
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; set Xpos
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ldi r16, LOW(50)
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mov r4, r16
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ldi r16, HIGH(50)
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mov r5, r16
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; setYpos
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ldi r16, LOW(200)
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mov r6, r16
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ldi r16, HIGH(200)
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||||
mov r7, r16
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; set foreground color
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ldi r16, 0b00000000 ; black
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mov r2, r16
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||||
mov r3, r16
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||||
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||||
; set font
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||||
ldi zl, LOW(font2_6x8*2)
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ldi zh, HIGH(font2_6x8*2)
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||||
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||||
Debug_WriteHexBuffer_loop:
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||||
push r17
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||||
ld r16, X+
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||||
push xl
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||||
push xh
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||||
ldi xl, LOW(0x260)
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||||
ldi xh, HIGH(0x260)
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||||
rcall ili9341_WriteHexByte
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||||
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||||
ldi r16, 32
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rcall ili9341_WriteCharacterX2At ; (r16, r17, r18, r19, r24, r25, x, z)
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||||
pop xh
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||||
pop xl
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||||
pop r17
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dec r17
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brne Debug_WriteHexBuffer_loop
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ret
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@@ -11,37 +11,42 @@
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#define AQH_AVR_WIN_H
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; tree/list info
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.equ WID_OFFS_TREE = 0
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; tree/list data
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.equ OBJ_OFFS_TREE = 0
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; signal handler
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||||
.equ WID_OFFS_HANDLERFN_LO = WID_OFFS_TREE+TREE_SIZE
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.equ WID_OFFS_HANDLERFN_HI = WID_OFFS_HANDLERFN_LO+1
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; object data
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||||
.equ OBJ_OFFS_OBJECT = OBJ_OFFS_TREE+TREE_SIZE
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.equ OBJ_OFFS_HANDLERFN_LO = OBJ_OFFS_OBJECT
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.equ OBJ_OFFS_HANDLERFN_HI = OBJ_OFFS_OBJECT+1
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.equ OBJ_OFFS_LINKS_LO = OBJ_OFFS_OBJECT+2
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.equ OBJ_OFFS_LINKS_HI = OBJ_OFFS_OBJECT+3
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.equ OBJ_OFFS_TIMERS_LO = OBJ_OFFS_OBJECT+4
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.equ OBJ_OFFS_TIMERS_HI = OBJ_OFFS_OBJECT+5
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.equ OBJ_OFFS_OPTIONS = OBJ_OFFS_OBJECT+6
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.equ OBJ_OFFS_SIZE = OBJ_OFFS_OBJECT+7
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; widget description
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.equ WID_OFFS_WIDGET_INFO = WID_OFFS_HANDLERFN_HI+1
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.equ WID_OFFS_OPTIONS1 = WID_OFFS_WIDGET_INFO+0
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.equ WID_OFFS_OPTIONS2 = WID_OFFS_WIDGET_INFO+1
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.equ WID_OFFS_ABS_X_LO = WID_OFFS_WIDGET_INFO+2
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.equ WID_OFFS_ABS_X_HI = WID_OFFS_WIDGET_INFO+3
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.equ WID_OFFS_ABS_Y_LO = WID_OFFS_WIDGET_INFO+4
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.equ WID_OFFS_ABS_Y_HI = WID_OFFS_WIDGET_INFO+5
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.equ WID_OFFS_REL_X_LO = WID_OFFS_WIDGET_INFO+6
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.equ WID_OFFS_REL_X_HI = WID_OFFS_WIDGET_INFO+7
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.equ WID_OFFS_REL_Y_LO = WID_OFFS_WIDGET_INFO+8
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.equ WID_OFFS_REL_Y_HI = WID_OFFS_WIDGET_INFO+9
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.equ WID_OFFS_WIDTH_LO = WID_OFFS_WIDGET_INFO+10
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.equ WID_OFFS_WIDTH_HI = WID_OFFS_WIDGET_INFO+11
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.equ WID_OFFS_HEIGHT_LO = WID_OFFS_WIDGET_INFO+12
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.equ WID_OFFS_HEIGHT_HI = WID_OFFS_WIDGET_INFO+13
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.equ WID_OFFS_BG_COL_LO = WID_OFFS_WIDGET_INFO+14
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.equ WID_OFFS_BG_COL_HI = WID_OFFS_WIDGET_INFO+15
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.equ WID_OFFS_FG_COL_LO = WID_OFFS_WIDGET_INFO+16
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.equ WID_OFFS_FG_COL_HI = WID_OFFS_WIDGET_INFO+17
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||||
.equ WID_OFFS_FONT_LO = WID_OFFS_WIDGET_INFO+18
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||||
.equ WID_OFFS_FONT_HI = WID_OFFS_WIDGET_INFO+19
|
||||
; widget data
|
||||
.equ WID_OFFS_WIDGET = OBJ_OFFS_SIZE
|
||||
.equ WID_OFFS_OPTIONS1 = WID_OFFS_WIDGET+0
|
||||
.equ WID_OFFS_OPTIONS2 = WID_OFFS_WIDGET+1
|
||||
.equ WID_OFFS_ABS_X = WID_OFFS_WIDGET+2
|
||||
.equ WID_OFFS_ABS_Y = WID_OFFS_WIDGET+3
|
||||
.equ WID_OFFS_REL_X = WID_OFFS_WIDGET+4
|
||||
.equ WID_OFFS_REL_Y = WID_OFFS_WIDGET+5
|
||||
.equ WID_OFFS_WIDTH = WID_OFFS_WIDGET+6
|
||||
.equ WID_OFFS_HEIGHT = WID_OFFS_WIDGET+7
|
||||
.equ WID_OFFS_BG_COL_LO = WID_OFFS_WIDGET+8
|
||||
.equ WID_OFFS_BG_COL_HI = WID_OFFS_WIDGET+9
|
||||
.equ WID_OFFS_FG_COL_LO = WID_OFFS_WIDGET+10
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||||
.equ WID_OFFS_FG_COL_HI = WID_OFFS_WIDGET+11
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||||
.equ WID_OFFS_FONT_LO = WID_OFFS_WIDGET+12
|
||||
.equ WID_OFFS_FONT_HI = WID_OFFS_WIDGET+13
|
||||
.equ WID_OFFS_BORDER_TOP = WID_OFFS_WIDGET+14
|
||||
.equ WID_OFFS_BORDER_BOT = WID_OFFS_WIDGET+15
|
||||
.equ WID_OFFS_BORDER_LEFT = WID_OFFS_WIDGET+16
|
||||
.equ WID_OFFS_BORDER_RIGHT = WID_OFFS_WIDGET+17
|
||||
|
||||
.equ WID_SIZE = WID_OFFS_WIDGET_INFO+20
|
||||
.equ WID_SIZE = WID_OFFS_WIDGET+18
|
||||
|
||||
|
||||
|
||||
@@ -51,11 +56,58 @@
|
||||
.equ WID_OPTIONS1_BIT_STRETCH_X = 2
|
||||
.equ WID_OPTIONS1_BIT_STRETCH_Y = 3
|
||||
|
||||
.equ WID_OPTIONS1_BIT_ALIGN_LEFT = 4
|
||||
.equ WID_OPTIONS1_BIT_ALIGN_RIGHT = 5
|
||||
.equ WID_OPTIONS1_BIT_ALIGN_RIGHT = 4
|
||||
.equ WID_OPTIONS1_BIT_ALIGN_BOTTOM = 5
|
||||
|
||||
.equ WID_OPTIONS1_BIT_EQUAL_WIDTH = 6
|
||||
.equ WID_OPTIONS1_BIT_EQUAL_HEIGHT = 7
|
||||
|
||||
|
||||
; Signals
|
||||
|
||||
.equ OBJ_SIGNAL_CREATED = 0
|
||||
.equ OBJ_SIGNAL_DESTROY = 1
|
||||
.equ OBJ_SIGNAL_GETVALUE = 2
|
||||
.equ OBJ_SIGNAL_SETVALUE = 3
|
||||
.equ OBJ_SIGNAL_TIMER = 4
|
||||
.equ OBJ_SIGNAL_NEXTFREE = 5
|
||||
|
||||
.equ WID_SIGNAL_SHOW = OBJ_SIGNAL_NEXTFREE
|
||||
.equ WID_SIGNAL_HIDE = OBJ_SIGNAL_NEXTFREE+1
|
||||
.equ WID_SIGNAL_UPDATE = OBJ_SIGNAL_NEXTFREE+2
|
||||
.equ WID_SIGNAL_LAYOUT = OBJ_SIGNAL_NEXTFREE+3
|
||||
.equ WID_SIGNAL_TOUCH = OBJ_SIGNAL_NEXTFREE+4
|
||||
.equ WID_SIGNAL_MOUSE = OBJ_SIGNAL_NEXTFREE+5
|
||||
.equ WID_SIGNAL_KEY = OBJ_SIGNAL_NEXTFREE+6
|
||||
.equ WID_SIGNAL_NEXTFREE = OBJ_SIGNAL_NEXTFREE+7
|
||||
|
||||
|
||||
|
||||
; Links
|
||||
|
||||
.equ OBJ_LINK_OFFS_LIST = 0
|
||||
.equ OBJ_LINK_OFFS_SIGNAL = LIST_SIZE
|
||||
.equ OBJ_LINK_OFFS_SLOT = LIST_SIZE+1
|
||||
.equ OBJ_LINK_OFFS_TARGET_LO = LIST_SIZE+2
|
||||
.equ OBJ_LINK_OFFS_TARGET_HI = LIST_SIZE+3
|
||||
.equ OBJ_LINK_SIZE = LIST_SIZE+4
|
||||
; fns:
|
||||
; - removeLinksTo()
|
||||
; - addLink()
|
||||
; - removeLinks()
|
||||
|
||||
|
||||
|
||||
.equ TIMER_OFFS_LIST = 0
|
||||
.equ TIMER_OFFS_TIMER = LIST_SIZE
|
||||
.equ TIMER_OFFS_VALUE_LO = TIMER_OFFS_TIMER
|
||||
.equ TIMER_OFFS_VALUE_LO = TIMER_OFFS_TIMER+1
|
||||
.equ TIMER_OFFS_RELOAD_LO = TIMER_OFFS_TIMER+2
|
||||
.equ TIMER_OFFS_RELOAD_HI = TIMER_OFFS_TIMER+3
|
||||
.equ TIMER_OFFS_OPTIONS = TIMER_OFFS_TIMER+4
|
||||
.equ TIMER_SIZE = TIMER_OFFS_TIMER+5
|
||||
|
||||
|
||||
.equ WID_OPTIONS1_BIT_ALIGN_TOP = 6
|
||||
.equ WID_OPTIONS1_BIT_ALIGN_BOTTOM = 7
|
||||
|
||||
|
||||
#endif ; AQH_AVR_WIN_H
|
||||
|
||||
@@ -93,13 +93,13 @@ SPIHW_MasterStart:
|
||||
sbrc r16, SPIHW_MODE_SPEED1_BIT
|
||||
sbr r17, (1<<SPR1)
|
||||
sbr r17, (1<<SPE) | (1<<MSTR)
|
||||
M_IO_WRITE SPCR, r17
|
||||
outr SPCR, r17
|
||||
|
||||
; setup SPSR
|
||||
clr r17
|
||||
sbrc r16, SPIHW_MODE_DOUBLESPEED_BIT
|
||||
sbr r17, (1<<SPI2X)
|
||||
M_IO_WRITE SPSR, r17
|
||||
outr SPSR, r17
|
||||
|
||||
ret
|
||||
; @end
|
||||
@@ -115,9 +115,9 @@ SPIHW_MasterStart:
|
||||
|
||||
SPIHW_MasterStop:
|
||||
; sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN ; SS high
|
||||
M_IO_READ r16, SPCR
|
||||
inr r16, SPCR
|
||||
cbr r16, (1<<SPE)
|
||||
M_IO_WRITE SPCR, r16
|
||||
outr SPCR, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
@@ -176,7 +176,7 @@ SPIHW_MasterTransfer:
|
||||
; @clobbers none
|
||||
|
||||
SPIHW_MasterSendByte:
|
||||
M_IO_WRITE SPDR, r16
|
||||
outr SPDR, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
@@ -191,10 +191,10 @@ SPIHW_MasterSendByte:
|
||||
; @clobbers none
|
||||
|
||||
SPIHW_WaitForTransferComplete:
|
||||
M_IO_READ r16, SPSR
|
||||
inr r16, SPSR
|
||||
sbrs r16, SPIF
|
||||
rjmp SPIHW_WaitForTransferComplete
|
||||
M_IO_READ r16, SPDR
|
||||
inr r16, SPDR
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
@@ -23,10 +23,13 @@
|
||||
ATTN_Init:
|
||||
.ifdef INT0
|
||||
.if COM_IRQ_BIT_ATTN == INT0
|
||||
M_IO_READ r16, MCUCR
|
||||
inr r16, MCUCR
|
||||
cbr r16, (1<<ISC01) | (1<<ISC00)
|
||||
sbr r16, (1<<ISC01) | (0<<ISC00) ; falling edge of ATTN
|
||||
outr MCUCR, r16
|
||||
; sbr r16, (0<<ISC01) | (0<<ISC00) ; low level triggers
|
||||
.endif
|
||||
.endif
|
||||
|
||||
rcall ATTN_SetHighEnableIrq
|
||||
|
||||
@@ -44,9 +47,9 @@ ATTN_Init:
|
||||
ATTN_SetLowDisableIrq:
|
||||
.ifdef INT0
|
||||
.if COM_IRQ_BIT_ATTN == INT0
|
||||
M_IO_READ r16, COM_IRQ_ADDR_ATTN ; disable irq for ATTN line
|
||||
inr r16, COM_IRQ_ADDR_ATTN ; disable irq for ATTN line
|
||||
cbr r16, (1<<COM_IRQ_BIT_ATTN)
|
||||
M_IO_WRITE COM_IRQ_ADDR_ATTN, r16
|
||||
outr COM_IRQ_ADDR_ATTN, r16
|
||||
.endif
|
||||
.endif
|
||||
|
||||
@@ -73,9 +76,9 @@ ATTN_SetHighEnableIrq:
|
||||
|
||||
.ifdef INT0
|
||||
.if COM_IRQ_BIT_ATTN == INT0
|
||||
M_IO_READ r16, COM_IRQ_ADDR_ATTN ; enable irq for ATTN line
|
||||
inr r16, COM_IRQ_ADDR_ATTN ; enable irq for ATTN line
|
||||
sbr r16, (1<<COM_IRQ_BIT_ATTN)
|
||||
M_IO_WRITE COM_IRQ_ADDR_ATTN, r16
|
||||
outr COM_IRQ_ADDR_ATTN, r16
|
||||
.endif
|
||||
.endif
|
||||
|
||||
|
||||
@@ -171,6 +171,10 @@ netUartRecvPacket_haveBuf:
|
||||
rcall UART_StopRx ; (R16)
|
||||
sec
|
||||
ret
|
||||
netUartRecvPacket_noAddMsg:
|
||||
rcall NET_Buffer_ReleaseByNum ; (R16, X)
|
||||
ldi r16, NET_IFACE_OFFS_ERR_MISSED_LOW
|
||||
rjmp netUartRecvPacket_incCounterRet
|
||||
netUartRecvPacket_releaseBufRet:
|
||||
rcall NET_Buffer_ReleaseByNum ; (R16, X)
|
||||
ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
|
||||
@@ -212,13 +216,14 @@ netUartRecvPacketIntoX:
|
||||
sec
|
||||
ret
|
||||
netUartRecvPacketIntoX_handleError:
|
||||
mov r17, r16
|
||||
cpi r17, UART_ERROR_IO
|
||||
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
|
||||
breq netUartRecvPacketIntoX_incCounterRetNc
|
||||
cpi r17, UART_ERROR_CONTENT
|
||||
cpi r16, UART_ERROR_IO
|
||||
breq netUartRecvPacketIntoX_ioError
|
||||
cpi r16, UART_ERROR_CONTENT
|
||||
breq netUartRecvPacketIntoX_contentError
|
||||
rjmp netUartRecvPacketIntoX_retNc
|
||||
netUartRecvPacketIntoX_ioError:
|
||||
ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
|
||||
rjmp netUartRecvPacketIntoX_incCounterRetNc
|
||||
netUartRecvPacketIntoX_contentError:
|
||||
ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
|
||||
netUartRecvPacketIntoX_incCounterRetNc:
|
||||
|
||||
@@ -38,16 +38,17 @@ UART_Init:
|
||||
ldi r17, 0
|
||||
.endif
|
||||
|
||||
M_IO_WRITE UBRRH, r17
|
||||
M_IO_WRITE UBRRL, r16
|
||||
outr UBRRH, r17
|
||||
outr UBRRL, r16
|
||||
|
||||
; set character format
|
||||
.ifdef URSEL
|
||||
ldi r16, (1<<URSEL) | (1<<USBS) | (1<<UCSZ1) | (1<<UCSZ0)
|
||||
; ldi r16, (1<<URSEL) | (1<<USBS) | (1<<UCSZ1) | (1<<UCSZ0)
|
||||
ldi r16, (1<<URSEL) | (1<<USBS) | (3<<UCSZ0)
|
||||
.else
|
||||
ldi r16, (1<<USBS) | (1<<UCSZ1) | (1<<UCSZ0)
|
||||
.endif
|
||||
M_IO_WRITE UCSRC, r16
|
||||
outr UCSRC, r16
|
||||
|
||||
ret
|
||||
; @end
|
||||
@@ -69,16 +70,16 @@ UART_SendBytes:
|
||||
|
||||
; send bytes
|
||||
UART_SendBytes_loop1:
|
||||
M_IO_READ r16, UCSRA
|
||||
inr r16, UCSRA
|
||||
sbrs r16, UDRE
|
||||
rjmp UART_SendBytes_loop1
|
||||
ld r16, X+
|
||||
M_IO_WRITE UDR, r16
|
||||
outr UDR, r16
|
||||
dec r17
|
||||
brne UART_SendBytes_loop1
|
||||
; wait until all data sent
|
||||
UART_SendBytes_loop2:
|
||||
M_IO_READ r16, UCSRA
|
||||
inr r16, UCSRA
|
||||
sbrs r16, TXC
|
||||
rjmp UART_SendBytes_loop2
|
||||
rcall UART_StopTx
|
||||
@@ -100,7 +101,7 @@ UART_SendBytes_secRet:
|
||||
UART_RecvPacket:
|
||||
cpi r17, 3
|
||||
brcs UART_RecvPacket_invalid
|
||||
rcall uartRecvByteWithin10ms ; recv destination address
|
||||
rcall uartRecvByteWithin10ms ; recv destination address (R16)
|
||||
brcc UART_RecvPacket_ioError
|
||||
cp r16, r18
|
||||
breq UART_RecvPacket_forMe
|
||||
@@ -158,10 +159,10 @@ uartRecvByteWithin10ms:
|
||||
pop r22
|
||||
pop r20
|
||||
brcc uartRecvByteWithin10ms_end
|
||||
M_IO_READ r16, UCSRA ; check for errors
|
||||
inr r16, UCSRA ; check for errors
|
||||
andi r16, (1<<FE) | (1<<DOR)
|
||||
brne uartRecvByteWithin10ms_error
|
||||
M_IO_READ r16, UDR ; read data byte
|
||||
inr r16, UDR ; read data byte
|
||||
sec
|
||||
ret
|
||||
uartRecvByteWithin10ms_error:
|
||||
@@ -213,7 +214,7 @@ uartWaitForData10ms_gotit:
|
||||
uartWaitForData1000Cycles:
|
||||
ldi r20, 140 ; 1
|
||||
uartWaitForData_loop:
|
||||
M_IO_READ r22, UCSRA ; 2
|
||||
inr r22, UCSRA ; 2
|
||||
sbrc r22, RXC ; 2/3
|
||||
rjmp uartWaitForData_gotit ; 2
|
||||
dec r20 ; 1
|
||||
@@ -235,14 +236,14 @@ uartWaitForData_gotit:
|
||||
; @clobbers R16
|
||||
|
||||
UART_StartRx:
|
||||
M_IO_READ r16, UCSRA ; clear errors
|
||||
inr r16, UCSRA ; clear errors
|
||||
cbr r16, (1<<FE) | (1<<DOR) | (1<<UPE)
|
||||
sbr r16, (1<<RXC)
|
||||
M_IO_WRITE UCSRA, r16
|
||||
outr UCSRA, r16
|
||||
|
||||
M_IO_READ r16, UCSRB
|
||||
inr r16, UCSRB
|
||||
sbr r16, (1<<RXEN) ; enable receive
|
||||
M_IO_WRITE UCSRB, r16
|
||||
outr UCSRB, r16
|
||||
|
||||
ret
|
||||
; @end
|
||||
@@ -255,9 +256,9 @@ UART_StartRx:
|
||||
; @clobbers R16
|
||||
|
||||
UART_StopRx:
|
||||
M_IO_READ r16, UCSRB
|
||||
inr r16, UCSRB
|
||||
cbr r16, (1<<RXCIE | (1<<RXEN)) ; disable RX complete interrupt, disable receive
|
||||
M_IO_WRITE UCSRB, r16
|
||||
outr UCSRB, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
@@ -270,13 +271,13 @@ UART_StopRx:
|
||||
; @clobbers R16
|
||||
|
||||
UART_StartTx:
|
||||
M_IO_READ r16, UCSRA
|
||||
inr r16, UCSRA
|
||||
sbr r16, (1<<TXC) ; clear TXC interrupt
|
||||
M_IO_WRITE UCSRA, r16
|
||||
outr UCSRA, r16
|
||||
|
||||
M_IO_READ r16, UCSRB
|
||||
inr r16, UCSRB
|
||||
sbr r16, (1<<TXEN) ; enable transceive
|
||||
M_IO_WRITE UCSRB, r16
|
||||
outr UCSRB, r16
|
||||
|
||||
ret
|
||||
; @end
|
||||
@@ -290,9 +291,9 @@ UART_StartTx:
|
||||
; @clobbers R16
|
||||
|
||||
UART_StopTx:
|
||||
M_IO_READ r16, UCSRB
|
||||
inr r16, UCSRB
|
||||
cbr r16, (1<<UDRIE) | (1<<TXC) | (1<<TXEN) ; disable TX UDRE and TXC1 interrupt, enable transceive
|
||||
M_IO_WRITE UCSRB, r16
|
||||
outr UCSRB, r16
|
||||
|
||||
ret
|
||||
; @end
|
||||
|
||||
@@ -40,9 +40,9 @@ XRAM_Init:
|
||||
sts xramLastAddress, r16
|
||||
sts xramLastAddress+1, r16
|
||||
|
||||
M_IO_READ r16, MCUCR
|
||||
inr r16, MCUCR
|
||||
sbr r16, (1<<SRE)
|
||||
M_IO_WRITE MCUCR, r16
|
||||
outr MCUCR, r16
|
||||
|
||||
rcall xramWritePattern
|
||||
rcall xramVerifyPattern
|
||||
|
||||
Reference in New Issue
Block a user