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avr: more work on hardware-based UART module.

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This commit is contained in:
Martin Preuss
2025-01-19 15:46:21 +01:00
parent c390b1059c
commit ecb2d85ea2
5 changed files with 534 additions and 121 deletions
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56
avr/modules/uart_hw/defs.asm
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@@ -8,47 +8,41 @@
; ***************************************************************************
.equ UART_HW_MSGNUMINBUF_SIZE = 8
.equ UART_HW_MSGNUMOUTBUF_SIZE = 4
.equ UART_HW_FIXEDBUFFERS_NUM = 6
.equ UART_HW_FIXEDBUFFERS_SIZE = 32 ; adapt UART_HW_FixedBuffers_Locate if you change this value!
.equ UART_HW_IFACE_READBUF_SIZE = 8
.equ UART_HW_IFACE_WRITEBUF_SIZE = 8
.equ UART_HW_MODE_OFF = 0
.equ UART_HW_MODE_IDLE = 1
.equ UART_HW_MODE_READING = 2
.equ UART_HW_MODE_WRITING = 4
.equ UART_HW_MODE_SKIPPING = 8
.equ UART_HW_STATE_OFF = 0
.equ UART_HW_STATE_IDLE = 1
.equ UART_HW_STATE_READING = 2
.equ UART_HW_STATE_WRITING = 3
.equ UART_HW_STATE_SKIPPING = 4
.equ UART_HW_IFACE_MSGIDBUF_SIZE = 8
.equ UART_HW_IFACE_READBUF_SIZE = 24
.equ UART_HW_STATUS_UNDERRUN = 0x01
.equ UART_HW_STATUS_OVERRUN = 0x02
.equ UART_HW_STATUS_HWERR = 0x04
.equ UART_HW_STATUS_ATTN = 0x80
.equ UART_HW_IFACE_OFFS_MODE = 0
.equ UART_HW_IFACE_OFFS_STATUS = 1
.equ UART_HW_IFACE_OFFS_READBUFFERNUM = 2 ; num of buffer currently read
.equ UART_HW_IFACE_OFFS_READBUFFERPOS = 3 ; current pos in readbuffer
.equ UART_HW_IFACE_OFFS_READBUFFERLEFT = 4 ; bytes left to read for current message
.equ UART_HW_IFACE_OFFS_READTIMER = 2
.equ UART_HW_IFACE_OFFS_WRITEBUFFERNUM = 5 ; num of buffer currently written from to network
.equ UART_HW_IFACE_OFFS_WRITEBUFFERPTR = 6 ; pointer to next pos in current write buffer to write from (2 bytes)
.equ UART_HW_IFACE_OFFS_WRITEBUFFERLEFT= 8 ; bytes left to write for current message
.equ UART_HW_IFACE_OFFS_READBUF = 3 ; ringbuffer for incoming chars
.equ UART_HW_IFACE_OFFS_READBUF_MAX = UART_HW_IFACE_OFFS_READBUF
.equ UART_HW_IFACE_OFFS_READBUF_USED = UART_HW_IFACE_OFFS_READBUF+1
.equ UART_HW_IFACE_OFFS_READBUF_RDPOS = UART_HW_IFACE_OFFS_READBUF+2
.equ UART_HW_IFACE_OFFS_READBUF_WRPOS = UART_HW_IFACE_OFFS_READBUF+3
.equ UART_HW_IFACE_OFFS_READBUF_DATA = UART_HW_IFACE_OFFS_READBUF+4 ; UART_HW_IFACE_READBUF_SIZE bytes
.equ UART_HW_IFACE_OFFS_RINGBUF_MAX = 9
.equ UART_HW_IFACE_OFFS_RINGBUF_USED = 10 ; ringbuffer for incoming chars
.equ UART_HW_IFACE_OFFS_RINGBUF_RDPOS = 11
.equ UART_HW_IFACE_OFFS_RINGBUF_WRPOS = 12
.equ UART_HW_IFACE_OFFS_RINGBUF_DATA = 13
.equ UART_HW_IFACE_OFFS_WRITEBUF = UART_HW_IFACE_OFFS_READBUF_DATA+UART_HW_IFACE_READBUF_SIZE
.equ UART_HW_IFACE_OFFS_WRITEBUF_MAX = UART_HW_IFACE_OFFS_WRITEBUF
.equ UART_HW_IFACE_OFFS_WRITEBUF_USED = UART_HW_IFACE_OFFS_WRITEBUF+1
.equ UART_HW_IFACE_OFFS_WRITEBUF_RDPOS = UART_HW_IFACE_OFFS_WRITEBUF+2
.equ UART_HW_IFACE_OFFS_WRITEBUF_WRPOS = UART_HW_IFACE_OFFS_WRITEBUF+3
.equ UART_HW_IFACE_OFFS_WRITEBUF_DATA = UART_HW_IFACE_OFFS_WRITEBUF+4
.equ UART_HW_IFACE_OFFS_MSGIDBUF_MAX = UART_HW_IFACE_OFFS_RINGBUF_DATA+14 ; ringbuffer for ids of outbound messages
.equ UART_HW_IFACE_OFFS_MSGIDBUF_USED = UART_HW_IFACE_OFFS_RINGBUF_DATA+15 ; ringbuffer for ids of outbound messages
.equ UART_HW_IFACE_OFFS_MSGIDBUF_RDPOS = UART_HW_IFACE_OFFS_RINGBUF_DATA+16
.equ UART_HW_IFACE_OFFS_MSGIDBUF_WRPOS = UART_HW_IFACE_OFFS_RINGBUF_DATA+17
.equ UART_HW_IFACE_OFFS_MSGIDBUF_DATA = UART_HW_IFACE_OFFS_RINGBUF_DATA+18
.equ UART_HW_IFACE_SIZE = UART_HW_IFACE_OFFS_MSGIDBUF_DATA+UART_HW_IFACE_MSGIDBUF_SIZE
.equ UART_HW_IFACE_SIZE = UART_HW_IFACE_OFFS_WRITEBUF_DATA+UART_HW_IFACE_WRITEBUF_SIZE