avr: t03 runs in basic mode now, flashing of AtTiny841 finally works!!

This commit is contained in:
Martin Preuss
2025-01-25 03:16:02 +01:00
parent 779b37f195
commit e840bfd9e6
11 changed files with 916 additions and 342 deletions

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@@ -0,0 +1,64 @@
; ***************************************************************************
; copyright : (C) 2025 by Martin Preuss
; email : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome". *
; * Please see toplevel file COPYING of that project for license details. *
; ***************************************************************************
; ---------------------------------------------------------------------------
; flashReadEepromIncr
;
; Read a byte from EEPROM (see example in ATtiny24/44/84 manual p.19).
;
; IN:
; - X: EEPROM Address to read from
; OUT:
; - R16: byte read
; - X: EEPROM Address incremented
; REGS: R16
flashReadEepromIncr:
sbic EECR, EEPE ; wait for previous write to complete (if any)
rjmp flashReadEepromIncr
out EEARH, xh ; set EEPROM address
out EEARL, xl
sbi EECR, EERE ; start EEPROM read by writing EERE
in r16, EEDR ; read data from data register
adiw xh:xl, 1
ret
; ---------------------------------------------------------------------------
; @routine flashReadUidIntoSdram
;
; Read UID from EEPROM.
;
; @clobbers R16, X, Y
flashReadUidIntoSdram:
ldi yh, HIGH(flashUid)
ldi yl, LOW(flashUid)
push r15
in r15, SREG
cli
ldi xl, LOW(EEPROM_OFFS_UUID)
ldi xh, HIGH(EEPROM_OFFS_UUID)
rcall flashReadEepromIncr ; (R16)
st Y+, r16
rcall flashReadEepromIncr ; (R16)
st Y+, r16
rcall flashReadEepromIncr ; (R16)
st Y+, r16
rcall flashReadEepromIncr ; (R16)
st Y+, r16
out SREG, r15
pop r15
ret
; @end

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@@ -173,62 +173,6 @@ flashDoSpm_wait: ; wait for possibly previous SPM to complete
; ---------------------------------------------------------------------------
; flashReadEepromIncr
;
; Read a byte from EEPROM (see example in ATtiny24/44/84 manual p.19).
;
; IN:
; - X: EEPROM Address to read from
; OUT:
; - R16: byte read
; - X: EEPROM Address incremented
; REGS: R16
flashReadEepromIncr:
sbic EECR, EEPE ; wait for previous write to complete (if any)
rjmp flashReadEepromIncr
out EEARH, xh ; set EEPROM address
out EEARL, xl
sbi EECR, EERE ; start EEPROM read by writing EERE
in r16, EEDR ; read data from data register
adiw xh:xl, 1
ret
; ---------------------------------------------------------------------------
; @routine flashReadUidIntoSdram
;
; Read UID from EEPROM.
;
; @clobbers R16, X, Y
flashReadUidIntoSdram:
ldi yh, HIGH(flashUid)
ldi yl, LOW(flashUid)
push r15
in r15, SREG
cli
ldi xl, LOW(EEPROM_OFFS_UUID)
ldi xh, HIGH(EEPROM_OFFS_UUID)
rcall flashReadEepromIncr ; (R16)
st Y+, r16
rcall flashReadEepromIncr ; (R16)
st Y+, r16
rcall flashReadEepromIncr ; (R16)
st Y+, r16
rcall flashReadEepromIncr ; (R16)
st Y+, r16
out SREG, r15
pop r15
ret
; @end
FLASH_END:
.equ MODULE_SIZE_FLASH = FLASH_END-FLASH_BEGIN

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@@ -48,7 +48,6 @@ checkFlash:
rcall ioRawSendMsg ; (r16, r17, X)
ldi r16, CPRO_CMD_FLASH_START
ldi r20, 10 ; wait for up to 10s
rcall ioWaitForGivenMsg ; (r16, r17, r18, r19, r20, r22, X)
brcc checkFlash_end
@@ -81,6 +80,7 @@ checkFlash_end:
; @clobbers r16, r20
flashProcess:
rcall Flash_Init
flashProcess_loop1:
; wait up to 10s for incoming FLASH_DATA message
ldi r16, CPRO_CMD_FLASH_DATA
@@ -94,7 +94,8 @@ flashProcess_loop1:
rcall flashProcessHandleFlashData ; (R0, R1, R15, R16, R17, R18, R19, R20, Z)
rjmp flashProcess_loop1
flashProcess_endReceived:
rjmp flashProcessHandleFlashEnd
rcall flashProcessHandleFlashEnd
sec
flashProcess_end:
ret
; @end
@@ -163,27 +164,18 @@ flashProcessCheckFlashStart_notMe:
; @clobbers R0, R1, R18, Z (R15, R16, R17, R19, R20)
flashProcessHandleFlashData:
adiw xh:xl, FLASH_MSG_OFFS_MSGLEN
ld r18, X ; length (subtract 6)
cpi r18, 6 ; cmd(1), src(1), addr(4)
mov yl, xl
mov yh, xh
adiw yh:yl, FLASH_MSG_OFFS_MSGLEN
ld r17, Y ; length (subtract 6)
cpi r17, 6 ; cmd(1), src(1), addr(4)
brcs flashProcessHandleFlashData_badData
subi r18, 6 ; remaining length
adiw xh:xl, FLASH_PACKET_DATA_OFFS_ADDR-FLASH_MSG_OFFS_MSGLEN
ld zl, X+ ; address (low)
ld zh, X+ ; address (high)
adiw xh:xl, 2 ; ignore high bytes, points to first data byte now
; push zl
; push zh
;flashProcessHandleFlashData_loop:
; ld r0, X+
; ld r1, X+
; rcall Flash_WriteIntoPage ; (R15, R16, Z+)
; subi r18, 2
; brne flashProcessHandleFlashData_loop
; pop zh
; pop zl
; rcall Flash_FinishPage ; (R15, R16, R20)
subi r17, 6 ; remaining length
adiw yh:yl, FLASH_PACKET_DATA_OFFS_ADDR-FLASH_MSG_OFFS_MSGLEN
ld zl, Y+ ; address (low)
ld zh, Y+ ; address (high)
adiw yh:yl, 2 ; ignore high bytes, points to first data byte now
rcall Flash_WriteData ; (R0, R1, R16, R18, R19, R20, R24, R25, X)
clr r16
rjmp flashProcessHandleFlashData_sendResponse
flashProcessHandleFlashData_badData:
@@ -206,6 +198,7 @@ flashProcessHandleFlashData_sendResponse:
; @clobbers r16, X (R17, R18, R19, R20)
flashProcessHandleFlashEnd:
rcall Flash_Fini ; flash pending data
rcall flashWaitFor100ms
clr r16
rcall flashProcessSendFlashResponse ; (R16, R17, R18, R19, R20, X)

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@@ -25,25 +25,26 @@
; @clobbers: r16, r17, r20, X (r18, r19, r22)
ioWaitForGivenMsg:
ldi r20, 100 ; number of tries
ldi r20, 10 ; number of tries
ioWaitForGivenMsg_loop:
push r16
rcall ioRawWaitForValidMsg ; (r16, r17, r18, r19, r22, X)
pop r16
pop r17 ; pop into r17 (from r16)
brcc ioWaitForGivenMsg_end
ldi xl, LOW(flashRecvBuffer)
ldi xh, HIGH(flashRecvBuffer)
adiw xh:xl, COM2_MSG_OFFS_CMD
ld r17, X
ld r16, X
sbiw xh:xl, COM2_MSG_OFFS_CMD
cp r16, r17
breq ioWaitForGivenMsg_gotIt
cpi r16, CPRO_CMD_FLASH_END
breq ioWaitForGivenMsg_gotIt
mov r16, r17 ; put expected msg code back into r16 for next loop
dec r20
brne ioWaitForGivenMsg_loop
clc
rjmp ioWaitForGivenMsg_end
ret
ioWaitForGivenMsg_gotIt:
sec
ioWaitForGivenMsg_end:

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@@ -23,7 +23,30 @@
; @clobbers r16, r17
ioRawInit:
rjmp UART_HW_Uart1_RawInit ; (R16, R17)
; set baudrate
.if clock == 8000000
ldi r16, 25 ; (19.2Kb/s at 8MHz)
ldi r17, 0
.endif
.if clock == 1000000
ldi r16, 3 ; (19.2Kb/s at 1MHz)
ldi r17, 0
.endif
sts UBRR1H, r17
sts UBRR1L, r16
; set character format (asynchronous USART, 8-bit, one stop bit, no parity)
ldi r16, (3<<UCSZ10)
sts UCSR1C, r16
; enable transceiver
lds r16, UCSR1B
; cbr r16, (1<<UDRIE1) ; disable DRE interrupt
ori r16, (1<<RXEN1) | (1<<TXEN1) ; enable transmit and receive
sts UCSR1B, r16
ret
;@end
@@ -37,11 +60,44 @@ ioRawInit:
ioRawSendMsg:
ldi xl, LOW(flashSendBuffer)
ldi xh, HIGH(flashSendBuffer)
rjmp UART_HW_Uart1_RawSendPacket ; (r16, r17, X)
rjmp ioRawSendPacket ; (r16, r17, X)
; @end
; ---------------------------------------------------------------------------
; @routine UART_HW_Uart1_RawSendPacket
; Send packet.
;
; @param X buffer to send
; @return CFLAG: set if okay (packet sent), cleared on error
; @clobbers r16, r17, X
ioRawSendPacket:
adiw xh:xl, 1
ld r17, X
sbiw xh:xl, 1
ldi r16, 3 ; add DEST, LEN, CRC bytes
add r17, r16
ioRawSendPacket_loop:
lds r16, UCSR1A
sbrs r16, UDRE1
rjmp ioRawSendPacket_loop
sbr r16, (1<<TXC1)
sts UCSR1A, r16
ld r16, X+
sts UDR1, r16
dec r17
brne ioRawSendPacket_loop
sec
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRawWaitForValidMsg
; Wait for valid incoming msg
@@ -50,27 +106,273 @@ ioRawSendMsg:
; @clobbers: r16, r17, r18 (r19, r22, X)
ioRawWaitForValidMsg:
rcall UART_HW_Uart1_EnableRawRecv ; (R16)
ioRawWaitForValidMsg_loop:
ldi xl, LOW(flashRecvBuffer)
ldi xh, HIGH(flashRecvBuffer)
ldi r16, COM2_MAINTENANCE_ADDR
ldi r17, FLASH_RECVBUFFER_MAXLEN-3
ldi r18, 10 ; 10s
rcall UART_HW_Uart1_RawRecvPacket ; (r16, r17, r18, r19, r22, X)
brcc ioRawWaitForValidMsg_error
ldi xl, LOW(flashRecvBuffer)
ldi xh, HIGH(flashRecvBuffer)
rcall com2CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
brcc ioRawWaitForValidMsg_loop ; invalid msg, try next
rcall UART_HW_Uart1_DisableRawRecv ; (R16)
sec
ret
ioRawWaitForValidMsg_error:
rcall UART_HW_Uart1_DisableRawRecv ; (R16)
ldi xl, LOW(flashRecvBuffer)
ldi xh, HIGH(flashRecvBuffer)
ldi r18, FLASH_RECVBUFFER_MAXLEN-3 ; maximum accepted msglen byte
ldi r20, 10 ; 10 secs
rjmp ioRecvMsg
; @end
; ---------------------------------------------------------------------------
; @routine ioRecvMsg
;
; Wait for next message, if received check validity.
; On error skip the currently received message.
;
; @return CFLAG set if okay, cleared on error
; @param r18 max accepted msglen size (buffersize-3)
; @param R20 max number of secs to wait for incoming message
; @param X buffer to receive to
; @clobbers (r16, r17, r18, r19, r20, r22)
ioRecvMsg:
rcall ioRawRecvMsg ; (r16, r17, r18, r19, r20, r22)
brcc ioRecvMsg_error
push xl
push xh
rcall com2CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
pop xh
pop xl
brcs ioRecvMsg_end
ioRecvMsg_error:
rcall ioRecvSkipMessage ; skip remainder of the message
clc
ioRecvMsg_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRecvSkipMessage
;
; skip all receiption data until a data pause of about 10ms
;
; @clobbers r16
ioRecvSkipMessage:
ioRecvSkipMessage_loop:
rcall ioRecvFlush ; (r16)
; wait for a data pause of 10ms
rcall ioRawRecvByteWithin10ms ; (r20, r22)
brcs ioRecvSkipMessage_loop
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRecvFlush
;
; flush receiption buffer.
;
; @clobbers r16
ioRecvFlush:
lds r16, UCSR1A ; read status
sbrs r16, RXC1
ret
lds r16, UDR1 ; read data byte
rjmp ioRecvFlush
; @end
; ---------------------------------------------------------------------------
; @routine ioRawRecvMsg
;
; @return CFLAG set if okay, cleared on error
; @param r18 max accepted msglen size (buffersize-3)
; @param R20 max number of secs to wait for incoming message
; @param X buffer to receive to
; @clobbers r16, r17, r19 (r18, r20, r22)
ioRawRecvMsg:
lds r19, UCSR1A
cbr r19, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
sts UCSR1A, r19 ; clear errors
; wait for begin of message
rcall ioRawWaitForDataSeconds ; (r20, r22)
brcc ioRawRecvMsg_end
clr r19 ; bytecounter
; read first two bytes
ldi r17, 2 ; 2 bytes: address byte, msg len
add r19, r17
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
brcc ioRawRecvMsg_error
cp r16, r20 ; check size
brcc ioRawRecvMsg_error
inc r16 ; account for checksum byte
; read remaining bytes including checksum byte
mov r17, r16
add r19, r17
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
brcc ioRawRecvMsg_error
sub xl, r19 ; let X point back to begin of message
sbc xh, r19
add xh, r19
sec
ret
ioRawRecvMsg_error:
clc
ioRawRecvMsg_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRawRecvBytes
;
; @return CFLAG set if okay (data available), cleared on error
; @return r16 last byte received
; @param r17 number of bytes to read
; @param x buffer to receive to
; @clobbers r16, r17 (r20, r22)
ioRawRecvBytes:
rcall ioRawRecvByteWithin10ms ; (r20, r22)
brcc ioRawRecvBytes_end
st X+, r16
dec r17
brne ioRawRecvBytes
sec
ioRawRecvBytes_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRawRecvByteWithin10ms
;
; Wait up to 10ms for incoming byte and read it.
;
; @return CFLAG set if okay (data available), cleared on error
; @return r16 byte received (if CFLAG set)
; @clobbers: r20, r22
ioRawRecvByteWithin10ms:
rcall ioRawWaitForData10ms ; (R20, R22)
brcc ioRawRecvByteWithin10ms_end
lds r16, UCSR1A ; check for errors
andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
brne ioRawRecvByteWithin10ms_error
lds r16, UDR1 ; read data byte
sec
ret
ioRawRecvByteWithin10ms_error:
clc
ioRawRecvByteWithin10ms_end:
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRawWaitForDataSeconds
;
; Wait for incoming data for max 1s
;
; @return CFLAG set if okay (data available), cleared on error
; @param r20 maximum number of seconds to wait
; @clobbers: r20, r22
ioRawWaitForDataSeconds:
ioRawWaitForDataSeconds_loop:
push r20
rcall ioRawWaitForData1s ; (r20, r22)
pop r20
brcs ioRawWaitForDataSeconds_gotit
sbi LED_PIN, LED_PINNUM ; toggle
dec r20
brne ioRawWaitForDataSeconds_loop
clc
ioRawWaitForDataSeconds_gotit:
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRawWaitForData1s
;
; Wait for incoming data for max 1s
;
; @return CFLAG set if okay (data available), cleared on error
; @clobbers: r20, r22
ioRawWaitForData1s:
ldi r20, 100
ioRawWaitForData1s_loop:
push r20
rcall ioRawWaitForData10ms ; (R20, R22)
pop r20
brcs ioRawWaitForData1s_gotit
dec r20
brne ioRawWaitForData1s_loop
clc
ioRawWaitForData1s_gotit:
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRawWaitForData10ms
;
; Wait for incoming data for max 10 milliseconds.
;
; @return CFLAG set if okay (data available), cleared on error
; @clobbers: r20, r22
ioRawWaitForData10ms:
.if clock == 8000000
ldi r20, 80
.endif
.if clock == 1000000
ldi r20, 10
.endif
ioRawWaitForData10ms_loop:
push r20
rcall ioRawWaitForData1000Cycles ; (r20, r22)
pop r20
brcs ioRawWaitForData10ms_gotit
dec r20
brne ioRawWaitForData10ms_loop
clc
ioRawWaitForData10ms_gotit:
ret
; @end
; ---------------------------------------------------------------------------
; @routine ioRawWaitForData1000Cycles
;
; Wait for incoming data for max 1000 clock cycles
; (about 1ms at 1MHz, 0.125 at 8MHz)
;
; @return CFLAG set if okay (packet received), cleared on error
; @clobbers: r20, r22
ioRawWaitForData1000Cycles:
ldi r20, 140 ; 1
ioRawWaitForData_loop:
lds r22, UCSR1A ; 2
sbrc r22, RXC1 ; 2/3
rjmp ioRawWaitForData_gotit ; 2
dec r20 ; 1
brne ioRawWaitForData_loop ; 1/2 -> 7 per loop, max about 1000
clc ; 1
ret ; 4
ioRawWaitForData_gotit:
sec ; 1
ret ; 4
; @end

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@@ -27,7 +27,7 @@
; - nothing
; OUT:
; - nothing
; REGS: R16 (R18, R22, R24, R25)
; REGS: R16 (R22, R24)
flashWaitDependingOnUid:
lds r16, flashUid
@@ -46,20 +46,17 @@ flashWaitDependingOnUid_l1:
; - R16: number of 100ms loops
; OUT:
; - nothing
; REGS: R16 (R18, R22, R24, R25)
; REGS: R16 (R22, R24)
flashWaitForMulti100ms:
flashWaitForMulti100ms_loop:
rcall flashWaitFor100ms ; (R18, R22, R24, R25)
rcall flashWaitFor100ms ; (R22, R24)
dec r16
brne flashWaitForMulti100ms_loop
ret
; ---------------------------------------------------------------------------
; wait for 100 milliseconds.
;
@@ -67,13 +64,15 @@ flashWaitForMulti100ms_loop:
; - nothing
; OUT:
; - nothing
; REGS: R18 (R22, R24, R25)
; REGS: R24 (R22)
flashWaitFor100ms:
ldi r18, 100
ldi r24, 100
flashWaitFor100ms_loop:
rcall flashWaitFor1ms ; (R22, R24, R25)
dec r18
push r24
rcall flashWaitFor1ms ; (R22, R24)
pop r24
dec r24
brne flashWaitFor100ms_loop
ret