avr: t03 runs in basic mode now, flashing of AtTiny841 finally works!!
This commit is contained in:
64
avr/modules/flash/eeprom.asm
Normal file
64
avr/modules/flash/eeprom.asm
Normal file
@@ -0,0 +1,64 @@
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; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; ---------------------------------------------------------------------------
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; flashReadEepromIncr
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;
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; Read a byte from EEPROM (see example in ATtiny24/44/84 manual p.19).
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;
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; IN:
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; - X: EEPROM Address to read from
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; OUT:
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; - R16: byte read
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; - X: EEPROM Address incremented
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; REGS: R16
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flashReadEepromIncr:
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sbic EECR, EEPE ; wait for previous write to complete (if any)
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rjmp flashReadEepromIncr
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out EEARH, xh ; set EEPROM address
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out EEARL, xl
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sbi EECR, EERE ; start EEPROM read by writing EERE
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in r16, EEDR ; read data from data register
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adiw xh:xl, 1
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ret
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; ---------------------------------------------------------------------------
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; @routine flashReadUidIntoSdram
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;
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; Read UID from EEPROM.
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;
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; @clobbers R16, X, Y
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flashReadUidIntoSdram:
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ldi yh, HIGH(flashUid)
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ldi yl, LOW(flashUid)
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push r15
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in r15, SREG
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cli
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ldi xl, LOW(EEPROM_OFFS_UUID)
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ldi xh, HIGH(EEPROM_OFFS_UUID)
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rcall flashReadEepromIncr ; (R16)
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st Y+, r16
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rcall flashReadEepromIncr ; (R16)
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st Y+, r16
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rcall flashReadEepromIncr ; (R16)
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st Y+, r16
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rcall flashReadEepromIncr ; (R16)
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st Y+, r16
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out SREG, r15
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pop r15
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ret
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; @end
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@@ -173,62 +173,6 @@ flashDoSpm_wait: ; wait for possibly previous SPM to complete
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; ---------------------------------------------------------------------------
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; flashReadEepromIncr
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;
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; Read a byte from EEPROM (see example in ATtiny24/44/84 manual p.19).
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;
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; IN:
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; - X: EEPROM Address to read from
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; OUT:
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; - R16: byte read
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; - X: EEPROM Address incremented
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; REGS: R16
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flashReadEepromIncr:
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sbic EECR, EEPE ; wait for previous write to complete (if any)
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rjmp flashReadEepromIncr
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out EEARH, xh ; set EEPROM address
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out EEARL, xl
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sbi EECR, EERE ; start EEPROM read by writing EERE
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in r16, EEDR ; read data from data register
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adiw xh:xl, 1
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ret
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; ---------------------------------------------------------------------------
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; @routine flashReadUidIntoSdram
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;
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; Read UID from EEPROM.
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;
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; @clobbers R16, X, Y
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flashReadUidIntoSdram:
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ldi yh, HIGH(flashUid)
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ldi yl, LOW(flashUid)
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push r15
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in r15, SREG
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cli
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ldi xl, LOW(EEPROM_OFFS_UUID)
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ldi xh, HIGH(EEPROM_OFFS_UUID)
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rcall flashReadEepromIncr ; (R16)
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st Y+, r16
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rcall flashReadEepromIncr ; (R16)
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st Y+, r16
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rcall flashReadEepromIncr ; (R16)
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st Y+, r16
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rcall flashReadEepromIncr ; (R16)
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st Y+, r16
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out SREG, r15
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pop r15
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ret
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; @end
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FLASH_END:
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.equ MODULE_SIZE_FLASH = FLASH_END-FLASH_BEGIN
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@@ -48,7 +48,6 @@ checkFlash:
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rcall ioRawSendMsg ; (r16, r17, X)
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ldi r16, CPRO_CMD_FLASH_START
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ldi r20, 10 ; wait for up to 10s
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rcall ioWaitForGivenMsg ; (r16, r17, r18, r19, r20, r22, X)
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brcc checkFlash_end
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@@ -81,6 +80,7 @@ checkFlash_end:
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; @clobbers r16, r20
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flashProcess:
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rcall Flash_Init
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flashProcess_loop1:
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; wait up to 10s for incoming FLASH_DATA message
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ldi r16, CPRO_CMD_FLASH_DATA
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@@ -94,7 +94,8 @@ flashProcess_loop1:
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rcall flashProcessHandleFlashData ; (R0, R1, R15, R16, R17, R18, R19, R20, Z)
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rjmp flashProcess_loop1
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flashProcess_endReceived:
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rjmp flashProcessHandleFlashEnd
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rcall flashProcessHandleFlashEnd
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sec
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flashProcess_end:
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ret
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; @end
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@@ -163,27 +164,18 @@ flashProcessCheckFlashStart_notMe:
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; @clobbers R0, R1, R18, Z (R15, R16, R17, R19, R20)
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flashProcessHandleFlashData:
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adiw xh:xl, FLASH_MSG_OFFS_MSGLEN
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ld r18, X ; length (subtract 6)
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cpi r18, 6 ; cmd(1), src(1), addr(4)
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mov yl, xl
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mov yh, xh
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adiw yh:yl, FLASH_MSG_OFFS_MSGLEN
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ld r17, Y ; length (subtract 6)
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cpi r17, 6 ; cmd(1), src(1), addr(4)
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brcs flashProcessHandleFlashData_badData
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subi r18, 6 ; remaining length
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adiw xh:xl, FLASH_PACKET_DATA_OFFS_ADDR-FLASH_MSG_OFFS_MSGLEN
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ld zl, X+ ; address (low)
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ld zh, X+ ; address (high)
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adiw xh:xl, 2 ; ignore high bytes, points to first data byte now
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; push zl
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; push zh
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;flashProcessHandleFlashData_loop:
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; ld r0, X+
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; ld r1, X+
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; rcall Flash_WriteIntoPage ; (R15, R16, Z+)
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; subi r18, 2
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; brne flashProcessHandleFlashData_loop
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; pop zh
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; pop zl
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; rcall Flash_FinishPage ; (R15, R16, R20)
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subi r17, 6 ; remaining length
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adiw yh:yl, FLASH_PACKET_DATA_OFFS_ADDR-FLASH_MSG_OFFS_MSGLEN
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ld zl, Y+ ; address (low)
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ld zh, Y+ ; address (high)
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adiw yh:yl, 2 ; ignore high bytes, points to first data byte now
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rcall Flash_WriteData ; (R0, R1, R16, R18, R19, R20, R24, R25, X)
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clr r16
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rjmp flashProcessHandleFlashData_sendResponse
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flashProcessHandleFlashData_badData:
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@@ -206,6 +198,7 @@ flashProcessHandleFlashData_sendResponse:
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; @clobbers r16, X (R17, R18, R19, R20)
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flashProcessHandleFlashEnd:
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rcall Flash_Fini ; flash pending data
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rcall flashWaitFor100ms
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clr r16
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rcall flashProcessSendFlashResponse ; (R16, R17, R18, R19, R20, X)
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@@ -25,25 +25,26 @@
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; @clobbers: r16, r17, r20, X (r18, r19, r22)
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ioWaitForGivenMsg:
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ldi r20, 100 ; number of tries
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ldi r20, 10 ; number of tries
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ioWaitForGivenMsg_loop:
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push r16
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rcall ioRawWaitForValidMsg ; (r16, r17, r18, r19, r22, X)
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pop r16
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pop r17 ; pop into r17 (from r16)
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brcc ioWaitForGivenMsg_end
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ldi xl, LOW(flashRecvBuffer)
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ldi xh, HIGH(flashRecvBuffer)
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adiw xh:xl, COM2_MSG_OFFS_CMD
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ld r17, X
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ld r16, X
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sbiw xh:xl, COM2_MSG_OFFS_CMD
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cp r16, r17
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breq ioWaitForGivenMsg_gotIt
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cpi r16, CPRO_CMD_FLASH_END
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breq ioWaitForGivenMsg_gotIt
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mov r16, r17 ; put expected msg code back into r16 for next loop
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dec r20
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brne ioWaitForGivenMsg_loop
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clc
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rjmp ioWaitForGivenMsg_end
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ret
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ioWaitForGivenMsg_gotIt:
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sec
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ioWaitForGivenMsg_end:
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@@ -23,7 +23,30 @@
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; @clobbers r16, r17
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ioRawInit:
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rjmp UART_HW_Uart1_RawInit ; (R16, R17)
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; set baudrate
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.if clock == 8000000
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ldi r16, 25 ; (19.2Kb/s at 8MHz)
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ldi r17, 0
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.endif
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.if clock == 1000000
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ldi r16, 3 ; (19.2Kb/s at 1MHz)
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ldi r17, 0
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.endif
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sts UBRR1H, r17
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sts UBRR1L, r16
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; set character format (asynchronous USART, 8-bit, one stop bit, no parity)
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ldi r16, (3<<UCSZ10)
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sts UCSR1C, r16
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; enable transceiver
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lds r16, UCSR1B
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; cbr r16, (1<<UDRIE1) ; disable DRE interrupt
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ori r16, (1<<RXEN1) | (1<<TXEN1) ; enable transmit and receive
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sts UCSR1B, r16
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ret
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;@end
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@@ -37,11 +60,44 @@ ioRawInit:
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ioRawSendMsg:
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ldi xl, LOW(flashSendBuffer)
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ldi xh, HIGH(flashSendBuffer)
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rjmp UART_HW_Uart1_RawSendPacket ; (r16, r17, X)
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rjmp ioRawSendPacket ; (r16, r17, X)
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_Uart1_RawSendPacket
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; Send packet.
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;
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; @param X buffer to send
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; @return CFLAG: set if okay (packet sent), cleared on error
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; @clobbers r16, r17, X
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ioRawSendPacket:
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adiw xh:xl, 1
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ld r17, X
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sbiw xh:xl, 1
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ldi r16, 3 ; add DEST, LEN, CRC bytes
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add r17, r16
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ioRawSendPacket_loop:
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lds r16, UCSR1A
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sbrs r16, UDRE1
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rjmp ioRawSendPacket_loop
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sbr r16, (1<<TXC1)
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sts UCSR1A, r16
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ld r16, X+
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sts UDR1, r16
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dec r17
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brne ioRawSendPacket_loop
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRawWaitForValidMsg
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; Wait for valid incoming msg
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@@ -50,27 +106,273 @@ ioRawSendMsg:
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; @clobbers: r16, r17, r18 (r19, r22, X)
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ioRawWaitForValidMsg:
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rcall UART_HW_Uart1_EnableRawRecv ; (R16)
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ioRawWaitForValidMsg_loop:
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ldi xl, LOW(flashRecvBuffer)
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ldi xh, HIGH(flashRecvBuffer)
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ldi r16, COM2_MAINTENANCE_ADDR
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ldi r17, FLASH_RECVBUFFER_MAXLEN-3
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ldi r18, 10 ; 10s
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rcall UART_HW_Uart1_RawRecvPacket ; (r16, r17, r18, r19, r22, X)
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brcc ioRawWaitForValidMsg_error
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ldi xl, LOW(flashRecvBuffer)
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ldi xh, HIGH(flashRecvBuffer)
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rcall com2CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
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brcc ioRawWaitForValidMsg_loop ; invalid msg, try next
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rcall UART_HW_Uart1_DisableRawRecv ; (R16)
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sec
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ret
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ioRawWaitForValidMsg_error:
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rcall UART_HW_Uart1_DisableRawRecv ; (R16)
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ldi xl, LOW(flashRecvBuffer)
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ldi xh, HIGH(flashRecvBuffer)
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ldi r18, FLASH_RECVBUFFER_MAXLEN-3 ; maximum accepted msglen byte
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ldi r20, 10 ; 10 secs
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rjmp ioRecvMsg
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRecvMsg
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;
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; Wait for next message, if received check validity.
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; On error skip the currently received message.
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;
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; @return CFLAG set if okay, cleared on error
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; @param r18 max accepted msglen size (buffersize-3)
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; @param R20 max number of secs to wait for incoming message
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; @param X buffer to receive to
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; @clobbers (r16, r17, r18, r19, r20, r22)
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ioRecvMsg:
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rcall ioRawRecvMsg ; (r16, r17, r18, r19, r20, r22)
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brcc ioRecvMsg_error
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push xl
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push xh
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rcall com2CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
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pop xh
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pop xl
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brcs ioRecvMsg_end
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ioRecvMsg_error:
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rcall ioRecvSkipMessage ; skip remainder of the message
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clc
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ioRecvMsg_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRecvSkipMessage
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;
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; skip all receiption data until a data pause of about 10ms
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;
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; @clobbers r16
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ioRecvSkipMessage:
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ioRecvSkipMessage_loop:
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rcall ioRecvFlush ; (r16)
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; wait for a data pause of 10ms
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rcall ioRawRecvByteWithin10ms ; (r20, r22)
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brcs ioRecvSkipMessage_loop
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRecvFlush
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;
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; flush receiption buffer.
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;
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; @clobbers r16
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ioRecvFlush:
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lds r16, UCSR1A ; read status
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sbrs r16, RXC1
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ret
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lds r16, UDR1 ; read data byte
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rjmp ioRecvFlush
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRawRecvMsg
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;
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; @return CFLAG set if okay, cleared on error
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; @param r18 max accepted msglen size (buffersize-3)
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; @param R20 max number of secs to wait for incoming message
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; @param X buffer to receive to
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; @clobbers r16, r17, r19 (r18, r20, r22)
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ioRawRecvMsg:
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lds r19, UCSR1A
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cbr r19, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
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sts UCSR1A, r19 ; clear errors
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; wait for begin of message
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rcall ioRawWaitForDataSeconds ; (r20, r22)
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brcc ioRawRecvMsg_end
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clr r19 ; bytecounter
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; read first two bytes
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ldi r17, 2 ; 2 bytes: address byte, msg len
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add r19, r17
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rcall ioRawRecvBytes ; (r16, r17, r18, r22)
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brcc ioRawRecvMsg_error
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cp r16, r20 ; check size
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brcc ioRawRecvMsg_error
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inc r16 ; account for checksum byte
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; read remaining bytes including checksum byte
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mov r17, r16
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add r19, r17
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rcall ioRawRecvBytes ; (r16, r17, r18, r22)
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brcc ioRawRecvMsg_error
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sub xl, r19 ; let X point back to begin of message
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sbc xh, r19
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add xh, r19
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sec
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ret
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ioRawRecvMsg_error:
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clc
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ioRawRecvMsg_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRawRecvBytes
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;
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; @return CFLAG set if okay (data available), cleared on error
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; @return r16 last byte received
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; @param r17 number of bytes to read
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; @param x buffer to receive to
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; @clobbers r16, r17 (r20, r22)
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ioRawRecvBytes:
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rcall ioRawRecvByteWithin10ms ; (r20, r22)
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brcc ioRawRecvBytes_end
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st X+, r16
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dec r17
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brne ioRawRecvBytes
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sec
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ioRawRecvBytes_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRawRecvByteWithin10ms
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;
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; Wait up to 10ms for incoming byte and read it.
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;
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; @return CFLAG set if okay (data available), cleared on error
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; @return r16 byte received (if CFLAG set)
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; @clobbers: r20, r22
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ioRawRecvByteWithin10ms:
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
brcc ioRawRecvByteWithin10ms_end
|
||||
lds r16, UCSR1A ; check for errors
|
||||
andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
|
||||
brne ioRawRecvByteWithin10ms_error
|
||||
lds r16, UDR1 ; read data byte
|
||||
sec
|
||||
ret
|
||||
ioRawRecvByteWithin10ms_error:
|
||||
clc
|
||||
ioRawRecvByteWithin10ms_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForDataSeconds
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @param r20 maximum number of seconds to wait
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForDataSeconds:
|
||||
ioRawWaitForDataSeconds_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1s ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForDataSeconds_gotit
|
||||
sbi LED_PIN, LED_PINNUM ; toggle
|
||||
dec r20
|
||||
brne ioRawWaitForDataSeconds_loop
|
||||
clc
|
||||
ioRawWaitForDataSeconds_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1s
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1s:
|
||||
ldi r20, 100
|
||||
ioRawWaitForData1s_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData1s_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData1s_loop
|
||||
clc
|
||||
ioRawWaitForData1s_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData10ms
|
||||
;
|
||||
; Wait for incoming data for max 10 milliseconds.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData10ms:
|
||||
.if clock == 8000000
|
||||
ldi r20, 80
|
||||
.endif
|
||||
.if clock == 1000000
|
||||
ldi r20, 10
|
||||
.endif
|
||||
ioRawWaitForData10ms_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1000Cycles ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData10ms_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData10ms_loop
|
||||
clc
|
||||
ioRawWaitForData10ms_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1000Cycles
|
||||
;
|
||||
; Wait for incoming data for max 1000 clock cycles
|
||||
; (about 1ms at 1MHz, 0.125 at 8MHz)
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1000Cycles:
|
||||
ldi r20, 140 ; 1
|
||||
ioRawWaitForData_loop:
|
||||
lds r22, UCSR1A ; 2
|
||||
sbrc r22, RXC1 ; 2/3
|
||||
rjmp ioRawWaitForData_gotit ; 2
|
||||
dec r20 ; 1
|
||||
brne ioRawWaitForData_loop ; 1/2 -> 7 per loop, max about 1000
|
||||
clc ; 1
|
||||
ret ; 4
|
||||
ioRawWaitForData_gotit:
|
||||
sec ; 1
|
||||
ret ; 4
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
; - nothing
|
||||
; OUT:
|
||||
; - nothing
|
||||
; REGS: R16 (R18, R22, R24, R25)
|
||||
; REGS: R16 (R22, R24)
|
||||
|
||||
flashWaitDependingOnUid:
|
||||
lds r16, flashUid
|
||||
@@ -46,20 +46,17 @@ flashWaitDependingOnUid_l1:
|
||||
; - R16: number of 100ms loops
|
||||
; OUT:
|
||||
; - nothing
|
||||
; REGS: R16 (R18, R22, R24, R25)
|
||||
; REGS: R16 (R22, R24)
|
||||
|
||||
flashWaitForMulti100ms:
|
||||
flashWaitForMulti100ms_loop:
|
||||
rcall flashWaitFor100ms ; (R18, R22, R24, R25)
|
||||
rcall flashWaitFor100ms ; (R22, R24)
|
||||
dec r16
|
||||
brne flashWaitForMulti100ms_loop
|
||||
ret
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; wait for 100 milliseconds.
|
||||
;
|
||||
@@ -67,13 +64,15 @@ flashWaitForMulti100ms_loop:
|
||||
; - nothing
|
||||
; OUT:
|
||||
; - nothing
|
||||
; REGS: R18 (R22, R24, R25)
|
||||
; REGS: R24 (R22)
|
||||
|
||||
flashWaitFor100ms:
|
||||
ldi r18, 100
|
||||
ldi r24, 100
|
||||
flashWaitFor100ms_loop:
|
||||
rcall flashWaitFor1ms ; (R22, R24, R25)
|
||||
dec r18
|
||||
push r24
|
||||
rcall flashWaitFor1ms ; (R22, R24)
|
||||
pop r24
|
||||
dec r24
|
||||
brne flashWaitFor100ms_loop
|
||||
ret
|
||||
|
||||
|
||||
Reference in New Issue
Block a user