moved timer setup code into hardware include file.

2025-05-17 10:48:39 +02:00
parent d51ca9b1d1
commit e545251b27
4 changed files with 175 additions and 49 deletions
--- a/avr/devices/all/hw_tn84.asm
+++ b/avr/devices/all/hw_tn84.asm
@@ -85,3 +85,61 @@ systemSleep:



+; ---------------------------------------------------------------------------
+; @routine systemSetupTimer0
+;
+
+systemSetupTimer0:            ; setup timer for IRQ every 100ms
+  ldi r16, (1<<CS02) | (0<<CS01) | (1<<CS00)  ; Prescaler 1024
+  out TCCR0B, r16
+  
+  ldi r16, (1<<WGM01) | (0<<WGM00)             ; CTC mode
+  out TCCR0A, r16
+
+; Settings for clock 1Mhz (default)
+; use timer0 with OCR0A=98-1 (irq every 97.65625 millisecs), baseTimerModuleReloadValue 1
+;
+.if clock == 1000000
+  ; CMP-A interrupt about every 100ms
+  ldi r16, 98-1      ; (1,000,000/1024)/10 = 97.65625
+  out OCR0A, r16
+
+  ldi r16, 1
+  sts baseTimerModuleReloadValue, r16
+  sts baseTimerModuleTickCounter, r16
+.endif
+
+;
+; Settings for clock 8Mhz
+; use timer0 with OCR0A=78 (irq every 9.984 millisecs), baseTimerModuleReloadValue 10
+;
+.if clock == 8000000
+  ; CMP-A interrupt about every 10ms
+  ldi r16, 78-1
+  out OCR0A, r16
+
+  ldi r16, 10
+  sts baseTimerModuleReloadValue, r16
+  sts baseTimerModuleTickCounter, r16
+.endif
+
+
+  ldi r16, (1<<OCF0A)             ; clear pending interrupts
+.ifdef TIFR0
+  out TIFR0, r16
+.else
+  out TIFR, r16
+.endif
+  
+  ldi r16, (1<<OCIE0A)            ; Timer/Counter0 Output Compare Match A Interrupt Enable
+.ifdef TIMSK0
+  out TIMSK0, r16
+.else
+  out TIMSK, r16
+.endif
+  sec
+  ret
+; @end
+
+
+
--- a/avr/devices/all/hw_tn841.asm
+++ b/avr/devices/all/hw_tn841.asm
@@ -77,3 +77,61 @@ systemSleep:



+; ---------------------------------------------------------------------------
+; @routine systemSetupTimer0
+;
+
+systemSetupTimer0:                            ; setup timer for IRQ every 100ms
+  ldi r16, (1<<CS02) | (0<<CS01) | (1<<CS00)  ; Prescaler 1024
+  out TCCR0B, r16
+  
+  ldi r16, (1<<WGM01) | (0<<WGM00)             ; CTC mode
+  out TCCR0A, r16
+
+; Settings for clock 1Mhz (default)
+; use timer0 with OCR0A=98-1 (irq every 97.65625 millisecs), baseTimerModuleReloadValue 1
+;
+.if clock == 1000000
+  ; CMP-A interrupt about every 100ms
+  ldi r16, 98-1      ; (1,000,000/1024)/10 = 97.65625
+  out OCR0A, r16
+
+  ldi r16, 1
+  sts baseTimerModuleReloadValue, r16
+  sts baseTimerModuleTickCounter, r16
+.endif
+
+;
+; Settings for clock 8Mhz
+; use timer0 with OCR0A=78 (irq every 9.984 millisecs), baseTimerModuleReloadValue 10
+;
+.if clock == 8000000
+  ; CMP-A interrupt about every 10ms
+  ldi r16, 78-1
+  out OCR0A, r16
+
+  ldi r16, 10
+  sts baseTimerModuleReloadValue, r16
+  sts baseTimerModuleTickCounter, r16
+.endif
+
+
+  ldi r16, (1<<OCF0A)             ; clear pending interrupts
+.ifdef TIFR0
+  out TIFR0, r16
+.else
+  out TIFR, r16
+.endif
+  
+  ldi r16, (1<<OCIE0A)            ; Timer/Counter0 Output Compare Match A Interrupt Enable
+.ifdef TIMSK0
+  out TIMSK0, r16
+.else
+  out TIMSK, r16
+.endif
+  sec
+  ret
+; @end
+
+
+
--- a/avr/devices/all/hw_tn85.asm
+++ b/avr/devices/all/hw_tn85.asm
@@ -84,4 +84,62 @@ systemSleep:



+; ---------------------------------------------------------------------------
+; @routine systemSetupTimer0
+;
+
+systemSetupTimer0:            ; setup timer for IRQ every 100ms
+  ldi r16, (1<<CS02) | (0<<CS01) | (1<<CS00)  ; Prescaler 1024
+  out TCCR0B, r16
+  
+  ldi r16, (1<<WGM01) | (0<<WGM00)             ; CTC mode
+  out TCCR0A, r16
+
+; Settings for clock 1Mhz (default)
+; use timer0 with OCR0A=98-1 (irq every 97.65625 millisecs), baseTimerModuleReloadValue 1
+;
+.if clock == 1000000
+  ; CMP-A interrupt about every 100ms
+  ldi r16, 98-1      ; (1,000,000/1024)/10 = 97.65625
+  out OCR0A, r16
+
+  ldi r16, 1
+  sts baseTimerModuleReloadValue, r16
+  sts baseTimerModuleTickCounter, r16
+.endif
+
+;
+; Settings for clock 8Mhz
+; use timer0 with OCR0A=78 (irq every 9.984 millisecs), baseTimerModuleReloadValue 10
+;
+.if clock == 8000000
+  ; CMP-A interrupt about every 10ms
+  ldi r16, 78-1
+  out OCR0A, r16
+
+  ldi r16, 10
+  sts baseTimerModuleReloadValue, r16
+  sts baseTimerModuleTickCounter, r16
+.endif
+
+
+  ldi r16, (1<<OCF0A)             ; clear pending interrupts
+.ifdef TIFR0
+  out TIFR0, r16
+.else
+  out TIFR, r16
+.endif
+  
+  ldi r16, (1<<OCIE0A)            ; Timer/Counter0 Output Compare Match A Interrupt Enable
+.ifdef TIMSK0
+  out TIMSK0, r16
+.else
+  out TIMSK, r16
+.endif
+  sec
+  ret
+; @end
+
+
+

--- a/avr/modules/basetimer/main.asm
+++ b/avr/modules/basetimer/main.asm
@@ -51,55 +51,7 @@ BaseTimer_Init:            ; setup timer for IRQ every 100ms
  ldi r17, (baseTimerModuleData_end-baseTimerModuleData)
  rcall Utils_FillSram

-  ldi r16, (1<<CS02) | (0<<CS01) | (1<<CS00)  ; Prescaler 1024
-  out TCCR0B, r16
-  
-  ldi r16, (1<<WGM01) | (0<<WGM00)             ; CTC mode
-  out TCCR0A, r16
-
-
-;
-; Settings for clock 1Mhz (default)
-; use timer0 with OCR0A=98-1 (irq every 97.65625 millisecs), baseTimerModuleReloadValue 1
-;
-.if clock == 1000000
-  ; CMP-A interrupt about every 100ms
-  ldi r16, 98-1      ; (1,000,000/1024)/10 = 97.65625
-  out OCR0A, r16
-
-  ldi r16, 1
-  sts baseTimerModuleReloadValue, r16
-  sts baseTimerModuleTickCounter, r16
-.endif
-
-;
-; Settings for clock 8Mhz
-; use timer0 with OCR0A=78 (irq every 9.984 millisecs), baseTimerModuleReloadValue 10
-;
-.if clock == 8000000
-  ; CMP-A interrupt about every 10ms
-  ldi r16, 78-1
-  out OCR0A, r16
-
-  ldi r16, 10
-  sts baseTimerModuleReloadValue, r16
-  sts baseTimerModuleTickCounter, r16
-.endif
-
-
-  ldi r16, (1<<OCF0A)             ; clear pending interrupts
-.ifdef TIFR0
-  out TIFR0, r16
-.else
-  out TIFR, r16
-.endif
-  
-  ldi r16, (1<<OCIE0A)            ; Timer/Counter0 Output Compare Match A Interrupt Enable
-.ifdef TIMSK0
-  out TIMSK0, r16
-.else
-  out TIMSK, r16
-.endif
+  rcall systemSetupTimer0
  sec
  ret
 ; @end