Improved seeding for random number generation.

avr/utils.asm

@@ -75,17 +75,10 @@ utilsDateString:    .db "%YEAR%-%MONTH%-%DAY%-%HOUR%:%MINUTE%", 0, 0
 ; IN:
 ; OUT:
 ; - CFLAG: set if okay, clear on error
-; USED: R16, R17, R18, X, Y
+; USED: R16, R17, R18, R24, R25, X, Y
 
 Utils_Init:
-  ; preset SRAM data area
-  ldi xh, HIGH(utilsDataBegin)
-  ldi xl, LOW(utilsDataBegin)
-  clr r16
-  ldi r17, (utilsDataEnd-utilsDataBegin)
-  rcall Utils_FillSram
-
-  ; generate initial seed from compile date string
+  ; preset initial seed from compile date string
   ldi zl, LOW(utilsDateString*2)
   ldi zh, HIGH(utilsDateString*2)
   ldi r18, 0xe1
@@ -95,10 +88,38 @@ Utils_Init_l1:
     tst r16
     breq Utils_Init_l2
     eor r18, r16
-    lsl r18
+
+    clc
+    sbrc r19, 7
+      sec        ; only executed if bit 7 is set in r19
+    rol r18
     rol r19
   rjmp Utils_Init_l1
 Utils_Init_l2:
+
+  ; build initial SRAM content into intial seed
+  ldi xl, LOW(SRAM_START)
+  ldi xh, HIGH(SRAM_START)
+  ldi r24, LOW(RAMEND-SRAM_START)
+  ldi r25, HIGH(RAMEND-SRAM_START)
+Utils_Init_l3:
+    ld r16, X+
+    eor r18, r16
+    clc
+    sbrc r19, 7
+      sec        ; only executed if bit 7 is set in r19
+    rol r18
+    rol r19
+    sbiw r25:r24, 1
+  brne Utils_Init_l3
+
+  ; preset SRAM data area
+  ldi xh, HIGH(utilsDataBegin)
+  ldi xl, LOW(utilsDataBegin)
+  clr r16
+  ldi r17, (utilsDataEnd-utilsDataBegin)
+  rcall Utils_FillSram
+
   sts utilsSeed, r18
   sts utilsSeed+1, r19