uart_bitbang2: introduced macros for ATTN irq setup.

This commit is contained in:
Martin Preuss
2025-06-01 19:25:47 +02:00
parent 7403b6650b
commit 8188f33345

View File

@@ -20,6 +20,35 @@
; ***************************************************************************
; macros
.macro mUartBitbangSetupInt0
inr r16, MCUCR
cbr r16, (1<<ISC01) | (1<<ISC00)
sbr r16, (1<<ISC01) | (0<<ISC00) ; falling edge of ATTN
outr MCUCR, r16
; sbr r16, (0<<ISC01) | (0<<ISC00) ; low level triggers
inr r16, COM_IRQ_ADDR_ATTN ; enable irq for ATTN line
sbr r16, (1<<COM_IRQ_BIT_ATTN)
outr COM_IRQ_ADDR_ATTN, r16
.endmacro
.macro mUartBitbangSetupPci
sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
ori r16, (1<<COM_IRQ_GIMSK_ATTN)
out GIMSK, R16
ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
out GIFR, r16
.endmacro
; ***************************************************************************
; data
@@ -57,29 +86,12 @@ UART_BitBang_Init:
; enable IRQ
.ifdef INT0
.if COM_IRQ_BIT_ATTN == INT0
inr r16, MCUCR
cbr r16, (1<<ISC01) | (1<<ISC00)
sbr r16, (1<<ISC01) | (0<<ISC00) ; falling edge of ATTN
outr MCUCR, r16
; sbr r16, (0<<ISC01) | (0<<ISC00) ; low level triggers
inr r16, COM_IRQ_ADDR_ATTN ; enable irq for ATTN line
sbr r16, (1<<COM_IRQ_BIT_ATTN)
outr COM_IRQ_ADDR_ATTN, r16
mUartBitbangSetupInt0
.else
sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
ori r16, (1<<COM_IRQ_GIMSK_ATTN)
out GIMSK, R16
ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
out GIFR, r16
mUartBitbangSetupPci
.endif
.else
sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
ori r16, (1<<COM_IRQ_GIMSK_ATTN)
out GIMSK, R16
ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
out GIFR, r16
mUartBitbangSetupPci
.endif
#if 0