avr: added macros M_UART_HW_Uart_RxCharHalf/FullDuplexIsr
This commit is contained in:
@@ -97,6 +97,10 @@ UART_HW_Uart0_Flush:
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; @clobbers R16 (R17, R18, R24, R25, X)
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; @clobbers R16 (R17, R18, R24, R25, X)
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UART_HW_Uart0_RxCharIsr:
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UART_HW_Uart0_RxCharIsr:
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M_UART_HW_Uart_RxCharHalfDuplexIsr 0
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ret
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#if 0
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; check for errors
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; check for errors
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lds r16, UCSR0A ; check for errors
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lds r16, UCSR0A ; check for errors
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andi r16, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
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andi r16, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
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@@ -178,6 +182,7 @@ UART_HW_Uart0_RxCharIsr_incCounterAndEnterMode:
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std Y+UART_HW_IFACE_OFFS_READMODE, r17 ; set read mode
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std Y+UART_HW_IFACE_OFFS_READMODE, r17 ; set read mode
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UART_HW_Uart0_RxCharIsr_end:
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UART_HW_Uart0_RxCharIsr_end:
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ret
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ret
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#endif
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; @end
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; @end
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@@ -97,6 +97,10 @@ UART_HW_Uart1_Flush:
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; @clobbers R16 (R17, R18, R24, R25, X)
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; @clobbers R16 (R17, R18, R24, R25, X)
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UART_HW_Uart1_RxCharIsr:
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UART_HW_Uart1_RxCharIsr:
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M_UART_HW_Uart_RxCharFullDuplexIsr 1
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ret
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#if 0
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; check for errors
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; check for errors
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lds r16, UCSR1A ; check for errors
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lds r16, UCSR1A ; check for errors
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andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
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andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
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@@ -176,9 +180,7 @@ UART_HW_Uart1_RxCharIsr_incCounterAndEnterMode:
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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std Y+UART_HW_IFACE_OFFS_READMODE, r17 ; set read mode
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std Y+UART_HW_IFACE_OFFS_READMODE, r17 ; set read mode
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UART_HW_Uart1_RxCharIsr_end:
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UART_HW_Uart1_RxCharIsr_end:
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ret
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#endif
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; @end
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ret
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; @end
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; @end
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@@ -131,13 +131,13 @@ l_end_%:
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; ---------------------------------------------------------------------------
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; ---------------------------------------------------------------------------
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; @macro M_UART_HW_Uart_RxCharIsr
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; @macro M_UART_HW_Uart_RxCharHalfDuplexIsr
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;
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;
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; @param %0 UART number ("0" for UART0)
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; @param %0 UART number ("0" for UART0)
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; @param Y pointer to interface data in SRAM
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; @param Y pointer to interface data in SRAM
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; @clobbers R16 (R17, R18, R24, R25, X)
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; @clobbers R16 (R17, R18, R24, R25, X)
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.macro M_UART_HW_Uart_RxCharIsr
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.macro M_UART_HW_Uart_RxCharHalfDuplexIsr
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; check for errors
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; check for errors
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lds r16, UCSR@0A ; check for errors
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lds r16, UCSR@0A ; check for errors
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andi r16, (1<<FE@0) | (1<<DOR@0) | (1<<UPE@0)
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andi r16, (1<<FE@0) | (1<<DOR@0) | (1<<UPE@0)
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@@ -160,10 +160,16 @@ l_skipChar_%:
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rjmp l_end_%
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rjmp l_end_%
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l_storeChar_%:
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l_storeChar_%:
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mov r18, r16 ; r18=received char
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mov r18, r16 ; r18=received char
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; check buffer
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ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
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cpi r16, 0xff
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breq l_overrun_%
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; check for buffer overrun
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; check for buffer overrun
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ldd r17, Y+UART_HW_IFACE_OFFS_READBUFLEFT ; r17=bytes left
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ldd r17, Y+UART_HW_IFACE_OFFS_READBUFLEFT ; r17=bytes left
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tst r17
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tst r17
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breq l_econtent_% ; msg too long
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breq l_econtent_% ; msg too long
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; actually store byte, increment/decrement counters and pos
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; actually store byte, increment/decrement counters and pos
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ldd xl, Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW
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ldd xl, Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW
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ldd xh, Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH
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ldd xh, Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH
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@@ -178,18 +184,21 @@ l_storeChar_%:
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dec r17
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dec r17
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std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r17
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std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r17
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breq l_msgFinished_%
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breq l_msgFinished_%
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; check msg size
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; check msg size
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cpi r18, 2 ; bytes in buffer, exactly 2?
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cpi r18, 2 ; bytes in buffer, exactly 2?
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brne l_end_% ; nope, done
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brne l_end_% ; nope, done
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sbiw xh:xl, 1 ; yes, determine message length (msgLen at previous pos)
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sbiw xh:xl, 1 ; yes, determine message length (msgLen at previous pos)
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ld r16, X+ ; read payload length byte
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ld r16, X+ ; read payload length byte
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subi r16, -3 ; add 3 (dest addr, length, crc byte)
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subi r16, -3 ; add 3 (dest addr, length, crc byte)
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cpi r16, (NET_BUFFERS_SIZE-1) ; total msg length ok?
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cpi r16, (NET_BUFFERS_SIZE-2) ; total msg length ok? (subtract 1 for buffer header byte)
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brcc l_econtent_% ; content error (msg too long)
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brcc l_econtent_% ; content error (msg too long)
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subi r16, 2 ; subtract bytes already received
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subi r16, 2 ; subtract bytes already received
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std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r16 ; set new number of bytes left
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std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r16 ; set new number of bytes left
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brne l_end_% ; jmp if still bytes left to receive
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brne l_end_% ; jmp if still bytes left to receive
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l_msgFinished_%:
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l_msgFinished_%:
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M_UART_HW_Uart_StopRx @0 ; (R16)
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ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
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ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
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ldi r17, UART_HW_READMODE_MSGRECEIVED
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ldi r17, UART_HW_READMODE_MSGRECEIVED
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rjmp l_incCounterAndEnterMode_%
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rjmp l_incCounterAndEnterMode_%
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@@ -202,6 +211,8 @@ l_econtent_%:
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l_overrun_%:
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l_overrun_%:
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ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
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ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
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l_incCounterAndEnterSkipping_%:
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l_incCounterAndEnterSkipping_%:
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M_UART_HW_Uart_StopRx @0 ; (R16)
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M_UART_HW_Uart_Flush @0
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ldi r17, UART_HW_READMODE_SKIPPING
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ldi r17, UART_HW_READMODE_SKIPPING
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l_incCounterAndEnterMode_%:
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l_incCounterAndEnterMode_%:
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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@@ -212,6 +223,99 @@ l_end_%:
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; ---------------------------------------------------------------------------
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; @macro M_UART_HW_Uart_RxCharFullDuplexIsr
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;
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; @param %0 UART number ("0" for UART0)
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; @param Y pointer to interface data in SRAM
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; @clobbers R16 (R17, R18, R24, R25, X)
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.macro M_UART_HW_Uart_RxCharFullDuplexIsr
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; check for errors
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lds r16, UCSR@0A ; check for errors
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andi r16, (1<<FE@0) | (1<<DOR@0) | (1<<UPE@0)
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brne l_hwerr_%
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; read char
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lds r16, UCSR@0A
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sbrs r16, RXC@0
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rjmp l_end_% ; no data
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lds r16, UDR@0 ; r16=received char
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; check read mode
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ldd r17, Y+UART_HW_IFACE_OFFS_READMODE
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cpi r17, UART_HW_READMODE_READING
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breq l_storeChar_%
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cpi r17, UART_HW_READMODE_SKIPPING
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breq l_skipChar_%
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rjmp l_overrun_% ; neither read nor skip mode
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l_skipChar_%:
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clr r16
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std Y+NET_IFACE_OFFS_READTIMER, r16 ; reset read timer
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rjmp l_end_%
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l_storeChar_%:
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mov r18, r16 ; r18=received char
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; check buffer
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ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
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cpi r16, 0xff
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breq l_overrun_%
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; check for buffer overrun
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ldd r17, Y+UART_HW_IFACE_OFFS_READBUFLEFT ; r17=bytes left
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tst r17
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breq l_econtent_% ; msg too long
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; actually store byte, increment/decrement counters and pos
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ldd xl, Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW
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ldd xh, Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH
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st X+, r18 ; r18=byte to store
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clr r16
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std Y+NET_IFACE_OFFS_READTIMER, r16 ; reset read timer
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std Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW, xl
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std Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH, xh
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ldd r18, Y+UART_HW_IFACE_OFFS_READBUFUSED ; r18=bytes in buffer
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inc r18
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std Y+UART_HW_IFACE_OFFS_READBUFUSED, r18
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dec r17
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std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r17
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breq l_msgFinished_%
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; check msg size
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cpi r18, 2 ; bytes in buffer, exactly 2?
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brne l_end_% ; nope, done
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sbiw xh:xl, 1 ; yes, determine message length (msgLen at previous pos)
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ld r16, X+ ; read payload length byte
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subi r16, -3 ; add 3 (dest addr, length, crc byte)
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cpi r16, (NET_BUFFERS_SIZE-2) ; total msg length ok?
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brcc l_econtent_% ; content error (msg too long)
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subi r16, 2 ; subtract bytes already received
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std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r16 ; set new number of bytes left
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brne l_end_% ; jmp if still bytes left to receive
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l_msgFinished_%:
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ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
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ldi r17, UART_HW_READMODE_MSGRECEIVED
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rjmp l_incCounterAndEnterMode_%
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l_hwerr_%:
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ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
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rjmp l_incCounterAndEnterSkipping_%
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l_econtent_%:
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ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
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rjmp l_incCounterAndEnterSkipping_%
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l_overrun_%:
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; ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
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ldi r16, NET_IFACE_OFFS_ERR_MISSED_LOW
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l_incCounterAndEnterSkipping_%:
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ldi r17, UART_HW_READMODE_SKIPPING
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ldi r16, NET_IFACE_OFFS_HANDLED_LOW
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l_incCounterAndEnterMode_%:
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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std Y+UART_HW_IFACE_OFFS_READMODE, r17 ; set read mode
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l_end_%:
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.endmacro
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; @end
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; ---------------------------------------------------------------------------
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; ---------------------------------------------------------------------------
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; @macro M_UART_HW_Uart_TxUdreIsr
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; @macro M_UART_HW_Uart_TxUdreIsr
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;
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;
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