diff --git a/avr/modules/uart_hw/lowlevel_uart0.asm b/avr/modules/uart_hw/lowlevel_uart0.asm
index 58073d3..511fb52 100644
--- a/avr/modules/uart_hw/lowlevel_uart0.asm
+++ b/avr/modules/uart_hw/lowlevel_uart0.asm
@@ -97,6 +97,10 @@ UART_HW_Uart0_Flush:
 ; @clobbers R16 (R17, R18, R24, R25, X)
 
 UART_HW_Uart0_RxCharIsr:
+  M_UART_HW_Uart_RxCharHalfDuplexIsr 0
+  ret
+  
+#if 0
   ; check for errors
   lds r16, UCSR0A                              ; check for errors
   andi r16, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
@@ -178,6 +182,7 @@ UART_HW_Uart0_RxCharIsr_incCounterAndEnterMode:
   std Y+UART_HW_IFACE_OFFS_READMODE, r17        ; set read mode
 UART_HW_Uart0_RxCharIsr_end:
   ret
+#endif
 ; @end
 
 
diff --git a/avr/modules/uart_hw/lowlevel_uart1.asm b/avr/modules/uart_hw/lowlevel_uart1.asm
index 453314c..8ecb625 100644
--- a/avr/modules/uart_hw/lowlevel_uart1.asm
+++ b/avr/modules/uart_hw/lowlevel_uart1.asm
@@ -97,6 +97,10 @@ UART_HW_Uart1_Flush:
 ; @clobbers R16 (R17, R18, R24, R25, X)
 
 UART_HW_Uart1_RxCharIsr:
+  M_UART_HW_Uart_RxCharFullDuplexIsr 1
+  ret
+
+#if 0
   ; check for errors
   lds r16, UCSR1A                              ; check for errors
   andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
@@ -176,9 +180,7 @@ UART_HW_Uart1_RxCharIsr_incCounterAndEnterMode:
   rcall NET_Interface_IncCounter16              ; (R24, R25)
   std Y+UART_HW_IFACE_OFFS_READMODE, r17        ; set read mode
 UART_HW_Uart1_RxCharIsr_end:
-  ret
-; @end
-  ret
+#endif
 ; @end
 
 
diff --git a/avr/modules/uart_hw/m_lowlevel_uart.asm b/avr/modules/uart_hw/m_lowlevel_uart.asm
index 889bf94..d9da1b8 100644
--- a/avr/modules/uart_hw/m_lowlevel_uart.asm
+++ b/avr/modules/uart_hw/m_lowlevel_uart.asm
@@ -131,13 +131,13 @@ l_end_%:
 
 
 ; ---------------------------------------------------------------------------
-; @macro M_UART_HW_Uart_RxCharIsr
+; @macro M_UART_HW_Uart_RxCharHalfDuplexIsr
 ;
 ; @param %0 UART number ("0" for UART0)
 ; @param Y pointer to interface data in SRAM
 ; @clobbers R16 (R17, R18, R24, R25, X)
 
-.macro M_UART_HW_Uart_RxCharIsr
+.macro M_UART_HW_Uart_RxCharHalfDuplexIsr
   ; check for errors
   lds r16, UCSR@0A                              ; check for errors
   andi r16, (1<<FE@0) | (1<<DOR@0) | (1<<UPE@0)
@@ -160,10 +160,16 @@ l_skipChar_%:
   rjmp l_end_%
 l_storeChar_%:
   mov r18, r16                                  ; r18=received char
+  ; check buffer
+  ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
+  cpi r16, 0xff
+  breq l_overrun_%
+
   ; check for buffer overrun
   ldd r17, Y+UART_HW_IFACE_OFFS_READBUFLEFT     ; r17=bytes left
   tst r17
-  breq l_econtent_%                             ; msg too long
+  breq l_econtent_%         ; msg too long
+
   ; actually store byte, increment/decrement counters and pos
   ldd xl, Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW
   ldd xh, Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH
@@ -178,18 +184,21 @@ l_storeChar_%:
   dec r17
   std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r17
   breq l_msgFinished_%
+
   ; check msg size
   cpi r18, 2                                    ; bytes in buffer, exactly 2?
-  brne l_end_%                                  ; nope, done
+  brne l_end_%                                    ; nope, done
   sbiw xh:xl, 1                                 ; yes, determine message length (msgLen at previous pos)
   ld r16, X+                                    ; read payload length byte
   subi r16, -3                                  ; add 3 (dest addr, length, crc byte)
-  cpi r16, (NET_BUFFERS_SIZE-1)                 ; total msg length ok?
-  brcc l_econtent_%                             ; content error (msg too long)
+  cpi r16, (NET_BUFFERS_SIZE-2)                 ; total msg length ok? (subtract 1 for buffer header byte)
+  brcc l_econtent_%                               ; content error (msg too long)
   subi r16, 2                                   ; subtract bytes already received
   std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r16     ; set new number of bytes left
-  brne l_end_%                                  ; jmp if still bytes left to receive
+  brne l_end_%              ; jmp if still bytes left to receive
+
 l_msgFinished_%:
+  M_UART_HW_Uart_StopRx @0                ; (R16)
   ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
   ldi r17, UART_HW_READMODE_MSGRECEIVED
   rjmp l_incCounterAndEnterMode_%
@@ -202,6 +211,8 @@ l_econtent_%:
 l_overrun_%:
   ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
 l_incCounterAndEnterSkipping_%:
+  M_UART_HW_Uart_StopRx @0                ; (R16)
+  M_UART_HW_Uart_Flush @0
   ldi r17, UART_HW_READMODE_SKIPPING
 l_incCounterAndEnterMode_%:
   rcall NET_Interface_IncCounter16              ; (R24, R25)
@@ -212,6 +223,99 @@ l_end_%:
 
 
 
+; ---------------------------------------------------------------------------
+; @macro M_UART_HW_Uart_RxCharFullDuplexIsr
+;
+; @param %0 UART number ("0" for UART0)
+; @param Y pointer to interface data in SRAM
+; @clobbers R16 (R17, R18, R24, R25, X)
+
+.macro M_UART_HW_Uart_RxCharFullDuplexIsr
+  ; check for errors
+  lds r16, UCSR@0A                              ; check for errors
+  andi r16, (1<<FE@0) | (1<<DOR@0) | (1<<UPE@0)
+  brne l_hwerr_%
+  ; read char
+  lds r16, UCSR@0A
+  sbrs r16, RXC@0
+    rjmp l_end_%                                ; no data
+  lds r16, UDR@0                                ; r16=received char
+  ; check read mode
+  ldd r17, Y+UART_HW_IFACE_OFFS_READMODE
+  cpi r17, UART_HW_READMODE_READING
+  breq l_storeChar_%
+  cpi r17, UART_HW_READMODE_SKIPPING
+  breq l_skipChar_%
+  rjmp l_overrun_%                              ; neither read nor skip mode
+l_skipChar_%:
+  clr r16
+  std Y+NET_IFACE_OFFS_READTIMER, r16           ; reset read timer
+  rjmp l_end_%
+l_storeChar_%:
+  mov r18, r16                                  ; r18=received char
+  ; check buffer
+  ldd r16, Y+UART_HW_IFACE_OFFS_READBUFNUM
+  cpi r16, 0xff
+  breq l_overrun_%
+
+  ; check for buffer overrun
+  ldd r17, Y+UART_HW_IFACE_OFFS_READBUFLEFT     ; r17=bytes left
+  tst r17
+  breq l_econtent_%         ; msg too long
+
+  ; actually store byte, increment/decrement counters and pos
+  ldd xl, Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW
+  ldd xh, Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH
+  st X+, r18                                    ; r18=byte to store
+  clr r16
+  std Y+NET_IFACE_OFFS_READTIMER, r16           ; reset read timer
+  std Y+UART_HW_IFACE_OFFS_READBUFPOS_LOW, xl
+  std Y+UART_HW_IFACE_OFFS_READBUFPOS_HIGH, xh
+  ldd r18, Y+UART_HW_IFACE_OFFS_READBUFUSED     ; r18=bytes in buffer
+  inc r18
+  std Y+UART_HW_IFACE_OFFS_READBUFUSED, r18
+  dec r17
+  std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r17
+  breq l_msgFinished_%
+
+  ; check msg size
+  cpi r18, 2                                    ; bytes in buffer, exactly 2?
+  brne l_end_%                                    ; nope, done
+  sbiw xh:xl, 1                                 ; yes, determine message length (msgLen at previous pos)
+  ld r16, X+                                    ; read payload length byte
+  subi r16, -3                                  ; add 3 (dest addr, length, crc byte)
+  cpi r16, (NET_BUFFERS_SIZE-2)                 ; total msg length ok?
+  brcc l_econtent_%                               ; content error (msg too long)
+  subi r16, 2                                   ; subtract bytes already received
+  std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r16     ; set new number of bytes left
+  brne l_end_%              ; jmp if still bytes left to receive
+
+l_msgFinished_%:
+  ldi r16, NET_IFACE_OFFS_PACKETSIN_LOW
+  ldi r17, UART_HW_READMODE_MSGRECEIVED
+  rjmp l_incCounterAndEnterMode_%
+l_hwerr_%:
+  ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
+  rjmp l_incCounterAndEnterSkipping_%
+l_econtent_%:
+  ldi r16, NET_IFACE_OFFS_ERR_CONTENT_LOW
+  rjmp l_incCounterAndEnterSkipping_%
+l_overrun_%:
+;  ldi r16, NET_IFACE_OFFS_ERR_NOBUF_LOW
+  ldi r16, NET_IFACE_OFFS_ERR_MISSED_LOW
+l_incCounterAndEnterSkipping_%:
+  ldi r17, UART_HW_READMODE_SKIPPING
+  ldi r16, NET_IFACE_OFFS_HANDLED_LOW
+l_incCounterAndEnterMode_%:
+  rcall NET_Interface_IncCounter16              ; (R24, R25)
+  std Y+UART_HW_IFACE_OFFS_READMODE, r17        ; set read mode
+l_end_%:
+.endmacro
+; @end
+
+
+
+
 ; ---------------------------------------------------------------------------
 ; @macro M_UART_HW_Uart_TxUdreIsr
 ;