avr: improved timing for sending bytes via com2w interface.

Still quite different among devices but that's just prove that the protocol
works without prior synchronisation.

avr/modules/com2w/com2w.asm

@@ -11,6 +11,41 @@
 #define AVR_MODULES_COM2W_COM2W_H
 
 
+
+.macro M_COM2WCLKSETLOW
+  sbi COM_CLK_DDR, COM_CLK_PIN          ; set CLK as output
+  cbi COM_CLK_OUTPUT, COM_CLK_PIN       ; set CLK low
+.endmacro
+
+
+
+.macro M_COM2WCLKSETHIGH
+  cbi COM_CLK_DDR, COM_CLK_PIN           ; set CLK as input
+.ifndef COM_CLK_PUE
+  cbi COM_CLK_OUTPUT, COM_CLK_PIN        ; disable pullup on CLK
+.endif
+.endmacro
+
+
+
+.macro M_COM2WDATASETLOW
+  sbi COM_DATA_DDR, COM_DATA_PIN          ; set DATA as output
+  cbi COM_DATA_OUTPUT, COM_DATA_PIN       ; set DATA low
+.endmacro
+
+
+
+.macro M_COM2WDATASETHIGH
+  cbi COM_DATA_DDR, COM_DATA_PIN           ; set DATA as input
+.ifndef COM_DATA_PUE
+  cbi COM_DATA_OUTPUT, COM_DATA_PIN        ; disable pullup on DATA
+.endif
+.endmacro
+
+
+
+
+
 .dseg
 
 com2w_iface: .byte COM2W_IFACE_SIZE
@@ -312,27 +347,28 @@ com2wSendBytes_loop:
 ; @clobbers: r16, r17 (r22)
 
 com2wSendByte:
-  ldi r17, 8
+  push r15
+    in r15, SREG
+    ldi r17, 8
 com2wSendByte_loop:
-    rcall com2wClkSetLow
-    rcall com2wWaitTime2                        ; shorter wait period (R22)
-    lsr r16
-    brcs com2wSendByte_send1
-    rcall com2wDataSetLow
-    rjmp com2wSendByte_sent
+      M_COM2WCLKSETLOW
+      out SREG, r15                              ; probably enable irqs
+      rcall com2wWaitTime1                       ; wait for longer time (R22)
+      lsr r16
+      brcs com2wSendByte_send1
+      M_COM2WDATASETLOW
+      rjmp com2wSendByte_sent
 com2wSendByte_send1:
-    rcall com2wDataSetHigh
+      M_COM2WDATASETHIGH
 com2wSendByte_sent:
-    Utils_WaitNanoSecs 5000, 0, r22             ; wait for very short time to ensure data is stable when clock rises
-    push r15                               ; TODO: check this (doesn't really ensure short HIGH time!)
-      in r15, SREG
-      cli                                       ; ensure time period by disabling irqs
-      rcall com2wClkSetHigh
-      rcall com2wWaitTime2                      ; shorter wait period (R22)
-      out SREG, r15
-    pop r15
-    dec r17
-  brne com2wSendByte_loop
+      Utils_WaitNanoSecs 5000, 0, r22            ; wait for very short time to ensure data is stable when clock rises
+      cli                                        ; ensure time period by disabling irqs
+      M_COM2WCLKSETHIGH
+      rcall com2wWaitTime2                       ; wait for shorter time (R22)
+      dec r17
+    brne com2wSendByte_loop
+    out SREG, r15
+  pop r15
   ret
 ; @end
 

avr/modules/com2w/defs.asm

@@ -11,7 +11,7 @@
 #define AVR_MODULES_COM2W_DEFS_H
 
 
-.equ COM2W_WAITTIME1 = 30000
+.equ COM2W_WAITTIME1 = 25000
 .equ COM2W_WAITTIME2 = 15000
 
 .equ COM2W_SKIPPING_MAXREADCOUNTER = 1