avr: more work on hardware based uart module.
This commit is contained in:
@@ -4,7 +4,7 @@
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<extradist>
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crc8.asm
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fixedbuffers.asm
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m_fixedbuffers.asm
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m_ringbuffer.asm
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m_ringbuffer_y.asm
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ringbuffer.asm
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@@ -92,7 +92,7 @@ l_end:
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; @param %1 constant maxBuffers
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; @clobbers r16, X
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.macro m_fixedbuf_locate:
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.macro m_fixedbuf_locate
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cpi r16, @1
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brcc l_end ; idx out of range, use cleared CFLAG
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tst r16 ; doesn't change CFLAG which is set from CPI above
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@@ -70,6 +70,12 @@
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;#define MODULES_MOTION
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.equ UART_HW_FIXEDBUFFERS_NUM = 32
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.equ UART_HW_FIXEDBUFFERS_SIZE = 6
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.equ UART_HW_MSGNUMINBUF_SIZE = 6
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.equ UART_HW_MSGNUMOUTBUF_SIZE = 6
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; ***************************************************************************
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; code segment
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@@ -134,36 +140,13 @@ firmwareStart:
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ldi r16, Low(RAMEND)
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out SPL, r16 ; init LSB stack pointer
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#if 0
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; start by setting all ports as inputs and enable internal pull-up resistors
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ldi r16, 0xff
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clr r17
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.ifdef PORTA
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out DDRA, r17 ; all input
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sts PUEA, r16 ; enable pull-up on all
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.endif
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.ifdef PORTB
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out DDRB, r17 ; all input
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sts PUEB, r16 ; enable pull-up on all
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.endif
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.ifdef PORTC
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out DDRC, r17 ; all input
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sts PUEC, r16 ; enable pull-up on all
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.endif
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#endif
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rcall systemSetSpeed
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rcall initHardware
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; rcall watchdogOff ; turn off watchdog timer (sometimes it stays on after reboot)
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rcall Utils_Init
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rcall BaseTimer_Init
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rcall LedSimple_Init
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rcall initModules
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rcall Utils_SetupUid
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sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out
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sbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; off
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@@ -217,6 +200,40 @@ onSystemTimerTick:
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initHardware:
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; set all ports as inputs and enable internal pull-up resistors
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ldi r16, 0xff
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clr r17
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.ifdef PORTA
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out DDRA, r17 ; all input
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sts PUEA, r16 ; enable pull-up on all
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.endif
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.ifdef PORTB
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out DDRB, r17 ; all input
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sts PUEB, r16 ; enable pull-up on all
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.endif
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.ifdef PORTC
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out DDRC, r17 ; all input
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sts PUEC, r16 ; enable pull-up on all
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.endif
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ret
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; @end
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initModules:
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rcall Utils_Init
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rcall BaseTimer_Init
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rcall LedSimple_Init
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rcall UART_HW_Init
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ret
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; @end
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; ***************************************************************************
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@@ -226,10 +243,19 @@ onSystemTimerTick:
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.include "common/utils_wait_fixed.asm"
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.include "common/utils_copy_from_flash.asm"
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.include "common/utils_copy_sdram.asm"
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.include "common/m_ringbuffer_y.asm"
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.include "common/ringbuffer_y.asm"
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.include "common/m_fixedbuffers.asm"
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.include "common/crc8.asm"
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.include "modules/flash/wait.asm"
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.include "modules/basetimer/main.asm"
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.include "modules/led_simple/main.asm"
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.include "modules/uart_hw/defs.asm"
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.include "modules/uart_hw/buffers.asm"
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.include "modules/uart_hw/lowlevel.asm"
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.include "modules/uart_hw/lowlevel_uart1.asm"
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.include "modules/uart_hw/msglevel_recv.asm"
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.include "modules/uart_hw/msglevel_send.asm"
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@@ -3,7 +3,13 @@
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<gwbuild>
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<extradist>
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buffers.asm
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defs.asm
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init_uart1.asm
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lowlevel.asm
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lowlevel_uart1.asm
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msglevel_recv.asm
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msglevel_send.asm
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</extradist>
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</gwbuild>
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@@ -13,6 +13,8 @@
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uartHwDataBegin:
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; fixed buffers for incoming and outgoing messages
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uartHw_buffers: .byte UART_HW_FIXEDBUFFERS_NUM*UART_HW_FIXEDBUFFERS_SIZE
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uartHw_ringBufferMsgNumIn: .byte UART_HW_MSGNUMINBUF_SIZE
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uartHw_ringBufferMsgNumOut: .byte UART_HW_MSGNUMOUTBUF_SIZE
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uartHwDataEnd:
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@@ -53,18 +55,34 @@ UART_HW_FixedBuffers_Alloc:
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; ---------------------------------------------------------------------------
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; @routine UART_HW_FixedBuffers_Release @global
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; @routine UART_HW_FixedBuffers_ReleaseByAddr @global
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;
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; @param X pointer to start of buffers
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; @clobbers R16
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UART_HW_FixedBuffers_Release:
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UART_HW_FixedBuffers_ReleaseByAddr:
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m_fixedbuf_release
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_FixedBuffers_ReleaseByNum @global
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;
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; @param r16 buffer number
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; @clobbers X (R16)
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UART_HW_FixedBuffers_ReleaseByNum:
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rcall UART_HW_FixedBuffers_Locate ; (R16)
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brcc UART_HW_FixedBuffers_ReleaseByNum_end
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rcall UART_HW_FixedBuffers_ReleaseByAddr ; (R16)
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UART_HW_FixedBuffers_ReleaseByNum_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_FixedBuffers_Locate
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;
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@@ -99,3 +117,88 @@ UART_HW_FixedBuffers_Locate_end:
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; ---------------------------------------------------------------------------
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; @routine UART_HW_AddIncomingMsg @global
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;
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; @return CFLAG on success, cleared on error
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; @param R16 buffer number of the next incoming message
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; @clobbers R17, R18, X
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UART_HW_AddIncomingMsgNum:
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push yl
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push yh
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ldi yl, LOW(uartHw_ringBufferMsgNumIn)
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ldi yh, HIGH(uartHw_ringBufferMsgNumIn)
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rcall RingBufferY_WriteByte ; R17, R18, X
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pop yh
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pop yl
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_GetNextIncomingMsgNum @global
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;
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; @return CFLAG on success, cleared on error
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; @return R16 buffer number of the next incoming message
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; @param Y pointer to start of interface data
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; @clobbers R17, R18, X
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UART_HW_GetNextIncomingMsgNum:
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push yl
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push yh
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ldi yl, LOW(uartHw_ringBufferMsgNumIn)
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ldi yh, HIGH(uartHw_ringBufferMsgNumIn)
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rcall RingBufferY_ReadByte ; R17, R18, X
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pop yh
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pop yl
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_AddOutgoingMsg @global
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;
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; @return CFLAG on success, cleared on error
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; @param R16 buffer number of the next incoming message
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; @clobbers R17, R18, X
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UART_HW_AddOutgoingMsgNum:
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push yl
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push yh
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ldi yl, LOW(uartHw_ringBufferMsgNumOut)
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ldi yh, HIGH(uartHw_ringBufferMsgNumOut)
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rcall RingBufferY_WriteByte ; R17, R18, X
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pop yh
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pop yl
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine UART_HW_GetNextOutgoingMsgNum @global
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;
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; @return CFLAG on success, cleared on error
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; @return R16 buffer number of the next incoming message
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; @param Y pointer to start of interface data
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; @clobbers R17, R18, X
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UART_HW_GetNextOutgoingMsgNum:
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push yl
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push yh
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ldi yl, LOW(uartHw_ringBufferMsgNumOut)
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ldi yh, HIGH(uartHw_ringBufferMsgNumOut)
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rcall RingBufferY_ReadByte ; R17, R18, X
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pop yh
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pop yl
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ret
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; @end
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@@ -22,27 +22,44 @@
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.equ UART_HW_STATUS_UNDERRUN = 0x01
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.equ UART_HW_STATUS_OVERRUN = 0x02
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.equ UART_HW_STATUS_HWERR = 0x04
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.equ UART_HW_STATUS_SOFTERR = 0x08
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.equ UART_HW_STATUS_ATTN = 0x80
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.equ UART_HW_IFACE_OFFS_MODE = 0
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.equ UART_HW_IFACE_OFFS_STATUS = 1
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.equ UART_HW_IFACE_OFFS_READTIMER = 2
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.equ UART_HW_IFACE_OFFS_MODE = 0
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.equ UART_HW_IFACE_OFFS_STATUS = 1
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.equ UART_HW_IFACE_OFFS_READTIMER = 2
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.equ UART_HW_IFACE_OFFS_WRITETIMER = 3
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.equ UART_HW_IFACE_OFFS_ERR_OVR = 4
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.equ UART_HW_IFACE_OFFS_READBUF = 3 ; ringbuffer for incoming chars
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.equ UART_HW_IFACE_OFFS_READBUF_MAX = UART_HW_IFACE_OFFS_READBUF
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.equ UART_HW_IFACE_OFFS_READBUF_USED = UART_HW_IFACE_OFFS_READBUF+1
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.equ UART_HW_IFACE_OFFS_READBUF_RDPOS = UART_HW_IFACE_OFFS_READBUF+2
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.equ UART_HW_IFACE_OFFS_READBUF_WRPOS = UART_HW_IFACE_OFFS_READBUF+3
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.equ UART_HW_IFACE_OFFS_READBUF_DATA = UART_HW_IFACE_OFFS_READBUF+4 ; UART_HW_IFACE_READBUF_SIZE bytes
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; ringbuffer for incoming chars
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.equ UART_HW_IFACE_OFFS_READBUF = 5
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.equ UART_HW_IFACE_OFFS_READBUF_MAX = UART_HW_IFACE_OFFS_READBUF
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.equ UART_HW_IFACE_OFFS_READBUF_USED = UART_HW_IFACE_OFFS_READBUF+1
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.equ UART_HW_IFACE_OFFS_READBUF_RDPOS = UART_HW_IFACE_OFFS_READBUF+2
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.equ UART_HW_IFACE_OFFS_READBUF_WRPOS = UART_HW_IFACE_OFFS_READBUF+3
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.equ UART_HW_IFACE_OFFS_READBUF_DATA = UART_HW_IFACE_OFFS_READBUF+4 ; UART_HW_IFACE_READBUF_SIZE bytes
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.equ UART_HW_IFACE_OFFS_WRITEBUF = UART_HW_IFACE_OFFS_READBUF_DATA+UART_HW_IFACE_READBUF_SIZE
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.equ UART_HW_IFACE_OFFS_WRITEBUF_MAX = UART_HW_IFACE_OFFS_WRITEBUF
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.equ UART_HW_IFACE_OFFS_WRITEBUF_USED = UART_HW_IFACE_OFFS_WRITEBUF+1
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.equ UART_HW_IFACE_OFFS_WRITEBUF_RDPOS = UART_HW_IFACE_OFFS_WRITEBUF+2
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.equ UART_HW_IFACE_OFFS_WRITEBUF_WRPOS = UART_HW_IFACE_OFFS_WRITEBUF+3
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.equ UART_HW_IFACE_OFFS_WRITEBUF_DATA = UART_HW_IFACE_OFFS_WRITEBUF+4
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; ringbuffer for outgoing chars
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.equ UART_HW_IFACE_OFFS_WRITEBUF = UART_HW_IFACE_OFFS_READBUF_DATA+UART_HW_IFACE_READBUF_SIZE
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.equ UART_HW_IFACE_OFFS_WRITEBUF_MAX = UART_HW_IFACE_OFFS_WRITEBUF
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.equ UART_HW_IFACE_OFFS_WRITEBUF_USED = UART_HW_IFACE_OFFS_WRITEBUF+1
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.equ UART_HW_IFACE_OFFS_WRITEBUF_RDPOS = UART_HW_IFACE_OFFS_WRITEBUF+2
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.equ UART_HW_IFACE_OFFS_WRITEBUF_WRPOS = UART_HW_IFACE_OFFS_WRITEBUF+3
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.equ UART_HW_IFACE_OFFS_WRITEBUF_DATA = UART_HW_IFACE_OFFS_WRITEBUF+4
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.equ UART_HW_IFACE_SIZE = UART_HW_IFACE_OFFS_WRITEBUF_DATA+UART_HW_IFACE_WRITEBUF_SIZE
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.equ UART_HW_IFACE_OFFS_READMSG = UART_HW_IFACE_OFFS_WRITEBUF_DATA+UART_HW_IFACE_WRITEBUF_SIZE
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.equ UART_HW_IFACE_OFFS_READMSG_BUFNUM = UART_HW_IFACE_OFFS_READMSG ; 1 byte
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.equ UART_HW_IFACE_OFFS_READMSG_PTR = UART_HW_IFACE_OFFS_READMSG+1 ; 2 bytes
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.equ UART_HW_IFACE_OFFS_READMSG_USED = UART_HW_IFACE_OFFS_READMSG+3 ; 1 byte
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.equ UART_HW_IFACE_OFFS_READMSG_LEFT = UART_HW_IFACE_OFFS_READMSG+4 ; 1 byte
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.equ UART_HW_IFACE_OFFS_WRITEMSG = UART_HW_IFACE_OFFS_READMSG_LEFT+1
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.equ UART_HW_IFACE_OFFS_WRITEMSG_BUFNUM = UART_HW_IFACE_OFFS_WRITEMSG ; 1 byte
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.equ UART_HW_IFACE_OFFS_WRITEMSG_PTR = UART_HW_IFACE_OFFS_WRITEMSG+1 ; 2 bytes
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.equ UART_HW_IFACE_OFFS_WRITEMSG_USED = UART_HW_IFACE_OFFS_WRITEMSG+3 ; 1 byte
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.equ UART_HW_IFACE_OFFS_WRITEMSG_LEFT = UART_HW_IFACE_OFFS_WRITEMSG+4 ; 1 byte
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.equ UART_HW_IFACE_SIZE = UART_HW_IFACE_OFFS_WRITEMSG_LEFT+1
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@@ -27,7 +27,7 @@ UART_HW_Init:
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rcall Utils_FillSram
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rcall UART_HW_FixedBuffers_Init
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ldi r16, UART_HW_MSGNUMINBUF_SIZE
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ldi yl, LOW(uartHw_ringBufferMsgNumIn)
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ldi yh, HIGH(uartHw_ringBufferMsgNumIn)
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@@ -37,7 +37,8 @@ UART_HW_Init:
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ldi yl, LOW(uartHw_ringBufferMsgNumOut)
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ldi yh, HIGH(uartHw_ringBufferMsgNumOut)
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rcall RingBufferY_Init
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sec
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ret
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; @end
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@@ -67,6 +68,9 @@ UART_HW_InterfaceInit:
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UART_HW_IFACE_OFFS_WRITEBUF_RDPOS, \
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UART_HW_IFACE_OFFS_WRITEBUF_WRPOS, \
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UART_HW_IFACE_OFFS_WRITEBUF_DATA
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ldi r16, 0xff
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std Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM, r16
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std Y+UART_HW_IFACE_OFFS_WRITEMSG_BUFNUM, r16
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ret
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; @end
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@@ -84,7 +88,7 @@ UART_HW_InterfaceWriteToReadBuffer:
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push yl
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push yh
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adiw yh:yl, UART_HW_IFACE_OFFS_READBUF
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rcall RingBufferY_WriteByte ; R17, R18, X
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rcall uartHwRingBufferWriteGuarded ; R17, R18, X
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pop yh
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pop yl
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ret
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@@ -104,7 +108,7 @@ UART_HW_InterfaceReadFromReadBuffer:
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push yl
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push yh
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adiw yh:yl, UART_HW_IFACE_OFFS_READBUF
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rcall RingBufferY_ReadByte ; R17, R18, X
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rcall uartHwRingBufferReadGuarded ; R17, R18, X
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pop yh
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pop yl
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ret
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@@ -124,7 +128,7 @@ UART_HW_InterfaceWriteToWriteBuffer:
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push yl
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push yh
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adiw yh:yl, UART_HW_IFACE_OFFS_WRITEBUF
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rcall RingBufferY_WriteByte ; R17, R18, X
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rcall uartHwRingBufferWriteGuarded ; R17, R18, X
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pop yh
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pop yl
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ret
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@@ -144,7 +148,7 @@ UART_HW_InterfaceReadFromWriteBuffer:
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push yl
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push yh
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adiw yh:yl, UART_HW_IFACE_OFFS_WRITEBUF
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rcall RingBufferY_ReadByte ; R17, R18, X
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rcall uartHwRingBufferReadGuarded ; R17, R18, X
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pop yh
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pop yl
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ret
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@@ -152,6 +156,67 @@ UART_HW_InterfaceReadFromWriteBuffer:
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UART_HW_Interface_Run:
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; ---------------------------------------------------------------------------
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; @routine uartHwRingBufferReadGuarded
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;
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; @return CFLAG on success, cleared on error
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; @param r16 byte to write
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; @param Y pointer to start of interface data
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; @clobbers R17, R18, X
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uartHwRingBufferReadGuarded:
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push r15
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in r15, SREG
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cli
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rcall RingBufferY_ReadByte ; R17, R18, X
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brcc uartHwRingBufferReadGuarded_error
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out SREG, r15
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pop r15
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sec
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ret
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uartHwRingBufferReadGuarded_error:
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out SREG, r15
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pop r15
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clc
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine uartHwRingBufferWriteGuarded
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;
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; @return CFLAG on success, cleared on error
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; @param r16 byte to write
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; @param Y pointer to start of interface data
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; @clobbers R17, R18, X
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uartHwRingBufferWriteGuarded:
|
||||
push r15
|
||||
in r15, SREG
|
||||
cli
|
||||
rcall RingBufferY_WriteByte ; R17, R18, X
|
||||
brcc uartHwRingBufferWriteGuarded_error
|
||||
out SREG, r15
|
||||
pop r15
|
||||
sec
|
||||
ret
|
||||
uartHwRingBufferWriteGuarded_error:
|
||||
out SREG, r15
|
||||
pop r15
|
||||
clc
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -119,7 +119,7 @@ UART_HW_TtyOn1_StopTx:
|
||||
|
||||
UART_HW_TtyOn1_RxCharIsr:
|
||||
sbis UCSR1A, RXC1
|
||||
rjmp UART_HW_TtyOn1_RxCharIsr_end ; no data
|
||||
rjmp UART_HW_TtyOn1_RxCharIsr_end ; no data
|
||||
in r16, UDR1
|
||||
rcall UART_HW_InterfaceAddReadByte ; (R17, R18, X)
|
||||
UART_HW_TtyOn1_RxCharIsr_end:
|
||||
|
||||
@@ -20,8 +20,7 @@
|
||||
|
||||
UART_HW_Uart1_StartRx:
|
||||
lds r16, UCSR1B
|
||||
sbr r16, (1<<RXCIE1) ; enable RX complete interrupt
|
||||
sbr r16, (1<<RXEN1) ; enable receive
|
||||
sbr r16, (1<<RXCIE1) | (1<<RXEN1) ; enable RX complete interrupt, enable receive
|
||||
sts UCSR1B, r16
|
||||
ret
|
||||
; @end
|
||||
@@ -35,8 +34,7 @@ UART_HW_Uart1_StartRx:
|
||||
|
||||
UART_HW_Uart1_StopRx:
|
||||
lds r16, UCSR1B
|
||||
cbr r16, (1<<RXCIE1) ; disable RX complete interrupt
|
||||
cbr r16, (1<<RXEN1) ; disable receive
|
||||
cbr r16, (1<<RXCIE1 | (1<<RXEN1)) ; disable RX complete interrupt, disable receive
|
||||
sts UCSR1B, r16
|
||||
ret
|
||||
; @end
|
||||
@@ -51,8 +49,7 @@ UART_HW_Uart1_StopRx:
|
||||
|
||||
UART_HW_Uart1_StartTx:
|
||||
lds r16, UCSR1B
|
||||
sbr r16, (1<<UDRIE1) ; enable TX data register empty interrupt
|
||||
sbr r16, (1<<TXEN1) ; enable transceive
|
||||
sbr r16, (1<<UDRIE1) | (1<<TXEN1) ; enable TX data register empty interrupt, enable transceive
|
||||
sts UCSR1B, r16
|
||||
ret
|
||||
; @end
|
||||
@@ -67,8 +64,7 @@ UART_HW_Uart1_StartTx:
|
||||
|
||||
UART_HW_Uart1_StopTx:
|
||||
lds r16, UCSR1B
|
||||
cbr r16, (1<<UDRIE1) ; disable TX data register empty interrupt
|
||||
cbr r16, (1<<TXEN1) ; disable transceive
|
||||
cbr r16, (1<<UDRIE1) | (1<<TXEN1) ; disable TX data register empty interrupt, disable transceive
|
||||
sts UCSR1B, r16
|
||||
ret
|
||||
; @end
|
||||
@@ -82,22 +78,22 @@ UART_HW_Uart1_StopTx:
|
||||
; @clobbers R16 (R17, R18, X)
|
||||
|
||||
UART_HW_Uart1_RxCharIsr:
|
||||
in r16, UCSR1A ; check for errors
|
||||
lds r16, UCSR1A ; check for errors
|
||||
andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
|
||||
breq UART_HW_Uart1_RxCharIsr_recv
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_STATUS
|
||||
ori r16, UART_HW_STATUS_HWERR
|
||||
std Y+UART_HW_IFACE_OFFS_STATUS, r16
|
||||
rjmp UART_HW_Uart1_RxCharIsr_end
|
||||
breq UART_HW_Uart1_RxCharIsr_recv ; no error, receive next char
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_STATUS ; set error status
|
||||
ori r16, UART_HW_STATUS_HWERR ; -> HWERR
|
||||
rjmp UART_HW_Uart1_RxCharIsr_setStatusAndEnd
|
||||
UART_HW_Uart1_RxCharIsr_recv:
|
||||
lds r16, UCSR1A
|
||||
sbrs r16, RXC1
|
||||
rjmp UART_HW_Uart1_RxCharIsr_end ; no data
|
||||
rjmp UART_HW_Uart1_RxCharIsr_end ; no data
|
||||
lds r16, UDR1
|
||||
rcall UART_HW_InterfaceWriteToReadBuffer ; (R17, R18, X)
|
||||
rcall UART_HW_InterfaceWriteToReadBuffer ; (R17, R18, X)
|
||||
brcs UART_HW_Uart1_RxCharIsr_end
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_STATUS ; set overrun error
|
||||
ori r16, UART_HW_STATUS_OVERRUN
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_STATUS ; set overrun error
|
||||
ori r16, UART_HW_STATUS_OVERRUN ; -> OVERRUN
|
||||
UART_HW_Uart1_RxCharIsr_setStatusAndEnd:
|
||||
std Y+UART_HW_IFACE_OFFS_STATUS, r16
|
||||
UART_HW_Uart1_RxCharIsr_end:
|
||||
ret
|
||||
|
||||
280
avr/modules/uart_hw/msglevel_recv.asm
Normal file
280
avr/modules/uart_hw/msglevel_recv.asm
Normal file
@@ -0,0 +1,280 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
.cseg
|
||||
|
||||
|
||||
UART_HW_Interface_RunRead:
|
||||
rcall uartHwReadEnsureBuffer ; (r16, R17, X)
|
||||
brcc UART_HW_Interface_RunRead_end
|
||||
rcall uartHwReadEnsureHeader ; (r16, r17, r20, r21, X)
|
||||
brcc UART_HW_Interface_RunRead_end
|
||||
rcall uartHwReadEnsureBody ; (r16, r17, r20, r21, x)
|
||||
brcc UART_HW_Interface_RunRead_end
|
||||
UART_HW_Interface_RunRead_HaveMsg:
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_USED
|
||||
cpi r16, 3
|
||||
brcs UART_HW_Interface_RunRead_badMsg
|
||||
; check and store msg
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM
|
||||
rcall UART_HW_AddIncomingMsgNum ; (R17, R18, X)
|
||||
brcs UART_HW_Interface_RunRead_clearBuf
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM
|
||||
rcall UART_HW_FixedBuffers_ReleaseByNum ; (R16, X)
|
||||
UART_HW_Interface_RunRead_clearBuf:
|
||||
ldi r16, 0xff
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM, r16
|
||||
rjmp UART_HW_Interface_RunRead_end
|
||||
UART_HW_Interface_RunRead_badMsg:
|
||||
; reset READ buffer settings, enter skip mode
|
||||
rcall uartHwResetBufferStartSkipping ; (r16, X)
|
||||
UART_HW_Interface_RunRead_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwEnsureReadBuffer
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @clobbers r16 (R17, X)
|
||||
|
||||
uartHwReadEnsureBuffer:
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM
|
||||
cpi r16, 0xff
|
||||
breq uartHwReadEnsureBuffer_alloc
|
||||
uartHwReadEnsureBuffer_SecRet:
|
||||
sec
|
||||
ret
|
||||
uartHwReadEnsureBuffer_alloc:
|
||||
rcall uartHwAllocateReadBuffer ; (r16, R17, X)
|
||||
brcc uartHwReadEnsureBuffer_error
|
||||
rcall uartHwReadSetBuffer ; (r16)
|
||||
rjmp uartHwReadEnsureBuffer_SecRet
|
||||
uartHwReadEnsureBuffer_error:
|
||||
; no buffer, set error status, skip msg
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM
|
||||
rcall UART_HW_FixedBuffers_Locate ; (r16)
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM
|
||||
rcall uartHwReadResetBuffer ; (r16)
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_MODE
|
||||
ori r16, UART_HW_MODE_SKIPPING
|
||||
std Y+UART_HW_IFACE_OFFS_MODE, r16
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_ERR_OVR
|
||||
inc r16
|
||||
breq UART_HW_Interface_RunRead_end
|
||||
std Y+UART_HW_IFACE_OFFS_ERR_OVR, r16
|
||||
clc
|
||||
uartHwReadEnsureBuffer_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwReadSetBuffer
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @param X pointer to start of buffer
|
||||
; @param r16 buffer number
|
||||
; @clobbers r16
|
||||
|
||||
uartHwReadSetBuffer:
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM, r16 ; set buffer data
|
||||
adiw xh:xl, 1
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_PTR, xl
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_PTR+1, xh
|
||||
sbiw xh:xl, 1
|
||||
clr r16
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_USED, r16
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_LEFT, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwReadResetBuffer
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @clobbers r16, X
|
||||
|
||||
uartHwReadResetBuffer:
|
||||
; reset READ buffer settings, enter skip mode
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM
|
||||
rcall UART_HW_FixedBuffers_Locate ; (X)
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM
|
||||
rjmp uartHwReadSetBuffer ; (r16)
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwResetBufferStartSkipping
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @clobbers r16, X
|
||||
|
||||
uartHwResetBufferStartSkipping:
|
||||
; reset READ buffer settings, enter skip mode
|
||||
rcall uartHwReadResetBuffer
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_MODE
|
||||
ori r16, UART_HW_MODE_SKIPPING
|
||||
std Y+UART_HW_IFACE_OFFS_MODE, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwReadEnsureHeader
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @clobbers r16 (r17, r20, r21, X)
|
||||
|
||||
uartHwReadEnsureHeader:
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_LEFT
|
||||
tst r16
|
||||
breq uartHwReadEnsureHeader_readHeader
|
||||
sec
|
||||
ret
|
||||
uartHwReadEnsureHeader_readHeader:
|
||||
; read and validate header (2 bytes)
|
||||
rcall uartHwReadAndValidateHeader ; (r16, r17, r20, r21, X)
|
||||
brcc UART_HW_Interface_RunRead_badMsg
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_USED
|
||||
cpi r16, 2 ; full header in buffer (2 bytes)?
|
||||
brcs UART_HW_Interface_RunRead_end ; nope, done for this round
|
||||
uartHwReadEnsureHeader_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwReadEnsureBody
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @clobbers r20 (r16, r17, r21, x)
|
||||
|
||||
uartHwReadEnsureBody:
|
||||
ldd r20, Y+UART_HW_IFACE_OFFS_READMSG_LEFT
|
||||
tst r20
|
||||
sec
|
||||
breq uartHwReadEnsureBody_end ; no bytes left, message done
|
||||
rcall uartHwReadUptoNumBytes ; (r16, r17, r20, r21, X)
|
||||
ldd r20, Y+UART_HW_IFACE_OFFS_READMSG_LEFT
|
||||
tst r20
|
||||
sec
|
||||
breq uartHwReadEnsureBody_end ; no bytes left, message done
|
||||
clc
|
||||
uartHwReadEnsureBody_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwAllocateReadBuffer
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @clobbers r16 (R17, X)
|
||||
|
||||
uartHwAllocateReadBuffer:
|
||||
rcall UART_HW_FixedBuffers_Alloc ; (R16, R17, X)
|
||||
brcc uartHwAllocateReadBuffer_end
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_BUFNUM, r16
|
||||
adiw xh:xl, 1
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_PTR, xl
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_PTR+1, xh
|
||||
clr r16
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_USED, r16
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_LEFT, r16
|
||||
sec
|
||||
uartHwAllocateReadBuffer_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwReadAndValidateHeader
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @clobbers r16, r20, X (r17, r21)
|
||||
|
||||
uartHwReadAndValidateHeader:
|
||||
; read until we have 2 bytes
|
||||
ldi r20, 2
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_USED
|
||||
sub r20, r16
|
||||
rcall uartHwReadUptoNumBytes ; (r16, r17, r20, r21, X)
|
||||
; check whether we have 2 bytes
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_USED
|
||||
cpi r16, 2
|
||||
brcs uartHwReadAndValidateHeader_ok ; < 2 bytes in buffer, nothing to do
|
||||
; read and check msg len
|
||||
ldd xl, Y+UART_HW_IFACE_OFFS_READMSG_PTR
|
||||
ldd xh, Y+UART_HW_IFACE_OFFS_READMSG_PTR+1
|
||||
sbiw xh:xl, 1 ; go back one byte, pointing to MSG_LEN
|
||||
ld r16, X
|
||||
cpi r16, UART_HW_FIXEDBUFFERS_SIZE-4 ; minus buffer status byte, dest addr, msglen, crc
|
||||
brcc uartHwReadAndValidateHeader_error ; bad msg length
|
||||
; set number of bytes left to read
|
||||
inc r16 ; account for crc byte
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_LEFT, r16
|
||||
uartHwReadAndValidateHeader_ok:
|
||||
sec
|
||||
ret
|
||||
uartHwReadAndValidateHeader_error:
|
||||
clc
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwReadUptoNumBytes
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @param R20 number of bytes to read
|
||||
; @clobbers r16, r20, r21, X (R17)
|
||||
|
||||
uartHwReadUptoNumBytes:
|
||||
clr r21
|
||||
ldd xl, Y+UART_HW_IFACE_OFFS_READMSG_PTR
|
||||
ldd xh, Y+UART_HW_IFACE_OFFS_READMSG_PTR+1
|
||||
uartHwReadUptoNumBytes_loop:
|
||||
push xl
|
||||
push xh
|
||||
rcall UART_HW_InterfaceReadFromWriteBuffer ; (R17, R18, X)
|
||||
pop xh
|
||||
pop xl
|
||||
brcc uartHwReadUptoNumBytes_done
|
||||
st X+, r16
|
||||
inc r21
|
||||
dec r20
|
||||
brne uartHwReadUptoNumBytes_loop
|
||||
uartHwReadUptoNumBytes_done:
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_USED
|
||||
add r16, r21
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_USED, r16
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_READMSG_LEFT
|
||||
sub r16, r21
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_LEFT, r16 ; might become negative when reading header
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_PTR, xl
|
||||
std Y+UART_HW_IFACE_OFFS_READMSG_PTR+1, xh
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
86
avr/modules/uart_hw/msglevel_send.asm
Normal file
86
avr/modules/uart_hw/msglevel_send.asm
Normal file
@@ -0,0 +1,86 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
.cseg
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine UART_HW_Interface_RunWrite @global
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @clobbers r16, r19, X (R17, R18, R20, R21)
|
||||
|
||||
UART_HW_Interface_RunWrite:
|
||||
ldd r19, Y+UART_HW_IFACE_OFFS_WRITEMSG_BUFNUM
|
||||
cpi r19, 0xff
|
||||
brne UART_HW_Interface_RunWrite_haveMsg
|
||||
rcall UART_HW_GetNextOutgoingMsgNum ; (R17, R18, X)
|
||||
rcall UART_HW_FixedBuffers_Locate ; (R16)
|
||||
brcc UART_HW_Interface_RunWrite_end
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_BUFNUM, r19
|
||||
adiw xh:xl, 1
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_PTR, xl
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_PTR+1, xh
|
||||
adiw xh:xl, 1 ; get msg len
|
||||
ld r16, X
|
||||
inc r16
|
||||
inc r16
|
||||
inc r16
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_LEFT, r16
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_USED, r16
|
||||
UART_HW_Interface_RunWrite_haveMsg:
|
||||
ldd r20, Y+UART_HW_IFACE_OFFS_WRITEMSG_LEFT
|
||||
rcall uartHwWriteUptoNumBytes ; (r16, r17, r18, r20, r21, X)
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_WRITEMSG_LEFT
|
||||
tst r16
|
||||
brne UART_HW_Interface_RunWrite_end ; still bytes left to write
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_WRITEMSG_BUFNUM
|
||||
rcall UART_HW_FixedBuffers_ReleaseByNum
|
||||
ldi r16, 0xff ; reset buffer number
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_BUFNUM, r16
|
||||
UART_HW_Interface_RunWrite_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine uartHwWriteUptoNumBytes
|
||||
;
|
||||
; @param Y pointer to start of interface data
|
||||
; @param R20 number of bytes to read
|
||||
; @clobbers r16, r20, r21, X (R17, R18)
|
||||
|
||||
uartHwWriteUptoNumBytes:
|
||||
clr r21
|
||||
ldd xl, Y+UART_HW_IFACE_OFFS_WRITEMSG_PTR
|
||||
ldd xh, Y+UART_HW_IFACE_OFFS_WRITEMSG_PTR+1
|
||||
uartHwWriteUptoNumBytes_loop:
|
||||
ld r16, X+
|
||||
push xl
|
||||
push xh
|
||||
rcall UART_HW_InterfaceWriteToWriteBuffer ; (R17, R18, X)
|
||||
pop xh
|
||||
pop xl
|
||||
brcc uartHwWriteUptoNumBytes_done
|
||||
inc r21
|
||||
dec r20
|
||||
brne uartHwWriteUptoNumBytes_loop
|
||||
uartHwWriteUptoNumBytes_done:
|
||||
ldd r16, Y+UART_HW_IFACE_OFFS_WRITEMSG_LEFT
|
||||
sub r16, r21
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_LEFT, r16
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_PTR, xl
|
||||
std Y+UART_HW_IFACE_OFFS_WRITEMSG_PTR+1, xh
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user