avr: added devices, more work on modules.
This commit is contained in:
Martin Preuss
221
avr/devices/x03/uart/main.asm
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221
avr/devices/x03/uart/main.asm
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; ***************************************************************************
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; copyright : (C) 2024 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; ***************************************************************************
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; Source file for temperature sensor node on AtTiny 84
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;
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; This is for the full system (i.e. not the boot loader).
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;
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; All definitions and changes should go into this file.
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;
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;
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; ***************************************************************************
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; .equ clock=1000000 ; Define the clock frequency
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.equ clock=8000000 ; Define the clock frequency
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.nolist
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.include "include/tn84def.inc" ; Define device ATtiny84
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.list
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.include "defs_all.asm"
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.include "./defs.asm"
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; ***************************************************************************
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; defines
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; ---------------------------------------------------------------------------
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; generic
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.include "common/utils_wait.asm"
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; ---------------------------------------------------------------------------
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; firmware settings including list of modules used
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.equ FIRMWARE_VERSION_MAJOR = 0
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.equ FIRMWARE_VERSION_MINOR = 0
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.equ FIRMWARE_VERSION_PATCHLEVEL = 1
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; ***************************************************************************
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; code segment
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.cseg
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.org 000000
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; ---------------------------------------------------------------------------
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; Reset and interrupt vectors (will be removed as soon as we can flash data over COM)
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; rjmp main ; Reset vector
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rjmp BOOTLOADER_ADDR ; Reset vector ; use this for flashed system
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reti ; EXT_INT0
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reti ; PCI0
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reti ; PCI1
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reti ; WATCHDOG
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reti ; ICP1
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reti ; OC1A
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reti ; OC1B
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reti ; OVF1
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rjmp uartIrqIsrOC0A ; OC0A
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reti ; OC0B
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reti ; OVF0
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reti ; ACI
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reti ; ADCC
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reti ; ERDY
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reti ; USI_STR
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reti ; USI_OVF
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devInfoBlock: ; 12 bytes
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devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
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devInfoId: .db 'X', 0
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devInfoVersion: .db 3, 0 ; version, revision
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firmwareVersion: .db FIRMWARE_VARIANT_ROUTER, FIRMWARE_VERSION_MAJOR
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.db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
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firmwareStart: rjmp main
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; ***************************************************************************
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; includes
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.include "common/utils.asm"
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.include "common/utils_wait_fixed.asm"
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;.include "common/utils_copy_from_flash.asm"
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;.include "common/utils_copy_sdram.asm"
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.include "common/crc8.asm"
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#include "modules/uart_irq/defs.asm"
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#include "modules/uart_irq/iface.asm"
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#include "modules/uart_irq/iface1.asm"
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#include "modules/uart_irq/iface2.asm"
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; ***************************************************************************
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; data in SRAM
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.dseg
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programRamBegin:
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ledTimer: .byte 1
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programRamEnd:
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; ***************************************************************************
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; data in FLASH
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.cseg
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main:
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ldi xh, HIGH(programRamBegin)
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ldi xl, LOW(programRamBegin)
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clr r16
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ldi r17, (programRamEnd-programRamBegin)
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rcall Utils_FillSram
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rcall init
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sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out
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cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on
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clr r16
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sts ledTimer, r16
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sei
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main_loop:
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; rcall writeTestByteToIface2
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; rcall copyFromIface1To2
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; brcc main_sleep
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; rjmp main_loop
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main_sleep:
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; only modify SE, SM1 and SM0
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cli
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in r16, MCUCR
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ldi r17, (1<<SE) | (1<<SM1) | (1<<SM0)
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neg r17
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and r16, r17
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ori r16, (1<<SE) ; sleep mode "idle", enable
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out MCUCR, r16
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sei ; make sure interrupts really are enabled
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sleep ; sleep, wait for interrupt
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lds r16, ledTimer
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dec r16
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sts ledTimer, r16
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brne main_loop
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sbi LED_SIMPLE_PORTIN, LED_SIMPLE_PINNUM ; toggle
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rcall writeTestByteToIface2
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rjmp main_loop
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init:
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rcall systemSetSpeed
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rcall Utils_Init
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rcall UART_Irq_InitIface1
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rcall UART_Irq_InitIface2
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rcall uart_irq_timer_init
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ret
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copyFromIface1To2:
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ldi yl, LOW(uartIrqDataIface1)
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ldi yh, HIGH(uartIrqDataIface1)
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rcall uart_irq_rdbuf_readbyte
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brcs copyFromIface1To2_gotOne
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ret
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copyFromIface1To2_gotOne:
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ldi yl, LOW(uartIrqDataIface2)
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ldi yh, HIGH(uartIrqDataIface2)
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rcall uart_irq_wrbuf_writebyte
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sec
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ret
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writeTestByteToIface2:
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ldi yl, LOW(uartIrqDataIface2)
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ldi yh, HIGH(uartIrqDataIface2)
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ldi r16, 0x55
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rjmp uart_irq_wrbuf_writebyte
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systemSetSpeed:
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;.if clock == 8000000
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ldi r16, (1<<CLKPCE)
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ldi r17, 0
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out CLKPR, r16
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out CLKPR, r17
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;.endif
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ret
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systemSetBootSpeed:
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.if clock == 8000000
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ldi r16, (1<<CLKPCE)
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ldi r17, (1<<CLKPS1) | (1<<CLKPS0)
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out CLKPR, r16
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out CLKPR, r17
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.endif
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ret
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