From 4dc6031d0304eb8cc7c53cbe6e0acce70d7f1494 Mon Sep 17 00:00:00 2001 From: Martin Preuss Date: Sun, 15 Dec 2024 18:20:54 +0100 Subject: [PATCH] avr: added devices, more work on modules. --- avr/devices/0BUILD | 5 + avr/devices/n00/n00_boot.asm | 2 +- avr/devices/n00/n00_main.asm | 4 +- avr/devices/n06/n06_boot.asm | 2 +- avr/devices/n06/n06_main.asm | 4 +- avr/devices/n11/n11_boot.asm | 2 +- avr/devices/n11/n11_defs.asm | 20 +- avr/devices/n11/n11_main.asm | 45 ++- avr/devices/n12/n12_boot.asm | 2 +- avr/devices/n12/n12_main.asm | 5 +- avr/devices/n14/n14_boot.asm | 2 +- avr/devices/n14/n14_main.asm | 6 +- avr/devices/n15/n15_boot.asm | 2 +- avr/devices/n15/n15_main.asm | 8 +- avr/devices/n16/.gitignore | 2 + avr/devices/n16/0BUILD | 52 +++ avr/devices/n16/n16_boot.asm | 162 ++++++++ avr/devices/n16/n16_defs.asm | 187 +++++++++ avr/devices/n16/n16_main.asm | 476 +++++++++++++++++++++++ avr/devices/n17/.gitignore | 2 + avr/devices/n17/0BUILD | 52 +++ avr/devices/n17/n17_boot.asm | 162 ++++++++ avr/devices/n17/n17_defs.asm | 123 ++++++ avr/devices/n17/n17_main.asm | 459 ++++++++++++++++++++++ avr/devices/n18/.gitignore | 2 + avr/devices/n18/0BUILD | 52 +++ avr/devices/n18/boot.asm | 124 ++++++ avr/devices/n18/defs.asm | 98 +++++ avr/devices/n18/main.asm | 379 ++++++++++++++++++ avr/devices/r02/.gitignore | 2 + avr/devices/r02/0BUILD | 52 +++ avr/devices/r02/r02_boot.asm | 163 ++++++++ avr/devices/r02/r02_defs.asm | 87 +++++ avr/devices/r02/r02_main.asm | 448 +++++++++++++++++++++ avr/devices/x03/0BUILD | 11 + avr/devices/x03/ccs811/0BUILD | 52 +++ avr/devices/x03/ccs811/boot.asm | 124 ++++++ avr/devices/x03/ccs811/defs.asm | 134 +++++++ avr/devices/x03/ccs811/main.asm | 339 ++++++++++++++++ avr/devices/x03/uart/.gitignore | 2 + avr/devices/x03/uart/0BUILD | 52 +++ avr/devices/x03/uart/boot.asm | 162 ++++++++ avr/devices/x03/uart/defs.asm | 72 ++++ avr/devices/x03/uart/main.asm | 221 +++++++++++ avr/modules/0BUILD | 19 +- avr/modules/ccs811/main.asm | 76 +--- avr/modules/cny70/main.asm | 14 +- avr/modules/com2/README | 12 +- avr/modules/com2/main.asm | 40 +- avr/modules/motion/main.asm | 2 +- avr/modules/uart_bitbang/bytelevel.asm | 2 +- avr/modules/uart_bitbang/packetlevel.asm | 2 +- avr/modules/uart_irq/defs.asm | 18 +- avr/modules/uart_irq/iface.asm | 291 ++++++++++++-- avr/modules/uart_irq/iface1.asm | 16 + avr/modules/uart_irq/iface2.asm | 39 ++ devices/nodes/0BUILD | 3 + devices/nodes/aqua_n11.xml | 4 +- devices/nodes/aqua_n16.xml | 15 + devices/nodes/aqua_n17.xml | 13 + devices/nodes/aqua_n18.xml | 14 + 61 files changed, 4758 insertions(+), 184 deletions(-) create mode 100644 avr/devices/n16/.gitignore create mode 100644 avr/devices/n16/0BUILD create mode 100644 avr/devices/n16/n16_boot.asm create mode 100644 avr/devices/n16/n16_defs.asm create mode 100644 avr/devices/n16/n16_main.asm create mode 100644 avr/devices/n17/.gitignore create mode 100644 avr/devices/n17/0BUILD create mode 100644 avr/devices/n17/n17_boot.asm create mode 100644 avr/devices/n17/n17_defs.asm create mode 100644 avr/devices/n17/n17_main.asm create mode 100644 avr/devices/n18/.gitignore create mode 100644 avr/devices/n18/0BUILD create mode 100644 avr/devices/n18/boot.asm create mode 100644 avr/devices/n18/defs.asm create mode 100644 avr/devices/n18/main.asm create mode 100644 avr/devices/r02/.gitignore create mode 100644 avr/devices/r02/0BUILD create mode 100644 avr/devices/r02/r02_boot.asm create mode 100644 avr/devices/r02/r02_defs.asm create mode 100644 avr/devices/r02/r02_main.asm create mode 100644 avr/devices/x03/0BUILD create mode 100644 avr/devices/x03/ccs811/0BUILD create mode 100644 avr/devices/x03/ccs811/boot.asm create mode 100644 avr/devices/x03/ccs811/defs.asm create mode 100644 avr/devices/x03/ccs811/main.asm create mode 100644 avr/devices/x03/uart/.gitignore create mode 100644 avr/devices/x03/uart/0BUILD create mode 100644 avr/devices/x03/uart/boot.asm create mode 100644 avr/devices/x03/uart/defs.asm create mode 100644 avr/devices/x03/uart/main.asm create mode 100644 avr/modules/uart_irq/iface2.asm create mode 100644 devices/nodes/aqua_n16.xml create mode 100644 devices/nodes/aqua_n17.xml create mode 100644 devices/nodes/aqua_n18.xml diff --git a/avr/devices/0BUILD b/avr/devices/0BUILD index 43c55b6..4c6383c 100644 --- a/avr/devices/0BUILD +++ b/avr/devices/0BUILD @@ -9,6 +9,11 @@ n12 n14 n15 + n16 + n17 + n18 + r02 + x03 diff --git a/avr/devices/n00/n00_boot.asm b/avr/devices/n00/n00_boot.asm index 3ffde72..091630b 100644 --- a/avr/devices/n00/n00_boot.asm +++ b/avr/devices/n00/n00_boot.asm @@ -13,7 +13,7 @@ .list .include "n00_defs.asm" -.include "defs.asm" +.include "defs_all.asm" diff --git a/avr/devices/n00/n00_main.asm b/avr/devices/n00/n00_main.asm index bb7be1b..865c11b 100644 --- a/avr/devices/n00/n00_main.asm +++ b/avr/devices/n00/n00_main.asm @@ -30,7 +30,7 @@ .list .include "n00_defs.asm" -.include "defs.asm" +.include "defs_all.asm" @@ -248,7 +248,7 @@ timerList: -.include "main.asm" +.include "main_all.asm" systemSetSpeed: diff --git a/avr/devices/n06/n06_boot.asm b/avr/devices/n06/n06_boot.asm index 75a6d90..db50431 100644 --- a/avr/devices/n06/n06_boot.asm +++ b/avr/devices/n06/n06_boot.asm @@ -13,7 +13,7 @@ .list .include "n06_defs.asm" -.include "defs.asm" +.include "defs_all.asm" diff --git a/avr/devices/n06/n06_main.asm b/avr/devices/n06/n06_main.asm index e702372..53bd951 100644 --- a/avr/devices/n06/n06_main.asm +++ b/avr/devices/n06/n06_main.asm @@ -30,7 +30,7 @@ .list .include "n06_defs.asm" -.include "defs.asm" +.include "defs_all.asm" @@ -248,7 +248,7 @@ timerList: -.include "main.asm" +.include "main_all.asm" systemSetSpeed: diff --git a/avr/devices/n11/n11_boot.asm b/avr/devices/n11/n11_boot.asm index f94bd4b..3b10a06 100644 --- a/avr/devices/n11/n11_boot.asm +++ b/avr/devices/n11/n11_boot.asm @@ -13,7 +13,7 @@ .list .include "n11_defs.asm" -.include "defs.asm" +.include "defs_all.asm" diff --git a/avr/devices/n11/n11_defs.asm b/avr/devices/n11/n11_defs.asm index e4d81c8..269761f 100644 --- a/avr/devices/n11/n11_defs.asm +++ b/avr/devices/n11/n11_defs.asm @@ -49,14 +49,11 @@ .equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400 .equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter -.equ COM_TXD_DDR = DDRA -.equ COM_TXD_DATA = PORTA -.equ COM_TXD_PIN = PORTA1 -.equ COM_RXD_DDR = DDRA -.equ COM_RXD_INPUT = PINA -.equ COM_RXD_OUTPUT = PORTA -.equ COM_RXD_PIN = PORTA1 +.equ COM_DATA_DDR = DDRA +.equ COM_DATA_INPUT = PINA +.equ COM_DATA_OUTPUT = PORTA +.equ COM_DATA_PIN = PORTA1 .equ COM_ATTN_DDR = DDRA .equ COM_ATTN_INPUT = PINA @@ -74,7 +71,7 @@ ; TWI master module ;.equ TWI_BIT_LENGTH = 10000 ; 100000 and 200000 works for display: 10000, 100000, 200000 -.equ TWI_BIT_LENGTH = 1 ; 10, 100, 500, 100000 and 200000 works for display: 10000, 100000, 200000 +.equ TWI_BIT_LENGTH = 10000 ; 10, 100, 500, 100000 and 200000 works for display: 10000, 100000, 200000 .equ TWI_DDR_SCL = DDRA .equ TWI_PORT_SCL = PORTA @@ -162,3 +159,10 @@ +; --------------------------------------------------------------------------- +; CCS 811 +; + +.equ CCS811_ADDR = 0x5a ; or 0x5b + + diff --git a/avr/devices/n11/n11_main.asm b/avr/devices/n11/n11_main.asm index a21c478..52c11c6 100644 --- a/avr/devices/n11/n11_main.asm +++ b/avr/devices/n11/n11_main.asm @@ -31,7 +31,7 @@ .list .include "n11_defs.asm" -.include "defs.asm" +.include "defs_all.asm" @@ -64,9 +64,10 @@ #define MODULES_SI7021 #define MODULES_STATS ;#define MODULES_CNY70 -#define MODULES_REED +;#define MODULES_REED ;#define MODULES_OWI_MASTER ;#define MODULES_DS18B20 +#define MODULES_CCS811 ; --------------------------------------------------------------------------- @@ -80,6 +81,11 @@ .equ VALUE_ID_REED2 = 0x05 .equ VALUE_ID_DS18B20_TEMP = 0x06 +.equ VALUE_ID_CO2 = 0x07 +.equ VALUE_ID_TVOC = 0x08 + +.equ VALUE_ID_DEBUG = 0x7f + .equ VALUE_ID_REED_CONF = 0x81 @@ -196,6 +202,10 @@ firmwareStart: rjmp main .include "modules/reed/main.asm" #endif +#ifdef MODULES_CCS811 + .include "modules/ccs811/main.asm" +#endif + ; *************************************************************************** @@ -233,6 +243,10 @@ sramTimerEnqueueValues: .byte 2 sramSendDs18b20TempTimer: .byte 2 #endif +#ifdef MODULES_CCS811 + sramCcs811Timer: .byte 2 +#endif + ; *************************************************************************** ; data in FLASH @@ -269,6 +283,9 @@ timerList: #ifdef MODULES_DS18B20 .dw sramDs18b20Timer, Ds18b20_OnTimer, 0, 300 ; every 30s .dw sramSendDs18b20TempTimer, sendDs18b20Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif +#ifdef MODULES_CCS811 + .dw sramCcs811Timer, CCS811_OnTimer, 0, 10 ; every 1s #endif .dw 0 ; end of list @@ -276,7 +293,7 @@ timerList: -.include "main.asm" +.include "main_all.asm" @@ -313,6 +330,28 @@ onSystemStart: ret +#ifdef MODULES_CCS811 +handleCcsTimer: + rjmp sendCcs811Data + + +sendCcs811Data: + ldi r16, 0xff ; destination address + ldi r17, VALUE_ID_DEBUG ; value id + ldi r22, 0 +; lds r18, ccs811ResponseData ; value + lds r18, ccs811Flags ; value + lds r19, ccs811ResponseData ; denominator + ldi r20, 1 + clr r21 + + ldi xl, LOW(com2SendBuffer) + ldi xh, HIGH(com2SendBuffer) + rcall CPRO_WriteReportValue + rjmp COM2_SendPacket +#endif + + #ifdef MODULES_LCD printScreen: diff --git a/avr/devices/n12/n12_boot.asm b/avr/devices/n12/n12_boot.asm index f2c3ad9..d1ef94f 100644 --- a/avr/devices/n12/n12_boot.asm +++ b/avr/devices/n12/n12_boot.asm @@ -15,7 +15,7 @@ .list .include "n12_defs.asm" -.include "defs.asm" +.include "defs_all.asm" diff --git a/avr/devices/n12/n12_main.asm b/avr/devices/n12/n12_main.asm index 7336056..952fe86 100644 --- a/avr/devices/n12/n12_main.asm +++ b/avr/devices/n12/n12_main.asm @@ -23,7 +23,8 @@ .list .include "n12_defs.asm" -.include "defs.asm" +.include "defs_all.asm" + .include "common/utils_wait.asm" ; wait macro @@ -259,7 +260,7 @@ timerList: -.include "main.asm" +.include "main_all.asm" systemSetSpeed: diff --git a/avr/devices/n14/n14_boot.asm b/avr/devices/n14/n14_boot.asm index 2a2da8e..8643b7e 100644 --- a/avr/devices/n14/n14_boot.asm +++ b/avr/devices/n14/n14_boot.asm @@ -15,7 +15,7 @@ .list .include "n14_defs.asm" -.include "defs.asm" +.include "defs_all.asm" diff --git a/avr/devices/n14/n14_main.asm b/avr/devices/n14/n14_main.asm index 169d348..5f2eea0 100644 --- a/avr/devices/n14/n14_main.asm +++ b/avr/devices/n14/n14_main.asm @@ -23,7 +23,7 @@ .list .include "n14_defs.asm" -.include "defs.asm" +.include "defs_all.asm" .include "common/utils_wait.asm" ; wait macro @@ -198,7 +198,7 @@ timerList: .dw cproAddresModeTimer, CPRO_Address_OnTimer, 0, 0 ; (no restart) #endif #ifdef MODULES_STATS - .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 3000 ; every 5m + .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 9000 ; every 15m #endif #ifdef MODULES_DS18B20 .dw sramDs18b20Timer, Ds18b20_OnTimer, 0, 300 ; every 30s @@ -210,7 +210,7 @@ timerList: -.include "main.asm" +.include "main_all.asm" ; --------------------------------------------------------------------------- diff --git a/avr/devices/n15/n15_boot.asm b/avr/devices/n15/n15_boot.asm index 1994d13..094fb1b 100644 --- a/avr/devices/n15/n15_boot.asm +++ b/avr/devices/n15/n15_boot.asm @@ -13,7 +13,7 @@ .list .include "n15_defs.asm" -.include "defs.asm" +.include "defs_all.asm" diff --git a/avr/devices/n15/n15_main.asm b/avr/devices/n15/n15_main.asm index f27a720..f758108 100644 --- a/avr/devices/n15/n15_main.asm +++ b/avr/devices/n15/n15_main.asm @@ -31,7 +31,7 @@ .list .include "n15_defs.asm" -.include "defs.asm" +.include "defs_all.asm" @@ -61,7 +61,7 @@ #define MODULES_TWI_MASTER ;#define MODULES_LCD #define LCD_MINIMAL_FONT -;#define MODULES_SI7021 +#define MODULES_SI7021 #define MODULES_STATS ;#define MODULES_CNY70 ;#define MODULES_REED @@ -259,7 +259,7 @@ timerList: .dw cproAddresModeTimer, CPRO_Address_OnTimer, 0, 0 ; (no restart) #endif #ifdef MODULES_STATS - .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 3000 ; every 5m + .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 9000 ; every 15m #endif #ifdef MODULES_LCD ; .dw sramPeriodicalLcdMark, periodicalLcdMark, 0, 20 ; every 2s @@ -284,7 +284,7 @@ timerList: -.include "main.asm" +.include "main_all.asm" diff --git a/avr/devices/n16/.gitignore b/avr/devices/n16/.gitignore new file mode 100644 index 0000000..8e0618c --- /dev/null +++ b/avr/devices/n16/.gitignore @@ -0,0 +1,2 @@ +*.eep.hex +*.obj diff --git a/avr/devices/n16/0BUILD b/avr/devices/n16/0BUILD new file mode 100644 index 0000000..dd1db92 --- /dev/null +++ b/avr/devices/n16/0BUILD @@ -0,0 +1,52 @@ + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + n16_main.asm + + + + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + n16_boot.asm + + + + + + + + + + + n16_defs.asm + + + + + + diff --git a/avr/devices/n16/n16_boot.asm b/avr/devices/n16/n16_boot.asm new file mode 100644 index 0000000..3b3625c --- /dev/null +++ b/avr/devices/n16/n16_boot.asm @@ -0,0 +1,162 @@ +; *************************************************************************** +; Source file for base system node on AtTiny 84 +; +; This is for the maintenance system (i.e. the flash loader). +; +; All definitions and changes should go into this file. +; *************************************************************************** + +.equ clock=1000000 ; Define the clock frequency + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "n16_defs.asm" +.include "defs_all.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.include "common/utils_wait.asm" +.include "modules/com2/defs.asm" +.include "modules/comproto/defs.asm" + + + +; --------------------------------------------------------------------------- +; firmware settings + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + + +; --------------------------------------------------------------------------- +; LED + +.equ LED_DDR = DDRA +.equ LED_PORT = PORTA +.equ LED_PIN = PINA +.equ LED_PINNUM = PORTA3 + + +; *************************************************************************** +; code segment + +.cseg +.org 0x0000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors +; rjmp start ; Reset vector + rjmp main ; Reset vector + reti ; EXT_INT0 + reti ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + reti ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'N', 0 +devInfoVersion: .db 16, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main ; will be overwritten when flashing + + + +; *************************************************************************** +; main code + + +.org BOOTLOADER_ADDR + + +main: + rjmp bootLoader ; this routine is in modules/flash/proto.asm + + + + +; *************************************************************************** +; includes + +.include "modules/uart_bitbang/bytelevel.asm" +.include "modules/uart_bitbang/packetlevel.asm" +.include "modules/com2/crc.asm" +.include "common/crc8.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "modules/flash/bootloader.asm" +.include "modules/flash/flash.asm" +.include "modules/flash/recv.asm" +.include "modules/flash/send.asm" +.include "modules/flash/wait.asm" +.include "modules/flash/hdl_flash_start.asm" +.include "modules/flash/hdl_flash_data.asm" +.include "modules/flash/hdl_flash_end.asm" +.include "modules/flash/flash_rsp.asm" +.include "modules/flash/flash_ready.asm" + + +#if 0 +debugStop: + cli + sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out + cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on + + cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN + + ldi r18, 0 +test_loop1: + ldi r16, 100 +test_loop2: + ldi r17, 100 +test_loop3: + Utils_WaitNanoSecs 10000, 0, r22 + dec r17 + brne test_loop3 + dec r16 + brne test_loop2 + sbi LED_SIMPLE_PORTIN, LED_SIMPLE_PINNUM ; toggle + inc r18 + mov r19, r18 + andi r19, 1 + brne test1 + sbi COM_ATTN_DDR, COM_ATTN_PIN + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN + rjmp test_loop1 +test1: + cbi COM_ATTN_DDR, COM_ATTN_PIN + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN + + rjmp test_loop1 +#endif + + + diff --git a/avr/devices/n16/n16_defs.asm b/avr/devices/n16/n16_defs.asm new file mode 100644 index 0000000..611b61b --- /dev/null +++ b/avr/devices/n16/n16_defs.asm @@ -0,0 +1,187 @@ +; *************************************************************************** +; copyright : (C) 2023 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; +; AtTiny84 +; -------- +; VCC 1 14 GND +; PB0 2 13 PA0 TCRT1000_Enable +; PIR PB1 3 12 PA1 COM-DATA +; /RESET PB3 4 11 PA2 TCRT1000_Input +; PB2 5 10 PA3 LED +; COM_ATTN PA7 6 9 PA4 TWI-SCL +; TWI-SDA PA6 7 8 PA5 +; -------- +; +; *************************************************************************** + + + +.equ BOOTLOADER_ADDR = 0xd00 + +.equ FIRMWARE_VARIANT_BOOT = 0 +.equ FIRMWARE_VARIANT_TEMP_WINDOW = 1 + + + +; --------------------------------------------------------------------------- +; LED module + +.equ LED_SIMPLE_ONTIME = 2 +.equ LED_SIMPLE_OFFTIME = 30 +.equ LED_SIMPLE_DDR = DDRA +.equ LED_SIMPLE_PORT = PORTA +.equ LED_SIMPLE_PORTIN = PINA +.equ LED_SIMPLE_PINNUM = PORTA3 + + + +; --------------------------------------------------------------------------- +; COM module + +.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400 +.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter + +.equ COM_DATA_DDR = DDRA +.equ COM_DATA_INPUT = PINA +.equ COM_DATA_OUTPUT = PORTA +.equ COM_DATA_PIN = PORTA1 + +.equ COM_ATTN_DDR = DDRA +.equ COM_ATTN_INPUT = PINA +.equ COM_ATTN_OUTPUT = PORTA +.equ COM_ATTN_PIN = PORTA7 + +.equ COM_IRQ_ADDR_ATTN = PCMSK0 +.equ COM_IRQ_BIT_ATTN = PCINT7 ; bit 7 in PCMSK0 +.equ COM_IRQ_GIFR_ATTN = PCIF0 +.equ COM_IRQ_GIMSK_ATTN = PCIE0 + + + +; --------------------------------------------------------------------------- +; TWI master module + +;.equ TWI_BIT_LENGTH = 10000 ; 100000 and 200000 works for display: 10000, 100000, 200000 +.equ TWI_BIT_LENGTH = 1 ; 10, 100, 500, 100000 and 200000 works for display: 10000, 100000, 200000 + +.equ TWI_DDR_SCL = DDRA +.equ TWI_PORT_SCL = PORTA +.equ TWI_PIN_SCL = PINA +.equ TWI_PINNUM_SCL = PORTA4 + +.equ TWI_DDR_SDA = DDRA +.equ TWI_PORT_SDA = PORTA +.equ TWI_PIN_SDA = PINA +.equ TWI_PINNUM_SDA = PORTA6 + + + +; --------------------------------------------------------------------------- +; LCD module + +.equ LCD_TWI_ADDRESS = 0x3c + + + +; --------------------------------------------------------------------------- +; BMP 280 + +.equ BMP280_ADDR = 0x76 + + + +; --------------------------------------------------------------------------- +; SI 7021 + +.equ SI7021_ADDR = 0x40 + + + +; --------------------------------------------------------------------------- +; ADC/CNY70 + + +.equ CNY70_LED_PORT = PORTA +.equ CNY70_LED_DDR = DDRA +.equ CNY70_LED_PIN = PORTA0 + +.equ CNY70_ADC_PORT = PORTA ; adc2 +.equ CNY70_ADC_DDR = DDRA +.equ CNY70_ADC_PIN = PORTA2 +.equ CNY70_ADC_MUX = MUX2 +.equ CNY70_ADC_ADCSRB = ADC2D + + + +; --------------------------------------------------------------------------- +; ADC/TCRT1K + + +.equ TCRT1K_LED_PORT = PORTA +.equ TCRT1K_LED_DDR = DDRA +.equ TCRT1K_LED_PIN = PORTA0 + +.equ TCRT1K_ADC_PORT = PORTA ; adc2 +.equ TCRT1K_ADC_DDR = DDRA +.equ TCRT1K_ADC_PIN = PORTA2 +.equ TCRT1K_ADC_MUX = MUX2 +.equ TCRT1K_ADC_ADCSRB = ADC2D + + + +; --------------------------------------------------------------------------- +; Reed +; + +.equ REEDOUT1_DDR = DDRA +.equ REEDOUT1_PORT = PORTA +.equ REEDOUT1_PIN = PINA +.equ REEDOUT1_PINNUM = PORTA0 + +.equ REEDOUT2_DDR = DDRB +.equ REEDOUT2_PORT = PORTB +.equ REEDOUT2_PIN = PINB +.equ REEDOUT2_PINNUM = PORTB0 + +.equ REED1_DDR = DDRA +.equ REED1_PORT = PORTA +.equ REED1_PIN = PINA +.equ REED1_PINNUM = PORTA2 + +.equ REED2_DDR = DDRA +.equ REED2_PORT = PORTA +.equ REED2_PIN = PINA +.equ REED2_PINNUM = PORTA5 + + +; --------------------------------------------------------------------------- +; 1-Wire Master +; + +.equ OWI_DDR = DDRB +.equ OWI_PORTOUT = PORTB +.equ OWI_PORTIN = PINB +.equ OWI_PINNUM = PORTB2 + + + +; --------------------------------------------------------------------------- +; Motion Sensor +; + +.equ MOTION_DDR = DDRB +.equ MOTION_INPUT = PINB +.equ MOTION_OUTPUT = PORTB +.equ MOTION_PIN = PORTB1 + + + diff --git a/avr/devices/n16/n16_main.asm b/avr/devices/n16/n16_main.asm new file mode 100644 index 0000000..30d342d --- /dev/null +++ b/avr/devices/n16/n16_main.asm @@ -0,0 +1,476 @@ +; *************************************************************************** +; copyright : (C) 2024 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + + + +; *************************************************************************** +; Source file for temperature sensor node on AtTiny 84 +; +; This is for the full system (i.e. not the boot loader). +; +; All definitions and changes should go into this file. +; +; +; *************************************************************************** + + +.equ clock=1000000 ; Define the clock frequency +;.equ clock=8000000 ; Define the clock frequency + + + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "n16_defs.asm" +.include "defs_all.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + + +.include "common/utils_wait.asm" + + +; --------------------------------------------------------------------------- +; firmware settings including list of modules used + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + +#define MODULES_TIMER +#define MODULES_COM +#define MODULES_COM_WITH_ADDR_PROTO +;#define MODULES_LED +#define MODULES_LED_SIMPLE +#define MODULES_TWI_MASTER +;#define MODULES_LCD +#define LCD_MINIMAL_FONT +#define MODULES_SI7021 +#define MODULES_STATS +; #define MODULES_CNY70 +;#define MODULES_REED +;#define MODULES_OWI_MASTER +;#define MODULES_DS18B20 +#define MODULES_MOTION +#define MODULES_TCRT1000 + + + +; --------------------------------------------------------------------------- +; defines for values + +.equ VALUE_ID_SI7021_TEMP = 0x01 +.equ VALUE_ID_SI7021_HUM = 0x02 + +.equ VALUE_ID_ADC = 0x03 +.equ VALUE_ID_REED1 = 0x04 +.equ VALUE_ID_REED2 = 0x05 +.equ VALUE_ID_DS18B20_TEMP = 0x06 +.equ VALUE_ID_MOTION = 0x07 +.equ VALUE_ID_TCRT1K = 0x08 + +.equ VALUE_ID_REED_CONF = 0x81 + + + +; *************************************************************************** +; code segment + +.cseg +.org 000000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors (will be removed as soon as we can flash data over COM) + +; rjmp main ; Reset vector + rjmp BOOTLOADER_ADDR ; Reset vector ; use this for flashed system + reti ; EXT_INT0 + rjmp uartBitbangIsrPcint0 ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + rjmp baseTimerIrqOC0A ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'N', 0 +devInfoVersion: .db 16, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main + + +; *************************************************************************** +; includes + +.include "common/utils.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "common/crc8.asm" + +.include "modules/basetimer/main.asm" + +#ifdef MODULES_TIMER + .include "modules/timer/main.asm" +#endif +#ifdef MODULES_LED +.include "modules/led/main.asm" +#endif +#ifdef MODULES_LED_SIMPLE +.include "modules/led_simple/main.asm" +#endif +#ifdef MODULES_COM + .include "modules/com2/defs.asm" + .include "modules/com2/main.asm" + .include "modules/com2/buffer.asm" + .include "modules/uart_bitbang/defs.asm" + .include "modules/uart_bitbang/main.asm" + .include "modules/uart_bitbang/bytelevel.asm" + .include "modules/uart_bitbang/packetlevel.asm" + #ifdef MODULES_COM_WITH_ADDR_PROTO + .include "modules/comproto/defs.asm" + .include "modules/comproto/main.asm" + .include "modules/comproto/addr.asm" + .include "modules/comproto/msg_recvstats.asm" + .include "modules/comproto/msg_sendstats.asm" + .include "modules/comproto/msg_sysstats.asm" + .include "modules/comproto/msg_memstats.asm" + .include "modules/comproto/msg_pong.asm" + .include "modules/comproto/msg_value.asm" + .include "modules/comproto/msg_device.asm" + .include "modules/comproto/msg_reboot.asm" + #endif + #ifdef MODULES_LCD + .include "modules/com2/screen.asm" + .include "modules/comproto/screen.asm" + #endif +#endif +#ifdef MODULES_TWI_MASTER + .include "modules/twimaster/main.asm" +#endif +#ifdef MODULES_OWI_MASTER + .include "modules/owimaster/main.asm" +#endif +#ifdef MODULES_LCD + .include "modules/lcd/main.asm" +#endif +#ifdef MODULES_SI7021 + .include "modules/si7021/main.asm" +#endif +#ifdef MODULES_DS18B20 + .include "modules/ds18b20/main.asm" +#endif +#ifdef MODULES_STATS + .include "modules/stats/main.asm" +#endif +#ifdef MODULES_CNY70 + .include "modules/cny70/main.asm" +#endif +#ifdef MODULES_REED + .include "modules/reed/main.asm" +#endif + +#ifdef MODULES_MOTION + .include "modules/motion/main.asm" +#endif + +#ifdef MODULES_TCRT1000 + .include "modules/tcrt1000/main.asm" +#endif + + +; test +;#include "modules/uart_irq/defs.asm" +;#include "modules/uart_irq/iface.asm" +;#include "modules/uart_irq/iface1.asm" + + +; *************************************************************************** +; data in SRAM + +.dseg + +programRamBegin: +#ifdef MODULES_LCD + screenCounter: .byte 1 +#endif + +programRamEnd: + + + +#ifdef MODULES_LCD + sramTimerWriteStats: .byte 2 + sramTimerScreen: .byte 2 +#endif +#ifdef MODULES_SI7021 + sramTimerSI7021Measure: .byte 2 + sramTimerSI7021SendTemp: .byte 2 + sramTimerSI7021SendHumidity: .byte 2 +#endif +#ifdef MODULES_CNY70 + sramTimerCny70SendAdc: .byte 2 +#endif +#ifdef MODULES_LCD + sramPeriodicalLcdMark: .byte 2 +#endif +#ifdef MODULES_DS18B20 + sramDs18b20Timer: .byte 2 + sramSendDs18b20TempTimer: .byte 2 +#endif + + + +; *************************************************************************** +; data in FLASH + +.cseg + + + +; --------------------------------------------------------------------------- +; timer list + + +timerList: +; SRAM variable/counter routine flags secs (0=don't start or restart) +#ifdef MODULES_COM_WITH_ADDR_PROTO + .dw cproAddresModeTimer, CPRO_Address_OnTimer, 0, 0 ; (no restart) +#endif +#ifdef MODULES_STATS + .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 9000 ; every 15m +#endif +#ifdef MODULES_LCD +; .dw sramPeriodicalLcdMark, periodicalLcdMark, 0, 20 ; every 2s +; .dw sramTimerWriteStats, writeStats, 0, 100 + .dw sramTimerScreen, printScreen, TIMER_FLAGS_IF_ADDR, 50 ; every 5s +#endif +#ifdef MODULES_SI7021 + .dw sramTimerSI7021Measure, SI7021_OnTimer, 0, 300 ; every 30s + .dw sramTimerSI7021SendTemp, sendSI7021Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s + .dw sramTimerSI7021SendHumidity, sendSI7021Humidity, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif +#ifdef MODULES_CNY70 + .dw sramTimerCny70SendAdc, CNY70_OnTimer, TIMER_FLAGS_IF_ADDR, 50 ; every 5s +#endif +#ifdef MODULES_DS18B20 + .dw sramDs18b20Timer, Ds18b20_OnTimer, 0, 300 ; every 30s + .dw sramSendDs18b20TempTimer, sendDs18b20Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif + .dw 0 ; end of list + + + + + +.include "main_all.asm" + + + +systemSetSpeed: +.if clock == 8000000 + ldi r16, (1< + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + n17_main.asm + + + + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + n17_boot.asm + + + + + + + + + + + n17_defs.asm + + + + + + diff --git a/avr/devices/n17/n17_boot.asm b/avr/devices/n17/n17_boot.asm new file mode 100644 index 0000000..bfd3322 --- /dev/null +++ b/avr/devices/n17/n17_boot.asm @@ -0,0 +1,162 @@ +; *************************************************************************** +; Source file for base system node on AtTiny 84 +; +; This is for the maintenance system (i.e. the flash loader). +; +; All definitions and changes should go into this file. +; *************************************************************************** + +.equ clock=1000000 ; Define the clock frequency + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "n17_defs.asm" +.include "defs_all.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.include "common/utils_wait.asm" +.include "modules/com2/defs.asm" +.include "modules/comproto/defs.asm" + + + +; --------------------------------------------------------------------------- +; firmware settings + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + + +; --------------------------------------------------------------------------- +; LED + +.equ LED_DDR = DDRA +.equ LED_PORT = PORTA +.equ LED_PIN = PINA +.equ LED_PINNUM = PORTA3 + + +; *************************************************************************** +; code segment + +.cseg +.org 0x0000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors +; rjmp start ; Reset vector + rjmp main ; Reset vector + reti ; EXT_INT0 + reti ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + reti ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'N', 0 +devInfoVersion: .db 17, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main ; will be overwritten when flashing + + + +; *************************************************************************** +; main code + + +.org BOOTLOADER_ADDR + + +main: + rjmp bootLoader ; this routine is in modules/flash/proto.asm + + + + +; *************************************************************************** +; includes + +.include "modules/uart_bitbang/bytelevel.asm" +.include "modules/uart_bitbang/packetlevel.asm" +.include "modules/com2/crc.asm" +.include "common/crc8.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "modules/flash/bootloader.asm" +.include "modules/flash/flash.asm" +.include "modules/flash/recv.asm" +.include "modules/flash/send.asm" +.include "modules/flash/wait.asm" +.include "modules/flash/hdl_flash_start.asm" +.include "modules/flash/hdl_flash_data.asm" +.include "modules/flash/hdl_flash_end.asm" +.include "modules/flash/flash_rsp.asm" +.include "modules/flash/flash_ready.asm" + + +#if 0 +debugStop: + cli + sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out + cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on + + cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN + + ldi r18, 0 +test_loop1: + ldi r16, 100 +test_loop2: + ldi r17, 100 +test_loop3: + Utils_WaitNanoSecs 10000, 0, r22 + dec r17 + brne test_loop3 + dec r16 + brne test_loop2 + sbi LED_SIMPLE_PORTIN, LED_SIMPLE_PINNUM ; toggle + inc r18 + mov r19, r18 + andi r19, 1 + brne test1 + sbi COM_ATTN_DDR, COM_ATTN_PIN + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN + rjmp test_loop1 +test1: + cbi COM_ATTN_DDR, COM_ATTN_PIN + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN + + rjmp test_loop1 +#endif + + + diff --git a/avr/devices/n17/n17_defs.asm b/avr/devices/n17/n17_defs.asm new file mode 100644 index 0000000..4bb30f1 --- /dev/null +++ b/avr/devices/n17/n17_defs.asm @@ -0,0 +1,123 @@ +; *************************************************************************** +; copyright : (C) 2023 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; +; AtTiny84 +; -------- +; VCC 1 14 GND +; PB0 2 13 PA0 AUX-A0 +; PIR PB1 3 12 PA1 COM-DATA +; /RESET PB3 4 11 PA2 +; AUX-B2 PB2 5 10 PA3 LED +; COM_ATTN PA7 6 9 PA4 TWI-SCL +; TWI-SDA PA6 7 8 PA5 +; -------- +; +; *************************************************************************** + + + +.equ BOOTLOADER_ADDR = 0xd00 + +.equ FIRMWARE_VARIANT_BOOT = 0 +.equ FIRMWARE_VARIANT_TEMP_WINDOW = 1 + + + +; --------------------------------------------------------------------------- +; LED module + +.equ LED_SIMPLE_ONTIME = 1 ; shorter +.equ LED_SIMPLE_OFFTIME = 50 ; longer +.equ LED_SIMPLE_DDR = DDRA +.equ LED_SIMPLE_PORT = PORTA +.equ LED_SIMPLE_PORTIN = PINA +.equ LED_SIMPLE_PINNUM = PORTA3 + + + +; --------------------------------------------------------------------------- +; COM module + +.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400 +.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter + +.equ COM_DATA_DDR = DDRA +.equ COM_DATA_INPUT = PINA +.equ COM_DATA_OUTPUT = PORTA +.equ COM_DATA_PIN = PORTA1 + +.equ COM_ATTN_DDR = DDRA +.equ COM_ATTN_INPUT = PINA +.equ COM_ATTN_OUTPUT = PORTA +.equ COM_ATTN_PIN = PORTA7 + +.equ COM_IRQ_ADDR_ATTN = PCMSK0 +.equ COM_IRQ_BIT_ATTN = PCINT7 ; bit 7 in PCMSK0 +.equ COM_IRQ_GIFR_ATTN = PCIF0 +.equ COM_IRQ_GIMSK_ATTN = PCIE0 + + + +; --------------------------------------------------------------------------- +; TWI master module + +;.equ TWI_BIT_LENGTH = 10000 ; 100000 and 200000 works for display: 10000, 100000, 200000 +.equ TWI_BIT_LENGTH = 1 ; 10, 100, 500, 100000 and 200000 works for display: 10000, 100000, 200000 + +.equ TWI_DDR_SCL = DDRA +.equ TWI_PORT_SCL = PORTA +.equ TWI_PIN_SCL = PINA +.equ TWI_PINNUM_SCL = PORTA4 + +.equ TWI_DDR_SDA = DDRA +.equ TWI_PORT_SDA = PORTA +.equ TWI_PIN_SDA = PINA +.equ TWI_PINNUM_SDA = PORTA6 + + + +; --------------------------------------------------------------------------- +; LCD module + +.equ LCD_TWI_ADDRESS = 0x3c + + + +; --------------------------------------------------------------------------- +; SI 7021 + +.equ SI7021_ADDR = 0x40 + + + +; --------------------------------------------------------------------------- +; 1-Wire Master +; + +.equ OWI_DDR = DDRB +.equ OWI_PORTOUT = PORTB +.equ OWI_PORTIN = PINB +.equ OWI_PINNUM = PORTB2 + + + +; --------------------------------------------------------------------------- +; Motion Sensor +; + +.equ MOTION_DDR = DDRB +.equ MOTION_INPUT = PINB +.equ MOTION_OUTPUT = PORTB +.equ MOTION_PIN = PORTB1 + + + diff --git a/avr/devices/n17/n17_main.asm b/avr/devices/n17/n17_main.asm new file mode 100644 index 0000000..7daea56 --- /dev/null +++ b/avr/devices/n17/n17_main.asm @@ -0,0 +1,459 @@ +; *************************************************************************** +; copyright : (C) 2024 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + + + +; *************************************************************************** +; Source file for temperature sensor node on AtTiny 84 +; +; This is for the full system (i.e. not the boot loader). +; +; All definitions and changes should go into this file. +; +; +; *************************************************************************** + + +.equ clock=1000000 ; Define the clock frequency +;.equ clock=8000000 ; Define the clock frequency + + + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "n17_defs.asm" +.include "defs_all.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + + +.include "common/utils_wait.asm" + + +; --------------------------------------------------------------------------- +; firmware settings including list of modules used + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + +#define MODULES_TIMER +#define MODULES_COM +#define MODULES_COM_WITH_ADDR_PROTO +#define MODULES_LED_SIMPLE +#define MODULES_TWI_MASTER +;#define MODULES_LCD +#define LCD_MINIMAL_FONT +#define MODULES_SI7021 +#define MODULES_STATS +;#define MODULES_OWI_MASTER +;#define MODULES_DS18B20 +#define MODULES_MOTION + +; --------------------------------------------------------------------------- +; defines for values + +.equ VALUE_ID_SI7021_TEMP = 0x01 +.equ VALUE_ID_SI7021_HUM = 0x02 + +.equ VALUE_ID_ADC = 0x03 +;.equ VALUE_ID_REED1 = 0x04 +;.equ VALUE_ID_REED2 = 0x05 +;.equ VALUE_ID_DS18B20_TEMP = 0x06 +.equ VALUE_ID_MOTION = 0x07 + +;.equ VALUE_ID_REED_CONF = 0x81 + + + +; *************************************************************************** +; code segment + +.cseg +.org 000000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors (will be removed as soon as we can flash data over COM) + +; rjmp main ; Reset vector + rjmp BOOTLOADER_ADDR ; Reset vector ; use this for flashed system + reti ; EXT_INT0 + rjmp uartBitbangIsrPcint0 ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + rjmp baseTimerIrqOC0A ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'N', 0 +devInfoVersion: .db 17, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main + + +; *************************************************************************** +; includes + +.include "common/utils.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "common/crc8.asm" + +.include "modules/basetimer/main.asm" + +#ifdef MODULES_TIMER + .include "modules/timer/main.asm" +#endif +#ifdef MODULES_LED +.include "modules/led/main.asm" +#endif +#ifdef MODULES_LED_SIMPLE +.include "modules/led_simple/main.asm" +#endif +#ifdef MODULES_COM + .include "modules/com2/defs.asm" + .include "modules/com2/main.asm" + .include "modules/com2/buffer.asm" + .include "modules/uart_bitbang/defs.asm" + .include "modules/uart_bitbang/main.asm" + .include "modules/uart_bitbang/bytelevel.asm" + .include "modules/uart_bitbang/packetlevel.asm" + #ifdef MODULES_COM_WITH_ADDR_PROTO + .include "modules/comproto/defs.asm" + .include "modules/comproto/main.asm" + .include "modules/comproto/addr.asm" + .include "modules/comproto/msg_recvstats.asm" + .include "modules/comproto/msg_sendstats.asm" + .include "modules/comproto/msg_sysstats.asm" + .include "modules/comproto/msg_memstats.asm" + .include "modules/comproto/msg_pong.asm" + .include "modules/comproto/msg_value.asm" + .include "modules/comproto/msg_device.asm" + .include "modules/comproto/msg_reboot.asm" + #endif + #ifdef MODULES_LCD + .include "modules/com2/screen.asm" + .include "modules/comproto/screen.asm" + #endif +#endif +#ifdef MODULES_TWI_MASTER + .include "modules/twimaster/main.asm" +#endif +#ifdef MODULES_OWI_MASTER + .include "modules/owimaster/main.asm" +#endif +#ifdef MODULES_LCD + .include "modules/lcd/main.asm" +#endif +#ifdef MODULES_SI7021 + .include "modules/si7021/main.asm" +#endif +#ifdef MODULES_DS18B20 + .include "modules/ds18b20/main.asm" +#endif +#ifdef MODULES_STATS + .include "modules/stats/main.asm" +#endif +#ifdef MODULES_CNY70 + .include "modules/cny70/main.asm" +#endif +#ifdef MODULES_REED + .include "modules/reed/main.asm" +#endif + +#ifdef MODULES_MOTION + .include "modules/motion/main.asm" +#endif + +; test +;#include "modules/uart_irq/defs.asm" +;#include "modules/uart_irq/iface.asm" +;#include "modules/uart_irq/iface1.asm" + + +; *************************************************************************** +; data in SRAM + +.dseg + +programRamBegin: +#ifdef MODULES_LCD + screenCounter: .byte 1 +#endif + +programRamEnd: + + + +#ifdef MODULES_LCD + sramTimerWriteStats: .byte 2 + sramTimerScreen: .byte 2 +#endif +#ifdef MODULES_SI7021 + sramTimerSI7021Measure: .byte 2 + sramTimerSI7021SendTemp: .byte 2 + sramTimerSI7021SendHumidity: .byte 2 +#endif +#ifdef MODULES_CNY70 + sramTimerCny70SendAdc: .byte 2 +#endif +#ifdef MODULES_LCD + sramPeriodicalLcdMark: .byte 2 +#endif +#ifdef MODULES_DS18B20 + sramDs18b20Timer: .byte 2 + sramSendDs18b20TempTimer: .byte 2 +#endif + + +; *************************************************************************** +; data in FLASH + +.cseg + + + +; --------------------------------------------------------------------------- +; timer list + + +timerList: +; SRAM variable/counter routine flags secs (0=don't start or restart) +#ifdef MODULES_COM_WITH_ADDR_PROTO + .dw cproAddresModeTimer, CPRO_Address_OnTimer, 0, 0 ; (no restart) +#endif +#ifdef MODULES_STATS + .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 9000 ; every 15m +#endif +#ifdef MODULES_LCD +; .dw sramPeriodicalLcdMark, periodicalLcdMark, 0, 20 ; every 2s +; .dw sramTimerWriteStats, writeStats, 0, 100 + .dw sramTimerScreen, printScreen, TIMER_FLAGS_IF_ADDR, 50 ; every 5s +#endif +#ifdef MODULES_SI7021 + .dw sramTimerSI7021Measure, SI7021_OnTimer, 0, 300 ; every 30s + .dw sramTimerSI7021SendTemp, sendSI7021Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s + .dw sramTimerSI7021SendHumidity, sendSI7021Humidity, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif +#ifdef MODULES_CNY70 + .dw sramTimerCny70SendAdc, CNY70_OnTimer, TIMER_FLAGS_IF_ADDR, 50 ; every 5s +#endif +#ifdef MODULES_DS18B20 + .dw sramDs18b20Timer, Ds18b20_OnTimer, 0, 300 ; every 30s + .dw sramSendDs18b20TempTimer, sendDs18b20Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif + .dw 0 ; end of list + + + + + +.include "main_all.asm" + + + +systemSetSpeed: +.if clock == 8000000 + ldi r16, (1< + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + main.asm + + + + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + boot.asm + + + + + + + + + + + defs.asm + + + + + + diff --git a/avr/devices/n18/boot.asm b/avr/devices/n18/boot.asm new file mode 100644 index 0000000..7877313 --- /dev/null +++ b/avr/devices/n18/boot.asm @@ -0,0 +1,124 @@ +; *************************************************************************** +; Source file for base system node on AtTiny 85 +; +; This is for the maintenance system (i.e. the flash loader). +; +; All definitions and changes should go into this file. +; +; +; *************************************************************************** + +.equ clock=1000000 ; Define the clock frequency + +.nolist +.include "include/tn85def.inc" ; Define device ATtiny85 +.list + +.include "./defs.asm" +.include "defs_all.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.include "common/utils_wait.asm" +.include "modules/com2/defs.asm" +.include "modules/comproto/defs.asm" + + +; --------------------------------------------------------------------------- +; firmware settings + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + +; --------------------------------------------------------------------------- +; LED + +.equ LED_DDR = DDRB +.equ LED_PORT = PORTB +.equ LED_PIN = PINB +.equ LED_PINNUM = PORTB3 + + + +; *************************************************************************** +; code segment + +.cseg +.org 0x0000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors + rjmp main ; Reset vector + reti ; EXT_INT0 + reti ; PCI0 + reti ; OC1A + reti ; OVF1 + reti ; OVF0 + reti ; ERDY + reti ; ACI + reti ; ADCC + reti ; OC1B + reti ; OC0A + reti ; OC0B + reti ; WATCHDOG + reti ; USI_STR + reti ; USI_OVF + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'N', 0 +devInfoVersion: .db 18, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main ; will be overwritten when flashing + + + +; *************************************************************************** +; main code + + +.org BOOTLOADER_ADDR + + +main: + rjmp bootLoader ; this routine is in modules/flash/proto.asm + + + + +; *************************************************************************** +; includes + +.include "modules/uart_bitbang/bytelevel.asm" +.include "modules/uart_bitbang/packetlevel.asm" +.include "modules/com2/crc.asm" +.include "common/crc8.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "modules/flash/bootloader.asm" +.include "modules/flash/flash.asm" +.include "modules/flash/recv.asm" +.include "modules/flash/send.asm" +.include "modules/flash/wait.asm" +.include "modules/flash/hdl_flash_start.asm" +.include "modules/flash/hdl_flash_data.asm" +.include "modules/flash/hdl_flash_end.asm" +.include "modules/flash/flash_rsp.asm" +.include "modules/flash/flash_ready.asm" + + + + diff --git a/avr/devices/n18/defs.asm b/avr/devices/n18/defs.asm new file mode 100644 index 0000000..b7e9e77 --- /dev/null +++ b/avr/devices/n18/defs.asm @@ -0,0 +1,98 @@ +; *************************************************************************** +; copyright : (C) 2024 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + +; *************************************************************************** +; +; AtTiny85 +; -------- +; /RESET PB5 1 8 VCC +; LED PB3 2 7 PB2 TWI-SDA +; COM-DATA PB4 3 6 PB1 TWI-SCL +; GND 4 5 PB0 COM-ATTN [PCINT0] +; -------- +; +; *************************************************************************** + + + +.equ BOOTLOADER_ADDR = 0xd00 + + +.equ FIRMWARE_VARIANT_BOOT = 0 +.equ FIRMWARE_VARIANT_MAIN = 1 + + +; --------------------------------------------------------------------------- +; LED module + +.equ LED_SIMPLE_ONTIME = 2 +.equ LED_SIMPLE_OFFTIME = 50 +.equ LED_SIMPLE_DDR = DDRB +.equ LED_SIMPLE_PORT = PORTB +.equ LED_SIMPLE_PINNUM = PORTB3 + + + +; --------------------------------------------------------------------------- +; COM module + +.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400 +.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter + +.equ COM_DATA_DDR = DDRB +.equ COM_DATA_INPUT = PINB +.equ COM_DATA_OUTPUT = PORTB +.equ COM_DATA_PIN = PORTB4 + +.equ COM_ATTN_DDR = DDRB +.equ COM_ATTN_INPUT = PINB +.equ COM_ATTN_OUTPUT = PORTB +.equ COM_ATTN_PIN = PORTB0 + +.equ COM_IRQ_ADDR_ATTN = PCMSK +.equ COM_IRQ_BIT_ATTN = PCINT0 ; bit 0 in PCMSK0 (PCINT0) +.equ COM_IRQ_GIFR_ATTN = PCIF +.equ COM_IRQ_GIMSK_ATTN = PCIE + + + +; --------------------------------------------------------------------------- +; TWI master module + +;.equ TWI_BIT_LENGTH = 10000 ; 100000 and 200000 works for display: 10000, 100000, 200000 +.equ TWI_BIT_LENGTH = 1 ; 10, 100, 500, 100000 and 200000 works for display: 10000, 100000, 200000 + +.equ TWI_DDR_SCL = DDRB +.equ TWI_PORT_SCL = PORTB +.equ TWI_PIN_SCL = PINB +.equ TWI_PINNUM_SCL = PORTB1 + +.equ TWI_DDR_SDA = DDRB +.equ TWI_PORT_SDA = PORTB +.equ TWI_PIN_SDA = PINB +.equ TWI_PINNUM_SDA = PORTB2 + + + +; --------------------------------------------------------------------------- +; SI 7021 + +.equ SI7021_ADDR = 0x40 + + + +; --------------------------------------------------------------------------- +; CCS 811 +; + +.equ CCS811_ADDR = 0x5a ; or 0x5b + + + + diff --git a/avr/devices/n18/main.asm b/avr/devices/n18/main.asm new file mode 100644 index 0000000..99aa557 --- /dev/null +++ b/avr/devices/n18/main.asm @@ -0,0 +1,379 @@ +; *************************************************************************** +; copyright : (C) 2024 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; Source file for LED controller node on AtTiny 85 +; +; This is for the full system (i.e. not the boot loader). +; *************************************************************************** + +.equ clock=1000000 ; Define the clock frequency + + + +.nolist +.include "include/tn85def.inc" ; Define device ATtiny85 +.list + +.include "./defs.asm" +.include "defs_all.asm" +.include "common/utils_wait.asm" ; wait macro + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; firmware settings including list of modules used + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + +#define MODULES_TIMER +#define MODULES_COM +#define MODULES_COM_WITH_ADDR_PROTO +#define MODULES_LED_SIMPLE +#define MODULES_TWI_MASTER +#define MODULES_SI7021 +#define MODULES_STATS +; #define MODULES_OWI_MASTER +; #define MODULES_DS18B20 +; #define MODULES_SK6812 +; #define MODULES_MOTION_LIGHT + +; #define COM_ACCEPT_ALL_DEST +#define MODULES_CCS811 + + + +; --------------------------------------------------------------------------- +; defines for modules + +.equ VALUE_ID_SI7021_TEMP = 0x01 +.equ VALUE_ID_SI7021_HUM = 0x02 + +.equ VALUE_ID_CO2 = 0x07 +.equ VALUE_ID_TVOC = 0x08 + +.equ VALUE_ID_DEBUG = 0x7f + + +; *************************************************************************** +; code segment + +.cseg +.org 000000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors + + rjmp BOOTLOADER_ADDR ; Reset vector ; use this for flashed system + reti ; EXT_INT0 + rjmp uartBitbangIsrPcint0 ; PCI0 + reti ; OC1A + reti ; OVF1 + reti ; OVF0 + reti ; ERDY + reti ; ACI + reti ; ADCC + reti ; OC1B + rjmp baseTimerIrqOC0A ; OC0A + reti ; OC0B + reti ; WATCHDOG + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'N', 0 +devInfoVersion: .db 18, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_MAIN, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main + + +; *************************************************************************** +; includes + +.include "common/utils.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "common/crc8.asm" + +.include "modules/basetimer/main.asm" + +#ifdef MODULES_TIMER + .include "modules/timer/main.asm" +#endif +#ifdef MODULES_LED_SIMPLE +.include "modules/led_simple/main.asm" +#endif +#ifdef MODULES_COM + .include "modules/com2/defs.asm" + .include "modules/com2/main.asm" + .include "modules/com2/buffer.asm" + #ifdef MODULES_STATS + .include "modules/comproto/msg_recvstats.asm" + .include "modules/comproto/msg_sendstats.asm" + .include "modules/comproto/msg_sysstats.asm" + .include "modules/comproto/msg_memstats.asm" + #endif + .include "modules/comproto/msg_pong.asm" + .include "modules/comproto/msg_value.asm" + .include "modules/comproto/msg_device.asm" + .include "modules/comproto/msg_reboot.asm" + .include "modules/uart_bitbang/defs.asm" + .include "modules/uart_bitbang/main.asm" + .include "modules/uart_bitbang/bytelevel.asm" + .include "modules/uart_bitbang/packetlevel.asm" + #ifdef MODULES_COM_WITH_ADDR_PROTO + .include "modules/comproto/defs.asm" + .include "modules/comproto/main.asm" + .include "modules/comproto/addr.asm" + #endif +#endif +#ifdef MODULES_STATS + .include "modules/stats/main.asm" +#endif +#ifdef MODULES_TWI_MASTER + .include "modules/twimaster/main.asm" +#endif +#ifdef MODULES_OWI_MASTER + .include "modules/owimaster/main.asm" +#endif +#ifdef MODULES_SI7021 + .include "modules/si7021/main.asm" +#endif +#ifdef MODULES_DS18B20 + .include "modules/ds18b20/main.asm" +#endif +#ifdef MODULES_SK6812 + .include "modules/sk6812/main.asm" +#endif +#ifdef MODULES_MOTION_LIGHT + .include "modules/ma_light/main.asm" +#endif + +#ifdef MODULES_CCS811 + .include "modules/ccs811/main.asm" +#endif + + +; *************************************************************************** +; data in SRAM + +.dseg + + +#ifdef MODULES_SI7021 + sramTimerSI7021Measure: .byte 2 + sramTimerSI7021SendTemp: .byte 2 + sramTimerSI7021SendHumidity: .byte 2 +#endif +#ifdef MODULES_DS18B20 + sramDs18b20Timer: .byte 2 + sramSendDs18b20TempTimer: .byte 2 +#endif + +#ifdef MODULES_CCS811 + sramCcs811Timer: .byte 2 +#endif + + +; *************************************************************************** +; data in FLASH + +.cseg + + + +; --------------------------------------------------------------------------- +; timer list + + +timerList: +; SRAM variable/counter routine flags secs (0=don't start or restart) +#ifdef MODULES_COM_WITH_ADDR_PROTO + .dw cproAddresModeTimer, CPRO_Address_OnTimer, 0, 0 ; (no restart) +#endif +#ifdef MODULES_STATS + .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 9000 ; every 15m +#endif +#ifdef MODULES_DS18B20 + .dw sramDs18b20Timer, Ds18b20_OnTimer, 0, 300 ; every 30s + .dw sramSendDs18b20TempTimer, sendDs18b20Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif +#ifdef MODULES_SI7021 + .dw sramTimerSI7021Measure, SI7021_OnTimer, 0, 300 ; every 30s + .dw sramTimerSI7021SendTemp, sendSI7021Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s + .dw sramTimerSI7021SendHumidity, sendSI7021Humidity, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif +#ifdef MODULES_CCS811 + .dw sramCcs811Timer, CCS811_OnTimer, 0, 10 ; every 1s +#endif + .dw 0 ; end of list + + + + + +.include "main_all.asm" + + +; --------------------------------------------------------------------------- +; Called early on system startup. No arguments, no results. + +systemSetSpeed: +.if clock == 1000000 + ldi r16, (1< + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + r02_main.asm + + + + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + r02_boot.asm + + + + + + + + + + + r02_defs.asm + + + + + + diff --git a/avr/devices/r02/r02_boot.asm b/avr/devices/r02/r02_boot.asm new file mode 100644 index 0000000..de59e71 --- /dev/null +++ b/avr/devices/r02/r02_boot.asm @@ -0,0 +1,163 @@ +; *************************************************************************** +; Source file for base system node on AtTiny 84 +; +; This is for the maintenance system (i.e. the flash loader). +; +; All definitions and changes should go into this file. +; *************************************************************************** + +.equ clock=1000000 ; Define the clock frequency + +.nolist +.include "include/tn841def.inc" ; Define device ATtiny841 +.list + +.include "r02_defs.asm" +.include "defs.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.include "common/utils_wait.asm" +.include "modules/com2/defs.asm" +.include "modules/comproto/defs.asm" + + + +; --------------------------------------------------------------------------- +; firmware settings + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + + +; --------------------------------------------------------------------------- +; LED + +.equ LED_DDR = DDRB +.equ LED_PORT = PORTB +.equ LED_PIN = PINB +.equ LED_PINNUM = PORTB2 + + +; *************************************************************************** +; code segment + +.cseg +.org 0x0000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors +; rjmp start ; Reset vector + rjmp main ; Reset vector + reti ; EXT_INT0 + reti ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + reti ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'R', 0 +devInfoVersion: .db 2, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main ; will be overwritten when flashing + + + +; *************************************************************************** +; main code + + +.org BOOTLOADER_ADDR + + +main: +; rjmp debugStop + rjmp bootLoader ; this routine is in modules/flash/proto.asm + + + + +; *************************************************************************** +; includes + +.include "modules/uart_bitbang/bytelevel.asm" +.include "modules/uart_bitbang/packetlevel.asm" +.include "modules/com2/crc.asm" +.include "common/crc8.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "modules/flash/bootloader.asm" +.include "modules/flash/flash.asm" +.include "modules/flash/recv.asm" +.include "modules/flash/send.asm" +.include "modules/flash/wait.asm" +.include "modules/flash/hdl_flash_start.asm" +.include "modules/flash/hdl_flash_data.asm" +.include "modules/flash/hdl_flash_end.asm" +.include "modules/flash/flash_rsp.asm" +.include "modules/flash/flash_ready.asm" + + +#if 1 +debugStop: + cli + sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out + cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on + + cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN + + ldi r18, 0 +test_loop1: + ldi r16, 100 +test_loop2: + ldi r17, 100 +test_loop3: + Utils_WaitNanoSecs 10000, 0, r22 + dec r17 + brne test_loop3 + dec r16 + brne test_loop2 + sbi LED_SIMPLE_PORTIN, LED_SIMPLE_PINNUM ; toggle + inc r18 + mov r19, r18 + andi r19, 1 + brne test1 + sbi COM_ATTN_DDR, COM_ATTN_PIN + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN + rjmp test_loop1 +test1: + cbi COM_ATTN_DDR, COM_ATTN_PIN + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN + + rjmp test_loop1 +#endif + + + diff --git a/avr/devices/r02/r02_defs.asm b/avr/devices/r02/r02_defs.asm new file mode 100644 index 0000000..e331a5b --- /dev/null +++ b/avr/devices/r02/r02_defs.asm @@ -0,0 +1,87 @@ +; *************************************************************************** +; copyright : (C) 2024 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; +; AtTiny 841 +; ------- +; VCC 1 14 GND +; PB0 2 13 PA0 ATTN0 +; PB1 3 12 PA1 TXD0 (UART0) +; /RESET PB3 4 11 PA2 RXD0 (UART0) +; LED PB2 5 10 PA3 ATTN1 +; 1-wire PA7 6 9 PA4 RXD1 (UART1) [SCK, PRG] +; [MOSI,PRG] SDA (I2C) PA6 7 8 PA5 TXD1 (UART1) [MISO, PRG] +; ------- +; +; *************************************************************************** + + + +.equ BOOTLOADER_ADDR = 0xd00 + +.equ FIRMWARE_VARIANT_BOOT = 0 +.equ FIRMWARE_VARIANT_TEMP_WINDOW = 1 + + + +; --------------------------------------------------------------------------- +; LED module + +.equ LED_SIMPLE_ONTIME = 2 +.equ LED_SIMPLE_OFFTIME = 30 +.equ LED_SIMPLE_DDR = DDRB +.equ LED_SIMPLE_PORT = PORTB +.equ LED_SIMPLE_PORTIN = PINB +.equ LED_SIMPLE_PINNUM = PORTB2 + + + +; --------------------------------------------------------------------------- +; COM module + +.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400 +.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter + +.equ COM_DATA_DDR = DDRA +.equ COM_DATA_INPUT = PINA +.equ COM_DATA_OUTPUT = PORTA +.equ COM_DATA_PIN = PORTA2 + +.equ COM_ATTN_DDR = DDRA +.equ COM_ATTN_INPUT = PINA +.equ COM_ATTN_OUTPUT = PORTA +.equ COM_ATTN_PIN = PORTA0 + +.equ COM_IRQ_ADDR_ATTN = PCMSK0 +.equ COM_IRQ_BIT_ATTN = PCINT0 ; bit 7 in PCMSK0 +.equ COM_IRQ_GIFR_ATTN = PCIF0 +.equ COM_IRQ_GIMSK_ATTN = PCIE0 + + + +; --------------------------------------------------------------------------- +; LCD module + +.equ LCD_TWI_ADDRESS = 0x3c + + + +; --------------------------------------------------------------------------- +; 1-Wire Master +; + +.equ OWI_DDR = DDRA +.equ OWI_PORTOUT = PORTA +.equ OWI_PORTIN = PINA +.equ OWI_PINNUM = PORTA7 + + + diff --git a/avr/devices/r02/r02_main.asm b/avr/devices/r02/r02_main.asm new file mode 100644 index 0000000..adc9c81 --- /dev/null +++ b/avr/devices/r02/r02_main.asm @@ -0,0 +1,448 @@ +; *************************************************************************** +; copyright : (C) 2024 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + + + +; *************************************************************************** +; Source file for temperature sensor node on AtTiny 84 +; +; This is for the full system (i.e. not the boot loader). +; +; All definitions and changes should go into this file. +; +; +; *************************************************************************** + + +.equ clock=1000000 ; Define the clock frequency +;.equ clock=8000000 ; Define the clock frequency + + + +.nolist +.include "include/tn841def.inc" ; Define device ATtiny84 +.list + +.include "r02_defs.asm" +.include "defs_all.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + + +.include "common/utils_wait.asm" + + +; --------------------------------------------------------------------------- +; firmware settings including list of modules used + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + +#define MODULES_TIMER +#define MODULES_COM +#define MODULES_COM_WITH_ADDR_PROTO +;#define MODULES_LED +#define MODULES_LED_SIMPLE +;#define MODULES_TWI_MASTER +;#define MODULES_LCD +#define LCD_MINIMAL_FONT +;#define MODULES_SI7021 +#define MODULES_STATS +;#define MODULES_CNY70 +;#define MODULES_REED +#define MODULES_OWI_MASTER +;#define MODULES_DS18B20 +;#define MODULES_MOTION + + + +; *************************************************************************** +; code segment + +.cseg +.org 000000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors (will be removed as soon as we can flash data over COM) + +; rjmp main ; Reset vector + rjmp BOOTLOADER_ADDR ; Reset vector ; use this for flashed system + reti ; EXT_INT0 + rjmp uartBitbangIsrPcint0 ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + rjmp baseTimerIrqOC0A ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'R', 0 +devInfoVersion: .db 2, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main + + +; *************************************************************************** +; includes + +.include "common/utils.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "common/crc8.asm" + +.include "modules/basetimer/main.asm" + +#ifdef MODULES_TIMER + .include "modules/timer/main.asm" +#endif +#ifdef MODULES_LED +.include "modules/led/main.asm" +#endif +#ifdef MODULES_LED_SIMPLE +.include "modules/led_simple/main.asm" +#endif +#ifdef MODULES_COM + .include "modules/com2/defs.asm" + .include "modules/com2/main.asm" + .include "modules/com2/buffer.asm" + .include "modules/uart_bitbang/defs.asm" + .include "modules/uart_bitbang/main.asm" + .include "modules/uart_bitbang/bytelevel.asm" + .include "modules/uart_bitbang/packetlevel.asm" + #ifdef MODULES_COM_WITH_ADDR_PROTO + .include "modules/comproto/defs.asm" + .include "modules/comproto/main.asm" + .include "modules/comproto/addr.asm" + .include "modules/comproto/msg_recvstats.asm" + .include "modules/comproto/msg_sendstats.asm" + .include "modules/comproto/msg_sysstats.asm" + .include "modules/comproto/msg_memstats.asm" + .include "modules/comproto/msg_pong.asm" + .include "modules/comproto/msg_value.asm" + .include "modules/comproto/msg_device.asm" + .include "modules/comproto/msg_reboot.asm" + #endif + #ifdef MODULES_LCD + .include "modules/com2/screen.asm" + .include "modules/comproto/screen.asm" + #endif +#endif +#ifdef MODULES_TWI_MASTER + .include "modules/twimaster/main.asm" +#endif +#ifdef MODULES_OWI_MASTER + .include "modules/owimaster/main.asm" +#endif +#ifdef MODULES_LCD + .include "modules/lcd/main.asm" +#endif +#ifdef MODULES_SI7021 + .include "modules/si7021/main.asm" +#endif +#ifdef MODULES_DS18B20 + .include "modules/ds18b20/main.asm" +#endif +#ifdef MODULES_STATS + .include "modules/stats/main.asm" +#endif +#ifdef MODULES_CNY70 + .include "modules/cny70/main.asm" +#endif +#ifdef MODULES_REED + .include "modules/reed/main.asm" +#endif + +#ifdef MODULES_MOTION + .include "modules/motion/main.asm" +#endif + +; test +;#include "modules/uart_irq/defs.asm" +;#include "modules/uart_irq/iface.asm" +;#include "modules/uart_irq/iface1.asm" + + +; *************************************************************************** +; data in SRAM + +.dseg + +programRamBegin: +#ifdef MODULES_LCD + screenCounter: .byte 1 +#endif + +programRamEnd: + + + +#ifdef MODULES_LCD + sramTimerWriteStats: .byte 2 + sramTimerScreen: .byte 2 +#endif +#ifdef MODULES_SI7021 + sramTimerSI7021Measure: .byte 2 + sramTimerSI7021SendTemp: .byte 2 + sramTimerSI7021SendHumidity: .byte 2 +#endif +#ifdef MODULES_CNY70 + sramTimerCny70SendAdc: .byte 2 +#endif +#ifdef MODULES_LCD + sramPeriodicalLcdMark: .byte 2 +#endif +#ifdef MODULES_DS18B20 + sramDs18b20Timer: .byte 2 + sramSendDs18b20TempTimer: .byte 2 +#endif + + +; *************************************************************************** +; data in FLASH + +.cseg + + + +; --------------------------------------------------------------------------- +; timer list + + +timerList: +; SRAM variable/counter routine flags secs (0=don't start or restart) +#ifdef MODULES_COM_WITH_ADDR_PROTO + .dw cproAddresModeTimer, CPRO_Address_OnTimer, 0, 0 ; (no restart) +#endif +#ifdef MODULES_STATS + .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 9000 ; every 15m +#endif +#ifdef MODULES_LCD +; .dw sramPeriodicalLcdMark, periodicalLcdMark, 0, 20 ; every 2s +; .dw sramTimerWriteStats, writeStats, 0, 100 + .dw sramTimerScreen, printScreen, TIMER_FLAGS_IF_ADDR, 50 ; every 5s +#endif +#ifdef MODULES_SI7021 + .dw sramTimerSI7021Measure, SI7021_OnTimer, 0, 300 ; every 30s + .dw sramTimerSI7021SendTemp, sendSI7021Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s + .dw sramTimerSI7021SendHumidity, sendSI7021Humidity, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif +#ifdef MODULES_CNY70 + .dw sramTimerCny70SendAdc, CNY70_OnTimer, TIMER_FLAGS_IF_ADDR, 50 ; every 5s +#endif +#ifdef MODULES_DS18B20 + .dw sramDs18b20Timer, Ds18b20_OnTimer, 0, 300 ; every 30s + .dw sramSendDs18b20TempTimer, sendDs18b20Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif + .dw 0 ; end of list + + + + + +.include "main_all.asm" + + + +systemSetSpeed: +.if clock == 8000000 + ldi r16, (1< + + + + + uart + ccs811 + + + + diff --git a/avr/devices/x03/ccs811/0BUILD b/avr/devices/x03/ccs811/0BUILD new file mode 100644 index 0000000..6329fc6 --- /dev/null +++ b/avr/devices/x03/ccs811/0BUILD @@ -0,0 +1,52 @@ + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + main.asm + + + + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + boot.asm + + + + + + + + + + + defs.asm + + + + + + diff --git a/avr/devices/x03/ccs811/boot.asm b/avr/devices/x03/ccs811/boot.asm new file mode 100644 index 0000000..b887867 --- /dev/null +++ b/avr/devices/x03/ccs811/boot.asm @@ -0,0 +1,124 @@ +; *************************************************************************** +; Source file for base system node on AtTiny 85 +; +; This is for the maintenance system (i.e. the flash loader). +; +; All definitions and changes should go into this file. +; +; +; *************************************************************************** + +.equ clock=1000000 ; Define the clock frequency + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "./defs.asm" +.include "defs_all.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.include "common/utils_wait.asm" +.include "modules/com2/defs.asm" +.include "modules/comproto/defs.asm" + + +; --------------------------------------------------------------------------- +; firmware settings + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + +; --------------------------------------------------------------------------- +; LED + +.equ LED_DDR = DDRA +.equ LED_PORT = PORTA +.equ LED_PIN = PINA +.equ LED_PINNUM = PORTA3 + + + +; *************************************************************************** +; code segment + +.cseg +.org 0x0000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors + rjmp main ; Reset vector + reti ; EXT_INT0 + reti ; PCI0 + reti ; OC1A + reti ; OVF1 + reti ; OVF0 + reti ; ERDY + reti ; ACI + reti ; ADCC + reti ; OC1B + reti ; OC0A + reti ; OC0B + reti ; WATCHDOG + reti ; USI_STR + reti ; USI_OVF + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'N', 0 +devInfoVersion: .db 14, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main ; will be overwritten when flashing + + + +; *************************************************************************** +; main code + + +.org BOOTLOADER_ADDR + + +main: + rjmp bootLoader ; this routine is in modules/flash/proto.asm + + + + +; *************************************************************************** +; includes + +.include "modules/uart_bitbang/bytelevel.asm" +.include "modules/uart_bitbang/packetlevel.asm" +.include "modules/com2/crc.asm" +.include "common/crc8.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "modules/flash/bootloader.asm" +.include "modules/flash/flash.asm" +.include "modules/flash/recv.asm" +.include "modules/flash/send.asm" +.include "modules/flash/wait.asm" +.include "modules/flash/hdl_flash_start.asm" +.include "modules/flash/hdl_flash_data.asm" +.include "modules/flash/hdl_flash_end.asm" +.include "modules/flash/flash_rsp.asm" +.include "modules/flash/flash_ready.asm" + + + + diff --git a/avr/devices/x03/ccs811/defs.asm b/avr/devices/x03/ccs811/defs.asm new file mode 100644 index 0000000..9d7ae13 --- /dev/null +++ b/avr/devices/x03/ccs811/defs.asm @@ -0,0 +1,134 @@ +; *************************************************************************** +; copyright : (C) 2023 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; +; AtTiny84 +; -------- +; VCC 1 14 GND +; PB0 2 13 PA0 AUX-A0 +; PIR PB1 3 12 PA1 COM-DATA +; /RESET PB3 4 11 PA2 +; AUX-B2 PB2 5 10 PA3 LED +; COM_ATTN PA7 6 9 PA4 TWI-SCL +; TWI-SDA PA6 7 8 PA5 +; -------- +; +; *************************************************************************** + + + +.equ BOOTLOADER_ADDR = 0xd00 + +.equ FIRMWARE_VARIANT_BOOT = 0 +.equ FIRMWARE_VARIANT_MAIN = 1 + + + +; --------------------------------------------------------------------------- +; LED module + +.equ LED_SIMPLE_ONTIME = 1 ; shorter +.equ LED_SIMPLE_OFFTIME = 50 ; longer +.equ LED_SIMPLE_DDR = DDRA +.equ LED_SIMPLE_PORT = PORTA +.equ LED_SIMPLE_PORTIN = PINA +.equ LED_SIMPLE_PINNUM = PORTA3 + + +.equ LED_DEBUG_DDR = DDRA +.equ LED_DEBUG_PORT = PORTA +.equ LED_DEBUG_PORTIN = PINA +.equ LED_DEBUG_PINNUM = PORTA5 + + + +; --------------------------------------------------------------------------- +; COM module + +.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400 +.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter + +.equ COM_DATA_DDR = DDRA +.equ COM_DATA_INPUT = PINA +.equ COM_DATA_OUTPUT = PORTA +.equ COM_DATA_PIN = PORTA1 + +.equ COM_ATTN_DDR = DDRA +.equ COM_ATTN_INPUT = PINA +.equ COM_ATTN_OUTPUT = PORTA +.equ COM_ATTN_PIN = PORTA7 + +.equ COM_IRQ_ADDR_ATTN = PCMSK0 +.equ COM_IRQ_BIT_ATTN = PCINT7 ; bit 7 in PCMSK0 +.equ COM_IRQ_GIFR_ATTN = PCIF0 +.equ COM_IRQ_GIMSK_ATTN = PCIE0 + + + +; --------------------------------------------------------------------------- +; TWI master module + +;.equ TWI_BIT_LENGTH = 10000 ; 100000 and 200000 works for display: 10000, 100000, 200000 +.equ TWI_BIT_LENGTH = 1 ; 10, 100, 500, 100000 and 200000 works for display: 10000, 100000, 200000 + +.equ TWI_DDR_SCL = DDRA +.equ TWI_PORT_SCL = PORTA +.equ TWI_PIN_SCL = PINA +.equ TWI_PINNUM_SCL = PORTA4 + +.equ TWI_DDR_SDA = DDRA +.equ TWI_PORT_SDA = PORTA +.equ TWI_PIN_SDA = PINA +.equ TWI_PINNUM_SDA = PORTA6 + + + +; --------------------------------------------------------------------------- +; LCD module + +.equ LCD_TWI_ADDRESS = 0x3c + + + +; --------------------------------------------------------------------------- +; SI 7021 + +.equ SI7021_ADDR = 0x40 + + + +; --------------------------------------------------------------------------- +; 1-Wire Master +; + +.equ OWI_DDR = DDRB +.equ OWI_PORTOUT = PORTB +.equ OWI_PORTIN = PINB +.equ OWI_PINNUM = PORTB2 + + + +; --------------------------------------------------------------------------- +; Motion Sensor +; + +.equ MOTION_DDR = DDRB +.equ MOTION_INPUT = PINB +.equ MOTION_OUTPUT = PORTB +.equ MOTION_PIN = PORTB1 + + + + +.equ CCS811_ADDR = 0x5a ; or 0x5b + + + diff --git a/avr/devices/x03/ccs811/main.asm b/avr/devices/x03/ccs811/main.asm new file mode 100644 index 0000000..44f55dc --- /dev/null +++ b/avr/devices/x03/ccs811/main.asm @@ -0,0 +1,339 @@ +; *************************************************************************** +; copyright : (C) 2024 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; Source file for LED controller node on AtTiny 85 +; +; This is for the full system (i.e. not the boot loader). +; *************************************************************************** + +.equ clock=1000000 ; Define the clock frequency + + + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "./defs.asm" +.include "defs_all.asm" +.include "common/utils_wait.asm" ; wait macro + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; firmware settings including list of modules used + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + +#define MODULES_TIMER +#define MODULES_COM +#define MODULES_COM_WITH_ADDR_PROTO +#define MODULES_LED_SIMPLE +#define MODULES_TWI_MASTER +;#define MODULES_SI7021 +#define MODULES_STATS +; #define MODULES_OWI_MASTER +; #define MODULES_DS18B20 +; #define MODULES_SK6812 +; #define MODULES_MOTION_LIGHT + +; #define COM_ACCEPT_ALL_DEST +#define MODULES_CCS811 + + +; --------------------------------------------------------------------------- +; defines for modules + +;.equ VALUE_ID_SI7021_TEMP = 0x01 +;.equ VALUE_ID_SI7021_HUM = 0x02 + +;.equ VALUE_ID_ADC = 0x03 +;.equ VALUE_ID_REED1 = 0x04 +;.equ VALUE_ID_REED2 = 0x05 +;.equ VALUE_ID_DS18B20_TEMP = 0x06 + +;.equ VALUE_ID_LED_NUMLEDS = 0x82 +;.equ VALUE_ID_LED_RGBW_VALUE = 0x83 +;.equ VALUE_ID_MAL_RGBW_VALUE = 0x84 +;.equ VALUE_ID_MAL_ONTIME = 0x85 +;.equ VALUE_ID_MAL_SOURCE1 = 0x86 +;.equ VALUE_ID_MAL_SOURCE2 = 0x87 + + +; *************************************************************************** +; code segment + +.cseg +.org 000000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors + + rjmp BOOTLOADER_ADDR ; Reset vector ; use this for flashed system + reti ; EXT_INT0 + rjmp uartBitbangIsrPcint0 ; PCI0 + reti ; OC1A + reti ; OVF1 + reti ; OVF0 + reti ; ERDY + reti ; ACI + reti ; ADCC + reti ; OC1B + rjmp baseTimerIrqOC0A ; OC0A + reti ; OC0B + reti ; WATCHDOG + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'N', 0 +devInfoVersion: .db 18, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_MAIN, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main + + +; *************************************************************************** +; includes + +.include "common/utils.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "common/crc8.asm" + +.include "modules/basetimer/main.asm" + +#ifdef MODULES_TIMER + .include "modules/timer/main.asm" +#endif +#ifdef MODULES_LED_SIMPLE +.include "modules/led_simple/main.asm" +#endif +#ifdef MODULES_COM + .include "modules/com2/defs.asm" + .include "modules/com2/main.asm" + .include "modules/com2/buffer.asm" + #ifdef MODULES_STATS + .include "modules/comproto/msg_recvstats.asm" + .include "modules/comproto/msg_sendstats.asm" + .include "modules/comproto/msg_sysstats.asm" + .include "modules/comproto/msg_memstats.asm" + #endif + .include "modules/comproto/msg_pong.asm" + .include "modules/comproto/msg_value.asm" + .include "modules/comproto/msg_device.asm" + .include "modules/comproto/msg_reboot.asm" + .include "modules/uart_bitbang/defs.asm" + .include "modules/uart_bitbang/main.asm" + .include "modules/uart_bitbang/bytelevel.asm" + .include "modules/uart_bitbang/packetlevel.asm" + #ifdef MODULES_COM_WITH_ADDR_PROTO + .include "modules/comproto/defs.asm" + .include "modules/comproto/main.asm" + .include "modules/comproto/addr.asm" + #endif +#endif +#ifdef MODULES_STATS + .include "modules/stats/main.asm" +#endif +#ifdef MODULES_TWI_MASTER + .include "modules/twimaster/main.asm" +#endif +#ifdef MODULES_OWI_MASTER + .include "modules/owimaster/main.asm" +#endif +#ifdef MODULES_SI7021 + .include "modules/si7021/main.asm" +#endif +#ifdef MODULES_DS18B20 + .include "modules/ds18b20/main.asm" +#endif +#ifdef MODULES_SK6812 + .include "modules/sk6812/main.asm" +#endif +#ifdef MODULES_MOTION_LIGHT + .include "modules/ma_light/main.asm" +#endif +#ifdef MODULES_CCS811 + .include "modules/ccs811/main.asm" +#endif + + + +; *************************************************************************** +; data in SRAM + +.dseg + + +#ifdef MODULES_DS18B20 + sramDs18b20Timer: .byte 2 + sramSendDs18b20TempTimer: .byte 2 +#endif + + +; *************************************************************************** +; data in FLASH + +.cseg + + + +; --------------------------------------------------------------------------- +; timer list + + +timerList: +; SRAM variable/counter routine flags secs (0=don't start or restart) +#ifdef MODULES_COM_WITH_ADDR_PROTO + .dw cproAddresModeTimer, CPRO_Address_OnTimer, 0, 0 ; (no restart) +#endif +#ifdef MODULES_STATS + .dw statsSendTimer, Stats_Timer, TIMER_FLAGS_IF_ADDR, 9000 ; every 15m +#endif +#ifdef MODULES_DS18B20 + .dw sramDs18b20Timer, Ds18b20_OnTimer, 0, 300 ; every 30s + .dw sramSendDs18b20TempTimer, sendDs18b20Temp, TIMER_FLAGS_IF_ADDR, 600 ; every 60s +#endif + .dw 0 ; end of list + + + + + +.include "main_all.asm" + + +; --------------------------------------------------------------------------- +; Called early on system startup. No arguments, no results. + +systemSetSpeed: +.if clock == 8000000 + ldi r16, (1< + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + main.asm + + + + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + boot.asm + + + + + + + + + + + defs.asm + + + + + + diff --git a/avr/devices/x03/uart/boot.asm b/avr/devices/x03/uart/boot.asm new file mode 100644 index 0000000..8e833a4 --- /dev/null +++ b/avr/devices/x03/uart/boot.asm @@ -0,0 +1,162 @@ +; *************************************************************************** +; Source file for base system node on AtTiny 84 +; +; This is for the maintenance system (i.e. the flash loader). +; +; All definitions and changes should go into this file. +; *************************************************************************** + +.equ clock=1000000 ; Define the clock frequency + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "defs_all.asm" +.include "./defs.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.include "common/utils_wait.asm" +.include "modules/com2/defs.asm" +.include "modules/comproto/defs.asm" + + + +; --------------------------------------------------------------------------- +; firmware settings + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + + +; --------------------------------------------------------------------------- +; LED + +.equ LED_DDR = DDRA +.equ LED_PORT = PORTA +.equ LED_PIN = PINA +.equ LED_PINNUM = PORTA3 + + +; *************************************************************************** +; code segment + +.cseg +.org 0x0000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors +; rjmp start ; Reset vector + rjmp main ; Reset vector + reti ; EXT_INT0 + reti ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + reti ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'X', 0 +devInfoVersion: .db 3, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main ; will be overwritten when flashing + + + +; *************************************************************************** +; main code + + +.org BOOTLOADER_ADDR + + +main: + rjmp bootLoader ; this routine is in modules/flash/proto.asm + + + + +; *************************************************************************** +; includes + +.include "modules/uart_bitbang/bytelevel.asm" +.include "modules/uart_bitbang/packetlevel.asm" +.include "modules/com2/crc.asm" +.include "common/crc8.asm" +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" +.include "modules/flash/bootloader.asm" +.include "modules/flash/flash.asm" +.include "modules/flash/recv.asm" +.include "modules/flash/send.asm" +.include "modules/flash/wait.asm" +.include "modules/flash/hdl_flash_start.asm" +.include "modules/flash/hdl_flash_data.asm" +.include "modules/flash/hdl_flash_end.asm" +.include "modules/flash/flash_rsp.asm" +.include "modules/flash/flash_ready.asm" + + +#if 0 +debugStop: + cli + sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out + cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on + + cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN + + ldi r18, 0 +test_loop1: + ldi r16, 100 +test_loop2: + ldi r17, 100 +test_loop3: + Utils_WaitNanoSecs 10000, 0, r22 + dec r17 + brne test_loop3 + dec r16 + brne test_loop2 + sbi LED_SIMPLE_PORTIN, LED_SIMPLE_PINNUM ; toggle + inc r18 + mov r19, r18 + andi r19, 1 + brne test1 + sbi COM_ATTN_DDR, COM_ATTN_PIN + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN + rjmp test_loop1 +test1: + cbi COM_ATTN_DDR, COM_ATTN_PIN + cbi COM_ATTN_OUTPUT, COM_ATTN_PIN + + rjmp test_loop1 +#endif + + + diff --git a/avr/devices/x03/uart/defs.asm b/avr/devices/x03/uart/defs.asm new file mode 100644 index 0000000..df7903b --- /dev/null +++ b/avr/devices/x03/uart/defs.asm @@ -0,0 +1,72 @@ +; *************************************************************************** +; copyright : (C) 2023 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; +; AtTiny84 +; -------- +; VCC 1 14 GND +; PB0 2 13 PA0 COM_ATTN1 +; PB1 3 12 PA1 COM-DATA1 +; /RESET PB3 4 11 PA2 +; COM_ATTN2 PB2 5 10 PA3 LED +; COM_DATA2 PA7 6 9 PA4 +; PA6 7 8 PA5 +; -------- +; +; *************************************************************************** + + + +.equ BOOTLOADER_ADDR = 0xd00 + +.equ FIRMWARE_VARIANT_BOOT = 0 +.equ FIRMWARE_VARIANT_ROUTER = 1 + + + +; --------------------------------------------------------------------------- +; LED module + +.equ LED_SIMPLE_DDR = DDRA +.equ LED_SIMPLE_PORT = PORTA +.equ LED_SIMPLE_PORTIN = PINA +.equ LED_SIMPLE_PINNUM = PORTA3 + + + +; --------------------------------------------------------------------------- +; COM module + +.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400 +.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter + +.equ COM_DATA_DDR = DDRA +.equ COM_DATA_INPUT = PINA +.equ COM_DATA_OUTPUT = PORTA +.equ COM_DATA_PIN = PORTA1 + +.equ COM_ATTN_DDR = DDRA +.equ COM_ATTN_INPUT = PINA +.equ COM_ATTN_OUTPUT = PORTA +.equ COM_ATTN_PIN = PORTA0 + +.equ COM_DATA2_DDR = DDRA +.equ COM_DATA2_INPUT = PINA +.equ COM_DATA2_OUTPUT = PORTA +.equ COM_DATA2_PIN = PORTA7 + +.equ COM_ATTN2_DDR = DDRB +.equ COM_ATTN2_INPUT = PINB +.equ COM_ATTN2_OUTPUT = PORTB +.equ COM_ATTN2_PIN = PORTB2 + + + diff --git a/avr/devices/x03/uart/main.asm b/avr/devices/x03/uart/main.asm new file mode 100644 index 0000000..bada453 --- /dev/null +++ b/avr/devices/x03/uart/main.asm @@ -0,0 +1,221 @@ +; *************************************************************************** +; copyright : (C) 2024 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + + + +; *************************************************************************** +; Source file for temperature sensor node on AtTiny 84 +; +; This is for the full system (i.e. not the boot loader). +; +; All definitions and changes should go into this file. +; +; +; *************************************************************************** + + +; .equ clock=1000000 ; Define the clock frequency +.equ clock=8000000 ; Define the clock frequency + + + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "defs_all.asm" +.include "./defs.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + + +.include "common/utils_wait.asm" + + +; --------------------------------------------------------------------------- +; firmware settings including list of modules used + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + + + +; *************************************************************************** +; code segment + +.cseg +.org 000000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors (will be removed as soon as we can flash data over COM) + +; rjmp main ; Reset vector + rjmp BOOTLOADER_ADDR ; Reset vector ; use this for flashed system + reti ; EXT_INT0 + reti ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + rjmp uartIrqIsrOC0A ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db 'X', 0 +devInfoVersion: .db 3, 0 ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_ROUTER, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: rjmp main + + +; *************************************************************************** +; includes + +.include "common/utils.asm" +.include "common/utils_wait_fixed.asm" +;.include "common/utils_copy_from_flash.asm" +;.include "common/utils_copy_sdram.asm" +.include "common/crc8.asm" + +#include "modules/uart_irq/defs.asm" +#include "modules/uart_irq/iface.asm" +#include "modules/uart_irq/iface1.asm" +#include "modules/uart_irq/iface2.asm" + + +; *************************************************************************** +; data in SRAM + +.dseg + +programRamBegin: +ledTimer: .byte 1 +programRamEnd: + + + +; *************************************************************************** +; data in FLASH + +.cseg + + +main: + ldi xh, HIGH(programRamBegin) + ldi xl, LOW(programRamBegin) + clr r16 + ldi r17, (programRamEnd-programRamBegin) + rcall Utils_FillSram + rcall init + sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out + cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on + clr r16 + sts ledTimer, r16 + sei +main_loop: +; rcall writeTestByteToIface2 +; rcall copyFromIface1To2 +; brcc main_sleep +; rjmp main_loop + +main_sleep: + ; only modify SE, SM1 and SM0 + cli + in r16, MCUCR + ldi r17, (1< basetimer bmp280 + ccs811 cny70 com2 comproto + ds18b20 flash lcd led led_simple - reed - si7021 - stats - timer - twimaster - owimaster - ds18b20 - sk6812 ma_light motion - uart_bitbang + owimaster + reed + si7021 + sk6812 + stats tcrt1000 + timer + twimaster + uart_bitbang diff --git a/avr/modules/ccs811/main.asm b/avr/modules/ccs811/main.asm index ca42f55..afe5870 100644 --- a/avr/modules/ccs811/main.asm +++ b/avr/modules/ccs811/main.asm @@ -190,7 +190,7 @@ CCS811_OnTimer_measure: lds r16, ccs811ResponseData+4 andi r16, (1< diff --git a/devices/nodes/aqua_n11.xml b/devices/nodes/aqua_n11.xml index b439c32..ccc1658 100644 --- a/devices/nodes/aqua_n11.xml +++ b/devices/nodes/aqua_n11.xml @@ -9,7 +9,9 @@ - + + + diff --git a/devices/nodes/aqua_n16.xml b/devices/nodes/aqua_n16.xml new file mode 100644 index 0000000..91faa5f --- /dev/null +++ b/devices/nodes/aqua_n16.xml @@ -0,0 +1,15 @@ + + + AQUA + N + 16 + + + + + + + + + + diff --git a/devices/nodes/aqua_n17.xml b/devices/nodes/aqua_n17.xml new file mode 100644 index 0000000..78a4d89 --- /dev/null +++ b/devices/nodes/aqua_n17.xml @@ -0,0 +1,13 @@ + + + AQUA + N + 17 + + + + + + + + diff --git a/devices/nodes/aqua_n18.xml b/devices/nodes/aqua_n18.xml new file mode 100644 index 0000000..c86c0aa --- /dev/null +++ b/devices/nodes/aqua_n18.xml @@ -0,0 +1,14 @@ + + + AQUA + N + 18 + + + + + + + + +