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avr: added devices, more work on modules.

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This commit is contained in:
Martin Preuss
2024-12-15 18:20:54 +01:00
parent c3fd458769
commit 4dc6031d03
61 changed files with 4758 additions and 184 deletions
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2
avr/devices/x03/uart/.gitignore vendored Normal file
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*.eep.hex
*.obj

52
avr/devices/x03/uart/0BUILD Normal file
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<?xml?>
<gwbuild>
<target type="AvrHexFile" name="firmware" >
<includes type="avrasm" >
-I $(builddir)
-I $(srcdir)
-I $(topsrcdir)/avr
-I $(topbuilddir)/avr
</includes>
<sources type="avrasm" >
main.asm
</sources>
</target>
<target type="AvrHexFile" name="boot" >
<includes type="avrasm" >
-I $(builddir)
-I $(srcdir)
-I $(topsrcdir)/avr
-I $(topbuilddir)/avr
</includes>
<sources type="avrasm" >
boot.asm
</sources>
</target>
<subdirs>
</subdirs>
<extradist>
defs.asm
</extradist>
</gwbuild>

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avr/devices/x03/uart/boot.asm Normal file
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; ***************************************************************************
; Source file for base system node on AtTiny 84
;
; This is for the maintenance system (i.e. the flash loader).
;
; All definitions and changes should go into this file.
; ***************************************************************************
.equ clock=1000000 ; Define the clock frequency
.nolist
.include "include/tn84def.inc" ; Define device ATtiny84
.list
.include "defs_all.asm"
.include "./defs.asm"
; ***************************************************************************
; defines
; ---------------------------------------------------------------------------
; generic
.include "common/utils_wait.asm"
.include "modules/com2/defs.asm"
.include "modules/comproto/defs.asm"
; ---------------------------------------------------------------------------
; firmware settings
.equ FIRMWARE_VERSION_MAJOR = 0
.equ FIRMWARE_VERSION_MINOR = 0
.equ FIRMWARE_VERSION_PATCHLEVEL = 1
; ---------------------------------------------------------------------------
; LED
.equ LED_DDR = DDRA
.equ LED_PORT = PORTA
.equ LED_PIN = PINA
.equ LED_PINNUM = PORTA3
; ***************************************************************************
; code segment
.cseg
.org 0x0000
; ---------------------------------------------------------------------------
; Reset and interrupt vectors
; rjmp start ; Reset vector
rjmp main ; Reset vector
reti ; EXT_INT0
reti ; PCI0
reti ; PCI1
reti ; WATCHDOG
reti ; ICP1
reti ; OC1A
reti ; OC1B
reti ; OVF1
reti ; OC0A
reti ; OC0B
reti ; OVF0
reti ; ACI
reti ; ADCC
reti ; ERDY
reti ; USI_STR
reti ; USI_OVF
devInfoBlock: ; 12 bytes
devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
devInfoId: .db 'X', 0
devInfoVersion: .db 3, 0 ; version, revision
firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR
.db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
firmwareStart: rjmp main ; will be overwritten when flashing
; ***************************************************************************
; main code
.org BOOTLOADER_ADDR
main:
rjmp bootLoader ; this routine is in modules/flash/proto.asm
; ***************************************************************************
; includes
.include "modules/uart_bitbang/bytelevel.asm"
.include "modules/uart_bitbang/packetlevel.asm"
.include "modules/com2/crc.asm"
.include "common/crc8.asm"
.include "common/utils_wait_fixed.asm"
.include "common/utils_copy_from_flash.asm"
.include "common/utils_copy_sdram.asm"
.include "modules/flash/bootloader.asm"
.include "modules/flash/flash.asm"
.include "modules/flash/recv.asm"
.include "modules/flash/send.asm"
.include "modules/flash/wait.asm"
.include "modules/flash/hdl_flash_start.asm"
.include "modules/flash/hdl_flash_data.asm"
.include "modules/flash/hdl_flash_end.asm"
.include "modules/flash/flash_rsp.asm"
.include "modules/flash/flash_ready.asm"
#if 0
debugStop:
cli
sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out
cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
ldi r18, 0
test_loop1:
ldi r16, 100
test_loop2:
ldi r17, 100
test_loop3:
Utils_WaitNanoSecs 10000, 0, r22
dec r17
brne test_loop3
dec r16
brne test_loop2
sbi LED_SIMPLE_PORTIN, LED_SIMPLE_PINNUM ; toggle
inc r18
mov r19, r18
andi r19, 1
brne test1
sbi COM_ATTN_DDR, COM_ATTN_PIN
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN
rjmp test_loop1
test1:
cbi COM_ATTN_DDR, COM_ATTN_PIN
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN
rjmp test_loop1
#endif

72
avr/devices/x03/uart/defs.asm Normal file
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; ***************************************************************************
; copyright : (C) 2023 by Martin Preuss
; email : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome". *
; * Please see toplevel file COPYING of that project for license details. *
; ***************************************************************************
; ***************************************************************************
;
; AtTiny84
; --------
; VCC 1 14 GND
; PB0 2 13 PA0 COM_ATTN1
; PB1 3 12 PA1 COM-DATA1
; /RESET PB3 4 11 PA2
; COM_ATTN2 PB2 5 10 PA3 LED
; COM_DATA2 PA7 6 9 PA4
; PA6 7 8 PA5
; --------
;
; ***************************************************************************
.equ BOOTLOADER_ADDR = 0xd00
.equ FIRMWARE_VARIANT_BOOT = 0
.equ FIRMWARE_VARIANT_ROUTER = 1
; ---------------------------------------------------------------------------
; LED module
.equ LED_SIMPLE_DDR = DDRA
.equ LED_SIMPLE_PORT = PORTA
.equ LED_SIMPLE_PORTIN = PINA
.equ LED_SIMPLE_PINNUM = PORTA3
; ---------------------------------------------------------------------------
; COM module
.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400
.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter
.equ COM_DATA_DDR = DDRA
.equ COM_DATA_INPUT = PINA
.equ COM_DATA_OUTPUT = PORTA
.equ COM_DATA_PIN = PORTA1
.equ COM_ATTN_DDR = DDRA
.equ COM_ATTN_INPUT = PINA
.equ COM_ATTN_OUTPUT = PORTA
.equ COM_ATTN_PIN = PORTA0
.equ COM_DATA2_DDR = DDRA
.equ COM_DATA2_INPUT = PINA
.equ COM_DATA2_OUTPUT = PORTA
.equ COM_DATA2_PIN = PORTA7
.equ COM_ATTN2_DDR = DDRB
.equ COM_ATTN2_INPUT = PINB
.equ COM_ATTN2_OUTPUT = PORTB
.equ COM_ATTN2_PIN = PORTB2

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avr/devices/x03/uart/main.asm Normal file
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; ***************************************************************************
; copyright : (C) 2024 by Martin Preuss
; email : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome". *
; * Please see toplevel file COPYING of that project for license details. *
; ***************************************************************************
; ***************************************************************************
; Source file for temperature sensor node on AtTiny 84
;
; This is for the full system (i.e. not the boot loader).
;
; All definitions and changes should go into this file.
;
;
; ***************************************************************************
; .equ clock=1000000 ; Define the clock frequency
.equ clock=8000000 ; Define the clock frequency
.nolist
.include "include/tn84def.inc" ; Define device ATtiny84
.list
.include "defs_all.asm"
.include "./defs.asm"
; ***************************************************************************
; defines
; ---------------------------------------------------------------------------
; generic
.include "common/utils_wait.asm"
; ---------------------------------------------------------------------------
; firmware settings including list of modules used
.equ FIRMWARE_VERSION_MAJOR = 0
.equ FIRMWARE_VERSION_MINOR = 0
.equ FIRMWARE_VERSION_PATCHLEVEL = 1
; ***************************************************************************
; code segment
.cseg
.org 000000
; ---------------------------------------------------------------------------
; Reset and interrupt vectors (will be removed as soon as we can flash data over COM)
; rjmp main ; Reset vector
rjmp BOOTLOADER_ADDR ; Reset vector ; use this for flashed system
reti ; EXT_INT0
reti ; PCI0
reti ; PCI1
reti ; WATCHDOG
reti ; ICP1
reti ; OC1A
reti ; OC1B
reti ; OVF1
rjmp uartIrqIsrOC0A ; OC0A
reti ; OC0B
reti ; OVF0
reti ; ACI
reti ; ADCC
reti ; ERDY
reti ; USI_STR
reti ; USI_OVF
devInfoBlock: ; 12 bytes
devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
devInfoId: .db 'X', 0
devInfoVersion: .db 3, 0 ; version, revision
firmwareVersion: .db FIRMWARE_VARIANT_ROUTER, FIRMWARE_VERSION_MAJOR
.db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL
firmwareStart: rjmp main
; ***************************************************************************
; includes
.include "common/utils.asm"
.include "common/utils_wait_fixed.asm"
;.include "common/utils_copy_from_flash.asm"
;.include "common/utils_copy_sdram.asm"
.include "common/crc8.asm"
#include "modules/uart_irq/defs.asm"
#include "modules/uart_irq/iface.asm"
#include "modules/uart_irq/iface1.asm"
#include "modules/uart_irq/iface2.asm"
; ***************************************************************************
; data in SRAM
.dseg
programRamBegin:
ledTimer: .byte 1
programRamEnd:
; ***************************************************************************
; data in FLASH
.cseg
main:
ldi xh, HIGH(programRamBegin)
ldi xl, LOW(programRamBegin)
clr r16
ldi r17, (programRamEnd-programRamBegin)
rcall Utils_FillSram
rcall init
sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM ; out
cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on
clr r16
sts ledTimer, r16
sei
main_loop:
; rcall writeTestByteToIface2
; rcall copyFromIface1To2
; brcc main_sleep
; rjmp main_loop
main_sleep:
; only modify SE, SM1 and SM0
cli
in r16, MCUCR
ldi r17, (1<<SE) | (1<<SM1) | (1<<SM0)
neg r17
and r16, r17
ori r16, (1<<SE) ; sleep mode "idle", enable
out MCUCR, r16
sei ; make sure interrupts really are enabled
sleep ; sleep, wait for interrupt
lds r16, ledTimer
dec r16
sts ledTimer, r16
brne main_loop
sbi LED_SIMPLE_PORTIN, LED_SIMPLE_PINNUM ; toggle
rcall writeTestByteToIface2
rjmp main_loop
init:
rcall systemSetSpeed
rcall Utils_Init
rcall UART_Irq_InitIface1
rcall UART_Irq_InitIface2
rcall uart_irq_timer_init
ret
copyFromIface1To2:
ldi yl, LOW(uartIrqDataIface1)
ldi yh, HIGH(uartIrqDataIface1)
rcall uart_irq_rdbuf_readbyte
brcs copyFromIface1To2_gotOne
ret
copyFromIface1To2_gotOne:
ldi yl, LOW(uartIrqDataIface2)
ldi yh, HIGH(uartIrqDataIface2)
rcall uart_irq_wrbuf_writebyte
sec
ret
writeTestByteToIface2:
ldi yl, LOW(uartIrqDataIface2)
ldi yh, HIGH(uartIrqDataIface2)
ldi r16, 0x55
rjmp uart_irq_wrbuf_writebyte
systemSetSpeed:
;.if clock == 8000000
ldi r16, (1<<CLKPCE)
ldi r17, 0
out CLKPR, r16
out CLKPR, r17
;.endif
ret
systemSetBootSpeed:
.if clock == 8000000
ldi r16, (1<<CLKPCE)
ldi r17, (1<<CLKPS1) | (1<<CLKPS0)
out CLKPR, r16
out CLKPR, r17
.endif
ret