main: added tests for twi module. COM: added COM_EnqueueI2cBusMember

This commit is contained in:
Martin Preuss
2023-01-28 00:11:03 +01:00
parent d80c0299a3
commit 4cbcfd6c01
2 changed files with 76 additions and 1 deletions

View File

@@ -39,6 +39,8 @@
.equ COM_CMD_PING = 1
.equ COM_CMD_COMSENDSTATS = 2
.equ COM_CMD_COMRECVSTATS = 3
.equ COM_CMD_I2CBUSMEMBER = 4
; ***************************************************************************
@@ -127,7 +129,7 @@ Com_Init:
ldi r17, (comDataEnd-comDataBegin)
rcall Utils_FillSram
ldi r16, 1 ; debug: set fixed address "1"
ldi r16, 2 ; debug: set fixed address "2"
sts comAddress, r16
; setup pins and interrupts
@@ -344,6 +346,56 @@ COM_EnqueueComSendStats_error:
; ---------------------------------------------------------------------------
; Enqueue a I2C Bus Member packet.
;
; IN:
; - R16: destination address
; - R1 : Address of the bus member
; - R2 : availability (0=not available, 1=available)
; OUT:
; - CFLAG: set if okay, clear otherwise
; MODIFIED REGS: R16, R17, R20, X (R15, Y)
COM_EnqueueI2cBusMember:
push r16
rcall COM_AllocBufferAndGetXY ; (r16, r17, r21)
pop r16
brcc COM_EnqueueI2cBusMember_error
clr r17 ; r17: XOR byte
; write header (dest address, msg length)
st X+, r16 ; destination address
eor r17, r16
ldi r16, 4 ; 4 bytes payload
st X+, r16
eor r17, r16
; write payload
ldi r16, COM_CMD_I2CBUSMEMBER ; send command
st X+, r16
eor r17, r16
lds r16, comAddress ; send source address
st X+, r16
eor r17, r16
mov r16, r1 ; send i2c bus member address
st X+, r16
eor r17, r16
mov r16, r2 ; send i2c bus member availability
st X+, r16
eor r17, r16
; store XOR byte
st X+, r17
; mark buffer as enqueued with PRIO "info" (limited amount of retries)
ldi r20, COM_BUFFER_PRIO_INFO
rcall COM_EnqueuePacket ; (R15, R16)
brcc COM_EnqueueI2cBusMember_error
sec
ret
COM_EnqueueI2cBusMember_error:
clc
ret
; ---------------------------------------------------------------------------
; comHandleNextPacketInQueue
;

View File

@@ -36,6 +36,21 @@
; ---------------------------------------------------------------------------
; TWI master module
.equ TWI_DDR_SCL = DDRA
.equ TWI_PORT_SCL = PORTA
.equ TWI_PIN_SCL = PINA
.equ TWI_PINNUM_SCL = PORTA4
.equ TWI_DDR_SDA = DDRA
.equ TWI_PORT_SDA = PORTA
.equ TWI_PIN_SDA = PINA
.equ TWI_PINNUM_SDA = PORTA6
; ***************************************************************************
; code segment
@@ -75,6 +90,7 @@
.include "timer.asm"
.include "led.asm"
.include "com.asm"
.include "twimaster.asm"
@@ -129,6 +145,9 @@ main:
ldi yh, HIGH(ledA3Sram)
rcall Led_SetPattern
ldi r16, 1
sts twiMasterScanEnabled, r16
main_loop:
rcall runModulesUntilIdle
; sbi DDRA, PORTA2 ; debug
@@ -170,6 +189,7 @@ initModules:
rcall Led_Init
rcall Com_Init
rcall TWI_Master_Init
ret
@@ -243,6 +263,9 @@ onEvery100ms:
; USED: depending on called routines
onEverySecond:
sbi DDRA, PORTA2 ; debug
sbi PINA, PORTA2 ; debug (toggle)
rcall TWI_Master_ScanNext
ret