comonuart1: try to solve timing/irq problem.

avr/modules/uart_hw2/comonuart1.asm

@@ -97,6 +97,7 @@ ComOnUart1_Periodically_end:
 ;
 ; @param R16 mode
 ; @clobbers R17
+
 comOnUart1SetMode:
   push r15
     in r15, SREG
@@ -127,7 +128,7 @@ comOnUart1StartReading:
   adiw xh:xl, UART_HW2_IFACE_OFFS_BUFFER
   std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
   std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
-  ldi r16, UART_HW2_BUFFER_SIZE
+  ldi r16, UART_HW2_BUFFER_SIZE-1
   std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r16
   clr r16
   std Y+UART_HW2_IFACE_OFFS_BUFUSED, r16
@@ -195,23 +196,13 @@ comOnUart1StartWriting_end:
 ComOnUart1_Run:
   ldi yl, LOW(comOnUart1_iface)
   ldi yh, HIGH(comOnUart1_iface)
-  push r15
-    in r15, SREG
-    cli
-    ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
-    out SREG, r15
-  pop r15
+  ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
 ComOnUart1_Run_loop:
     push r16                   ; current state
       rcall comOnUart1RunMode  ; (all but Y)
     pop r17                    ; previous state (pop from r16 into r17)
     ; read new state
-    push r15
-      in r15, SREG
-      cli
-      ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
-      out SREG, r15
-    pop r15
+    ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
     cp r16, r17
   brne ComOnUart1_Run_loop  ; state changed, run again
   ret
@@ -460,7 +451,8 @@ comOnUart1StartTx:
   cbr r16, (1<<TXC1)                             ; clear TXCn interrupt
   outr UCSR1A, r16
   inr r16, UCSR1B
-  sbr r16, (1<<UDRIE1) | (1<<TXC1) | (1<<TXEN1)  ; enable TX UDRE and TXC1 interrupt, enable transceive
+;  sbr r16, (1<<UDRIE1) | (1<<TXC1) | (1<<TXEN1)  ; enable TX UDRE and TXC1 interrupt, enable transceive
+  sbr r16, (1<<UDRIE1) | (1<<TXEN1)  ; enable TX UDRE interrupt, enable transceive
   outr UCSR1B, r16
   ret
 ; @end
@@ -785,7 +777,12 @@ comOnUart1TxUdreIsr:
   std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
   ; send byte
   outr UDR1, r16                               ; send byte
-  ; decreased counter
+
+  inr r16, UCSR1B
+  sbr r16, (1<<TXC1)                          ; enable TXC1 interrupt
+  outr UCSR1B, r16
+
+  ; decrease counter
   dec r17
   std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
   brne comOnUart1TxUdreIsr_end                ; still bytes left to send, jump
@@ -813,6 +810,9 @@ comOnUart1TxUdreIsr_end:
 ; @clobbers R16, R17
 
 comOnUart1TxCharIsr:
+  ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
+  cpi r16, UART_HW2_MODE_WAITBUFFEREMPTY
+  brne comOnUart1TxCharIsr_end
   ; disable further TXC interrupts
   inr r16, UCSR1B
   cbr r16, (1<<TXC1)                          ; disable TXC1 interrupt
@@ -820,6 +820,7 @@ comOnUart1TxCharIsr:
   rcall comOnUart1StopTx                      ; (R16)
   ldi r16, UART_HW2_MODE_MSGSENT
   rcall comOnUart1SetMode                     ; (R17)
+comOnUart1TxCharIsr_end:
   ret
 ; @end