avr: fixed code order.
only disable interrupts if message sent completely.
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@@ -238,16 +238,16 @@ l_end_%:
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; @clobbers R16
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.macro M_UART_HW_Uart_TxCharIsr
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; disable further TXC1 interrupts
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lds r16, UCSR@0B
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cbr r16, (1<<TXC@0) ; disable TXC1 interrupt
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sts UCSR@0B, r16
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; check write mode
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ldd r16, Y+UART_HW_IFACE_OFFS_WRITEMODE
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cpi r16, UART_HW_WRITEMODE_WAITBUFFEREMPTY
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brne l_end_%
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; disable further TXC1 interrupts
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lds r16, UCSR@0B
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cbr r16, (1<<TXC@0) ; disable TXC1 interrupt
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sts UCSR@0B, r16
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; change write mode to WRITEBUFFEREMPTY
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ldi r16, UART_HW_WRITEMODE_WRITEBUFFEREMPTY
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std Y+UART_HW_IFACE_OFFS_WRITEMODE, r16
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