reset uart_hw code to what works on t03.
This commit is contained in:
Martin Preuss
@@ -10,7 +10,7 @@
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.equ COMONUART0_IFACENUM = 1
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.equ COMONUART0_READ_TIMEOUT = 3
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.equ COMONUART0_MSG_INTERVAL = 0
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.equ COMONUART0_MSG_INTERVAL = 1
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@@ -30,32 +30,17 @@ comOnUart0_iface: .byte UART_HW_IFACE_SIZE
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ComOnUart0_Init:
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ldi yl, LOW(comOnUart0_iface)
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ldi yh, HIGH(comOnUart0_iface)
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rcall comOnUart0SetAttnInput ; (none)
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rcall comOnUart0SetAttnInput ; (none)
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rcall UART_HW_Interface_Init ; (R16, R17, X)
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rcall comOnUart0Init ; (R16, R17, X)
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rcall comOnUart0Init ; (R16, R17, X)
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ldi r16, COMONUART0_IFACENUM
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std Y+NET_IFACE_OFFS_IFACENUM, r16
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.if COM_IRQ_BIT_ATTN == INT0
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M_IO_READ r16, MCUCR
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cbr r16, (1<<ISC01) | (1<<ISC00)
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sbr r16, (1<<ISC01) | (0<<ISC00) ; falling edge of ATTN
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; sbr r16, (0<<ISC01) | (0<<ISC00) ; low level triggers
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M_IO_READ r16, COM_IRQ_ADDR_ATTN ; enable irq for ATTN line
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sbr r16, (1<<COM_IRQ_BIT_ATTN)
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M_IO_WRITE COM_IRQ_ADDR_ATTN, r16
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.endif
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.ifdef COM_IRQ_GIMSK_ATTN
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M_IO_READ r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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sbr r16, (1<<COM_IRQ_GIMSK_ATTN)
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M_IO_WRITE GIMSK, R16
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.endif
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sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
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in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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ori r16, (1<<COM_IRQ_GIMSK_ATTN)
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out GIMSK, R16
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ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
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out GIFR, r16
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@@ -218,8 +203,6 @@ ComOnUart0_AttnChangeIsr:
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; @clobbers R16 (R17, R24, R25, X)
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comOnUart0ActOnAttn:
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; cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on DEBUG
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ldd r16, Y+UART_HW_IFACE_OFFS_WRITEMODE ; test for active write mode
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cpi r16, UART_HW_WRITEMODE_IDLE
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brne comOnUart0ActOnAttn_end ; in write mode, don't start read mode
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@@ -230,7 +213,6 @@ comOnUart0ActOnAttn:
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sbic COM_ATTN_INPUT, COM_ATTN_PIN ; ATTN high?
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rjmp comOnUart0ActOnAttn_end
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rcall comOnUart0StartReading ; (R16, R17, R24, R25, X)
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comOnUart0ActOnAttn_end:
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@@ -379,7 +361,6 @@ comOnUart0RunWriteIdle:
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rcall NET_Interface_GetNextOutgoingMsgNum ; take msg from queue (R17, R18, X)
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comOnUart0RunWriteIdle_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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@@ -536,8 +517,6 @@ comOnUart0Init:
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lds r16, COM_ATTN_PUE
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cbr r16, COM_ATTN_PIN ; disable pullup on ATTN
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sts COM_ATTN_PUE, r16
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.else
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable pullup on ATTN
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.endif
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rcall comOnUart0SetAttnInput
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M_UART_HW_Uart_Init 0
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@@ -552,10 +531,6 @@ comOnUart0Init:
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; @clobbers R16
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comOnUart0StartRx:
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M_IO_READ r16, UCSR0A ; clear errors
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cbr r16, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
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M_IO_WRITE UCSR0A, r16
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M_UART_HW_Uart_StartRx 0
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ret
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; @end
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@@ -603,46 +578,15 @@ comOnUart0StopTx:
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; @routine comOnUart0RxCharIsr @global
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;
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; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
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; @clobbers R16, R17 (R18, R24, R25, X)
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comOnUart0RxCharIsr:
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; M_UART_HW_Uart_RxCharHalfDuplexIsr 0
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M_IO_READ r16, UCSR0A ; check for errors
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; mov r17, r16
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; andi r17, (1<<FE0) | (1<<DOR0) | (1<<UPE0)
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; brne comOnUart0RxCharIsr_hwerr
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sbrs r16, RXC0
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rjmp comOnUart0RxCharIsr_end
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M_IO_READ r16, USART0_DATAREG ; r16=received char
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rcall comOnUart0EnterReceivedChar
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rjmp comOnUart0RxCharIsr_end
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comOnUart0RxCharIsr_hwerr:
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M_UART_HW_Uart_StopRx 0 ; (R16)
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ldi r16, NET_IFACE_OFFS_ERR_IO_LOW
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ldi r17, UART_HW_READMODE_SKIPPING
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rcall NET_Interface_IncCounter16 ; (R24, R25)
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std Y+UART_HW_IFACE_OFFS_READMODE, r17 ; set read mode
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comOnUart0RxCharIsr_end:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0EnterReceivedChar
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;
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; @param r16 received char
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; @param Y pointer to interface data in SRAM
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; @clobbers R16 (R17, R18, R24, R25, X)
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comOnUart0EnterReceivedChar:
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M_UART_HW_Uart_EnterReceivedChar 0
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comOnUart0RxCharIsr:
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M_UART_HW_Uart_RxCharHalfDuplexIsr 0
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine comOnUart0TxUdreIsr @global
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;
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@@ -683,17 +627,12 @@ comOnUart0TxCharIsr:
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; @clobbers none
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comOnUart0SetAttnInput:
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cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
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.ifndef COM_ATTN_PUE
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable pullup on ATTN
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cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
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.ifdef COM_ATTN_PUE
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; cbi COM_ATTN_PUE, COM_ATTN_PIN ; disable pullup on ATTN
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.else
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable pullup on ATTN
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.endif
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.if COM_IRQ_BIT_ATTN == INT0
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M_IO_READ r16, COM_IRQ_ADDR_ATTN ; enable irq for ATTN line
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sbr r16, (1<<COM_IRQ_BIT_ATTN)
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M_IO_WRITE COM_IRQ_ADDR_ATTN, r16
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.endif
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ret
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; @end
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@@ -707,12 +646,6 @@ comOnUart0SetAttnInput:
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; @clobbers none
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comOnUart0SetAttnLow:
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.if COM_IRQ_BIT_ATTN == INT0
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M_IO_READ r16, COM_IRQ_ADDR_ATTN ; disable irq for ATTN line
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cbr r16, (1<<COM_IRQ_BIT_ATTN)
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M_IO_WRITE COM_IRQ_ADDR_ATTN, r16
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.endif
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sbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as output
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; set ATTN low
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ret
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