martin/aqhomecontrol
Public Access
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

started working on AtMega8515 module C1.

Browse Source
This commit is contained in:
Martin Preuss
2025-05-17 10:50:09 +02:00
parent 5a46db37c1
commit 21c2c60f4f
29 changed files with 1893 additions and 422 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
avr/modules/uart_hw/m_lowlevel_uart.asm
View File

@@ -120,7 +120,7 @@ l_loop_%:
lds r16, UCSR@0A
sbrs r16, RXC@0
rjmp l_end_%
lds r16, UDR@0
lds r16, USART@0_DATAREG
clr r16
std Y+NET_IFACE_OFFS_READTIMER, r16
rjmp l_loop_%
@@ -146,7 +146,7 @@ l_end_%:
lds r16, UCSR@0A
sbrs r16, RXC@0
rjmp l_end_% ; no data
lds r16, UDR@0 ; r16=received char
lds r16, USART@0_DATAREG ; r16=received char
; check read mode
ldd r17, Y+UART_HW_IFACE_OFFS_READMODE
cpi r17, UART_HW_READMODE_READING
@@ -239,7 +239,7 @@ l_end_%:
lds r16, UCSR@0A
sbrs r16, RXC@0
rjmp l_end_% ; no data
lds r16, UDR@0 ; r16=received char
lds r16, USART@0_DATAREG ; r16=received char
; check read mode
ldd r17, Y+UART_HW_IFACE_OFFS_READMODE
cpi r17, UART_HW_READMODE_READING
@@ -355,7 +355,7 @@ l_end_%:
std Y+UART_HW_IFACE_OFFS_WRITEBUFLEFT, r17
; send byte, reset write timer
sts UDR@0, r16
sts USART@0_DATAREG, r16
clr r16
std Y+NET_IFACE_OFFS_WRITETIMER, r16 ; reset write timer