From 21c2c60f4fb86f1efb01989ea605b038753698a1 Mon Sep 17 00:00:00 2001 From: Martin Preuss Date: Sat, 17 May 2025 10:50:09 +0200 Subject: [PATCH] started working on AtMega8515 module C1. --- avr/common/utils.asm | 18 + avr/devices/0BUILD | 1 + avr/devices/all/0BUILD | 1 + avr/devices/all/defs.asm | 3 +- avr/devices/all/hw_m8515.asm | 151 ++++++++ avr/devices/c01/.gitignore | 2 + avr/devices/c01/0BUILD | 22 ++ avr/devices/c01/README | 10 + avr/devices/c01/aqua_c01.xml | 11 + avr/devices/c01/boot/0BUILD | 32 ++ avr/devices/c01/boot/boot.asm | 163 ++++++++ avr/devices/c01/defs.asm | 108 ++++++ avr/devices/c01/main/0BUILD | 34 ++ avr/devices/c01/main/data.asm | 14 + avr/devices/c01/main/main.asm | 231 +++++++++++ avr/modules/flash/0BUILD | 2 + avr/modules/flash/eeprom.asm | 4 + avr/modules/flash/flash1p.asm | 11 + avr/modules/flash/flash1pmega.asm | 81 ++++ avr/modules/flash/flashprocess.asm | 1 + avr/modules/flash/flashxp.asm | 8 + avr/modules/flash/io_attn.asm | 41 ++ avr/modules/flash/io_bitbang.asm | 43 +- avr/modules/flash/io_uart.asm | 32 ++ avr/modules/flash/io_uart1.asm | 386 +----------------- avr/modules/flash/io_uart_all.asm | 387 ++++++++++++++++++ avr/modules/flash/io_uart_all_attn.asm | 495 ++++++++++++++++++++++++ avr/modules/uart_hw/comonuart0.asm | 15 +- avr/modules/uart_hw/m_lowlevel_uart.asm | 8 +- 29 files changed, 1893 insertions(+), 422 deletions(-) create mode 100644 avr/devices/all/hw_m8515.asm create mode 100644 avr/devices/c01/.gitignore create mode 100644 avr/devices/c01/0BUILD create mode 100644 avr/devices/c01/README create mode 100644 avr/devices/c01/aqua_c01.xml create mode 100644 avr/devices/c01/boot/0BUILD create mode 100644 avr/devices/c01/boot/boot.asm create mode 100644 avr/devices/c01/defs.asm create mode 100644 avr/devices/c01/main/0BUILD create mode 100644 avr/devices/c01/main/data.asm create mode 100644 avr/devices/c01/main/main.asm create mode 100644 avr/modules/flash/flash1pmega.asm create mode 100644 avr/modules/flash/io_uart.asm create mode 100644 avr/modules/flash/io_uart_all.asm create mode 100644 avr/modules/flash/io_uart_all_attn.asm diff --git a/avr/common/utils.asm b/avr/common/utils.asm index e297b9b..d8db6a8 100644 --- a/avr/common/utils.asm +++ b/avr/common/utils.asm @@ -269,7 +269,11 @@ Utils_IncrementCounter16: ; MODIFIED REGISTERS: R16 Utils_ReadEepromIncr: +.ifdef EEPE sbic EECR, EEPE ; wait for previous write to complete (if any) +.else + sbic EECR, EEWE ; wait for previous write to complete (if any) +.endif rjmp Utils_ReadEepromIncr out EEARH, xh ; set EEPROM address out EEARL, xl @@ -293,15 +297,29 @@ Utils_ReadEepromIncr: ; MODIFIED REGISTERS: R17 Utils_WriteEepromIncr: +.ifdef EEPE sbic EECR, EEPE ; wait for previous write to complete (if any) +.else + sbic EECR, EEWE ; wait for previous write to complete (if any) +.endif rjmp Utils_WriteEepromIncr +.ifdef EEPM1 ldi r17, (0< all + c01 n16 n21 n22 diff --git a/avr/devices/all/0BUILD b/avr/devices/all/0BUILD index b63c66d..72eda57 100644 --- a/avr/devices/all/0BUILD +++ b/avr/devices/all/0BUILD @@ -9,6 +9,7 @@ hw_tn84.asm hw_tn85.asm hw_tn841.asm + hw_m8515.asm includes.asm main.asm modules.asm diff --git a/avr/devices/all/defs.asm b/avr/devices/all/defs.asm index ae0861a..c3b0a1d 100644 --- a/avr/devices/all/defs.asm +++ b/avr/devices/all/defs.asm @@ -40,7 +40,8 @@ .equ EEPROM_OFFS_SEED = 10 ; 2 bytes -.equ EEPROM_OFFS_REED_CONF = 12 ; 1 byte (plus one byte reserved) +.equ EEPROM_OFFS_OSCCAL_SLOW = 12 ; 1 byte +.equ EEPROM_OFFS_OSCCAL_FAST = 13 ; 1 byte .equ EEPROM_OFFS_MAL_CONF_ONTIME = 14 ; 2 bytes .equ EEPROM_OFFS_MAL_CONF_SRC1_ADDR = 16 ; 1 byte diff --git a/avr/devices/all/hw_m8515.asm b/avr/devices/all/hw_m8515.asm new file mode 100644 index 0000000..8df7e0e --- /dev/null +++ b/avr/devices/all/hw_m8515.asm @@ -0,0 +1,151 @@ +; *************************************************************************** +; copyright : (C) 2025 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + +; Hardware routine for AtTiny 84 devices + + +.cseg + + +; --------------------------------------------------------------------------- +; @routine systemInitHardware +; + +systemInitHardware: + ; set all ports as inputs and enable internal pull-up resistors + ldi r16, 0xff + clr r17 +.ifdef PORTA + out DDRA, r17 ; all input + out PORTA, r16 ; enable pull-up on all +.endif + +.ifdef PORTB + out DDRB, r17 ; all input + out PORTB, r16 ; enable pull-up on all +.endif + +.ifdef PORTC + out DDRC, r17 ; all input + out PORTC, r16 ; enable pull-up on all +.endif + +.ifdef PORTD + out DDRD, r17 ; all input + out PORTD, r16 ; enable pull-up on all +.endif + +.ifdef PORTE + out DDRE, r17 ; all input + out PORTE, r16 ; enable pull-up on all +.endif + + ret +; @end + + + +; --------------------------------------------------------------------------- +; @routine systemSetSpeed +; + +systemSetSpeed: + ret +; @end + + + +; --------------------------------------------------------------------------- +; @routine systemSleep +; + +systemSleep: + ; only modify SE, SM2, SM1 and SM0 + cli + M_IO_READ r16, MCUCR + cbr r16, (1< + + + + + boot + main + + + + aqua_c01.xml + + + + defs.asm + README + + + + + + diff --git a/avr/devices/c01/README b/avr/devices/c01/README new file mode 100644 index 0000000..0513f8f --- /dev/null +++ b/avr/devices/c01/README @@ -0,0 +1,10 @@ + +C01 +=== + +- Role: Controller with Display +- MCU: AtMega 8515 +- Connection: RJ45 +- Periphery: + - Display with SPI + diff --git a/avr/devices/c01/aqua_c01.xml b/avr/devices/c01/aqua_c01.xml new file mode 100644 index 0000000..4ea15e0 --- /dev/null +++ b/avr/devices/c01/aqua_c01.xml @@ -0,0 +1,11 @@ + + + AQUA + N + 1 + + + + + + diff --git a/avr/devices/c01/boot/0BUILD b/avr/devices/c01/boot/0BUILD new file mode 100644 index 0000000..bfe939f --- /dev/null +++ b/avr/devices/c01/boot/0BUILD @@ -0,0 +1,32 @@ + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + boot.asm + + + + + + + + + + + + + + + + diff --git a/avr/devices/c01/boot/boot.asm b/avr/devices/c01/boot/boot.asm new file mode 100644 index 0000000..c681ea6 --- /dev/null +++ b/avr/devices/c01/boot/boot.asm @@ -0,0 +1,163 @@ +; *************************************************************************** +; Source file for base system node on AtMega 8515 +; +; This is for the maintenance system (i.e. the flash loader). +; +; All definitions and changes should go into this file. +; *************************************************************************** + +.equ clock=8000000 ; Define the clock frequency + +.nolist +.include "include/m8515def.inc" ; Define device ATmega8515 +.list + +.include "../defs.asm" +.include "defs_all.asm" + +.include "common/utils_wait.asm" +.include "common/utils_io.asm" +.include "modules/com2/defs.asm" +.include "modules/comproto/defs.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + + +.equ NET_BUFFERS_NUM = 6 +.equ NET_BUFFERS_SIZE = 32 + + + +; --------------------------------------------------------------------------- +; firmware settings + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + + +; --------------------------------------------------------------------------- +; LED + +.equ LED_DDR = DDRE +.equ LED_PORT = PORTE +.equ LED_PIN = PINE +.equ LED_PINNUM = PORTE2 + + + + + +; *************************************************************************** +; code segment + +.cseg +.org 0x0000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors + rjmp main ; 1: Reset vector RESET + reti ; 2: INT0 External Interrupt Request 0 + reti ; 3: INT1 External Interrupt Request 1 + reti ; 4: TIMER1_CAPT Timer/Counter1 Capture Event + reti ; 5: TIMER1_COMPA Timer/Counter1 Compare Match A + reti ; 6: TIMER1_COMPB Timer/Counter1 Compare Match B + reti ; 7: TIMER1_OVF Timer/Counter1 Overflow + reti ; 8: TIMER0_OVF Timer/Counter0 Overflow + reti ; 9: SPI_STC Serial Transfer Complete + reti ; 10: USART_RXC USART Rx Complete + reti ; 11: USART_UDRE USART Data Register Empty + reti ; 12: USART_TXC USART Tx Complete + reti ; 13: ANA_COMP Analog Comparator + reti ; 14: INT2 External Interrupt Request 2 + reti ; 15: TIMER0_COMP Timer/Counter0 Compare Match + reti ; 16: EE_RDY EEPROM Ready + reti ; 17: SPM_RDY Store Program Memory Ready + + + +; --------------------------------------------------------------------------- +; Device Info Block + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db DEVICEINFO_ID, 0 +devInfoVersion: .db DEVICEINFO_VERSION, DEVICEINFO_REVISION ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + +firmwareStart: + rjmp main ; will be overwritten when flashing + + + +; *************************************************************************** +; main code + + +.org BOOTLOADER_ADDR + + +main: + ldi r16, 0xb0 ; orig: a0 + out OSCCAL, r16 + rjmp bootLoader ; this routine is in modules/bootloader/main.asm + + + +; *************************************************************************** +; includes + +.include "common/utils_wait_fixed.asm" +.include "common/utils_copy_from_flash.asm" +.include "common/utils_copy_sdram.asm" + +.include "modules/flash/defs.asm" +.include "modules/flash/eeprom.asm" +.include "modules/flash/io.asm" +.include "modules/flash/io_attn.asm" +.include "modules/flash/io_uart.asm" +.include "modules/flash/io_uart_all_attn.asm" +.include "modules/flash/flash1pmega.asm" +.include "modules/flash/flashxp.asm" +.include "modules/flash/flashprocess.asm" +.include "modules/flash/wait.asm" +.include "modules/bootloader/main.asm" +.include "modules/network/msg/defs.asm" +.include "modules/network/msg/crc.asm" + +;.include "common/debug.asm" + + + +systemSetSpeed: +#if 0 ; disabled (can't really change clock at runtime) +.if clock == 8000000 + ldi r16, (1< + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + main.asm + + + + + + + + + + + + data.asm + + + + + + diff --git a/avr/devices/c01/main/data.asm b/avr/devices/c01/main/data.asm new file mode 100644 index 0000000..31ccc2f --- /dev/null +++ b/avr/devices/c01/main/data.asm @@ -0,0 +1,14 @@ +; *************************************************************************** +; copyright : (C) 2025 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + + +.dseg + + diff --git a/avr/devices/c01/main/main.asm b/avr/devices/c01/main/main.asm new file mode 100644 index 0000000..15e8748 --- /dev/null +++ b/avr/devices/c01/main/main.asm @@ -0,0 +1,231 @@ +; *************************************************************************** +; copyright : (C) 2025 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + + + +; *************************************************************************** +; Source file for temperature sensor node on AtTiny 84 +; +; This is for the full system (i.e. not the boot loader). +; +; All definitions and changes should go into this file. +; +; +; *************************************************************************** + + +;.equ clock=1000000 ; Define the clock frequency +.equ clock=8000000 ; Define the clock frequency + + + +.nolist +.include "include/m8515def.inc" ; Define device ATmega8515 +.list + +.include "../defs.asm" +.include "./data.asm" + +.include "devices/all/defs.asm" +.include "common/utils_wait.asm" +.include "common/utils_io.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.equ NET_BUFFERS_NUM = 6 +.equ NET_BUFFERS_SIZE = 32 + +.equ PROGRAM_SENSOR_INTERVAL_SECS = 60 +.equ PROGRAM_STATS_INTERVAL_MINS = 10 + + + +; --------------------------------------------------------------------------- +; firmware settings including list of modules used + +.equ FIRMWARE_VERSION_MAJOR = 0 +.equ FIRMWARE_VERSION_MINOR = 0 +.equ FIRMWARE_VERSION_PATCHLEVEL = 1 + + +; #define MODULES_TIMER +;#define MODULES_CLOCK +#define MODULES_LED_SIMPLE +;#define MODULES_NETWORK +;#define MODULES_COMONUART0 +;#define MODULES_UART_BITBANG +;#define MODULES_TWI_MASTER +;#define MODULES_LCD +;#define LCD_MINIMAL_FONT +;#define MODULES_SI7021 +;#define MODULES_SGP30 +;#define MODULES_SGP40 +;#define MODULES_STATS +;#define MODULES_OWI_MASTER +;#define MODULES_DS18B20 +;#define MODULES_MOTION +;#define MODULES_CCS811 + +;#define APPS_NETWORK +;#define APPS_MOTION +;#define APPS_REPORTSENSORS +;#define APPS_STATS + + + +; --------------------------------------------------------------------------- +; defines for values + +.equ VALUE_ID_SI7021_TEMP = 0x01 +.equ VALUE_ID_SI7021_HUM = 0x02 + +.equ VALUE_ID_ADC = 0x03 +;.equ VALUE_ID_DS18B20_TEMP = 0x06 +.equ VALUE_ID_MOTION = 0x07 + +.equ VALUE_ID_SGP40_TVOC = 0x08 + +.equ VALUE_ID_SGP30_TVOC = 0x09 +.equ VALUE_ID_SGP30_CO2 = 0x0a + +;.equ VALUE_ID_REED_CONF = 0x81 + +.equ VALUE_ID_DEBUG = 0x7f + +.equ VALUE_ID_LEDSIMPLE_TIMING = 0x88 + + + + + +; *************************************************************************** +; code segment + +.cseg +.org 000000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors + rjmp BOOTLOADER_ADDR ; 1: Reset vector RESET +; rjmp ComOnUart0_AttnChangeIsr ; 2: INT0 External Interrupt Request 0 + reti + reti ; 3: INT1 External Interrupt Request 1 + reti ; 4: TIMER1_CAPT Timer/Counter1 Capture Event + reti ; 5: TIMER1_COMPA Timer/Counter1 Compare Match A + reti ; 6: TIMER1_COMPB Timer/Counter1 Compare Match B + reti ; 7: TIMER1_OVF Timer/Counter1 Overflow + reti ; 8: TIMER0_OVF Timer/Counter0 Overflow + reti ; 9: SPI_STC Serial Transfer Complete +; rjmp ComOnUart0_RxCharIsr ; 10: USART_RXC USART Rx Complete + reti +; rjmp ComOnUart0_TxUdreIsr ; 11: USART_UDRE USART Data Register Empty + reti +; rjmp ComOnUart0_TxCharIsr ; 12: USART_TXC USART Tx Complete + reti + reti ; 13: ANA_COMP Analog Comparator + reti ; 14: INT2 External Interrupt Request 2 + rjmp baseTimerIrqOC0A ; 15: TIMER0_COMP Timer/Counter0 Compare Match + reti ; 16: EE_RDY EEPROM Ready + reti ; 17: SPM_RDY Store Program Memory Ready + + + +devInfoBlock: ; 12 bytes +devInfoManufacturer: .db 'A', 'Q', 'U', 'A' +devInfoId: .db DEVICEINFO_ID, 0 +devInfoVersion: .db DEVICEINFO_VERSION, DEVICEINFO_REVISION ; version, revision +firmwareVersion: .db FIRMWARE_VARIANT_TEMP_WINDOW, FIRMWARE_VERSION_MAJOR + .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL + + + +; --------------------------------------------------------------------------- +; @routine firmwareStart @global + +firmwareStart: + rjmp main +; @end + + + +; --------------------------------------------------------------------------- +; @routine onSystemStart + +onSystemStart: + ret +; @end + + + +; --------------------------------------------------------------------------- +; @routine onMessageReceived +; +; Called on every message received + +onMessageReceived: + clc + ret +; @end + + + +; --------------------------------------------------------------------------- +; @routine onEvery100ms +; +; Called every 100ms. Add your routine calls here. No arguments, no results. + +onEvery100ms: +onEverySecond: +onEveryMinute: +onEveryHour: +onEveryDay: + ret +; @end + + + +; --------------------------------------------------------------------------- +; @routine onEveryLoop +; +; Called on every loop (i.e. after awakening from sleep). +; +onEveryLoop: + ret +; @end + + + + + +; *************************************************************************** +; includes + +.include "devices/all/hw_m8515.asm" +.include "devices/all/includes.asm" + +.include "common/debug.asm" + + + +; --------------------------------------------------------------------------- +; defines for network interface + +;.equ netInterfaceData = comonuart0_iface + + + diff --git a/avr/modules/flash/0BUILD b/avr/modules/flash/0BUILD index 64d9cef..53f3762 100644 --- a/avr/modules/flash/0BUILD +++ b/avr/modules/flash/0BUILD @@ -12,7 +12,9 @@ io.asm io_attn.asm io_bitbang.asm + io_uart.asm io_uart1.asm + io_uart_all.asm wait.asm diff --git a/avr/modules/flash/eeprom.asm b/avr/modules/flash/eeprom.asm index 5c6f909..a215953 100644 --- a/avr/modules/flash/eeprom.asm +++ b/avr/modules/flash/eeprom.asm @@ -21,7 +21,11 @@ ; REGS: R16 flashReadEepromIncr: +.ifdef EEPE sbic EECR, EEPE ; wait for previous write to complete (if any) +.else + sbic EECR, EEWE ; wait for previous write to complete (if any) +.endif rjmp flashReadEepromIncr out EEARH, xh ; set EEPROM address out EEARL, xl diff --git a/avr/modules/flash/flash1p.asm b/avr/modules/flash/flash1p.asm index 9e64ffc..ba5c6c0 100644 --- a/avr/modules/flash/flash1p.asm +++ b/avr/modules/flash/flash1p.asm @@ -56,6 +56,17 @@ flash1pWritePages_loop: ; transfer data from temporary page buffer into FLASH memory ldi r20, (1< 7 per loop, max about 1000 - clc ; 1 - ret ; 4 -ioRawWaitForData_gotit: - sec ; 1 - ret ; 4 -; @end +.equ UART_REG_UDR = UDR1 +.equ UART_REG_UCSRA = UCSR1A +.equ UART_REG_UCSRB = UCSR1B +.equ UART_REG_UCSRC = UCSR1C +.equ UART_REG_UBRRL = UBRR1L +.equ UART_REG_UBRRH = UBRR1H + +.equ UART_BIT_UCSZ0 = UCSZ10 +.equ UART_BIT_UDRE = UDRE1 +.equ UART_BIT_RXC = RXC1 +.equ UART_BIT_TXC = TXC1 +.equ UART_BIT_FE = FE1 +.equ UART_BIT_DOR = DOR1 +.equ UART_BIT_UPE = UPE1 +.equ UART_BIT_RXEN = RXEN1 +.equ UART_BIT_TXEN = TXEN1 diff --git a/avr/modules/flash/io_uart_all.asm b/avr/modules/flash/io_uart_all.asm new file mode 100644 index 0000000..118d900 --- /dev/null +++ b/avr/modules/flash/io_uart_all.asm @@ -0,0 +1,387 @@ +; *************************************************************************** +; copyright : (C) 2025 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; code + + +.cseg + + +; --------------------------------------------------------------------------- +; @routine ioRawInit +; Send a message +; +; @clobbers r16, r17 + +ioRawInit: + ; set baudrate +.if clock == 8000000 + ldi r16, 25 ; (19.2Kb/s at 8MHz) + ldi r17, 0 +.endif + +.if clock == 1000000 + ldi r16, 3 ; (19.2Kb/s at 1MHz) + ldi r17, 0 +.endif + + sts UART_REG_UBRRH, r17 + sts UART_REG_UBRRL, r16 + + ; set character format (asynchronous USART, 8-bit, one stop bit, no parity) + ldi r16, (3< 7 per loop, max about 1000 + clc ; 1 + ret ; 4 +ioRawWaitForData_gotit: + sec ; 1 + ret ; 4 +; @end + + + + diff --git a/avr/modules/flash/io_uart_all_attn.asm b/avr/modules/flash/io_uart_all_attn.asm new file mode 100644 index 0000000..c503229 --- /dev/null +++ b/avr/modules/flash/io_uart_all_attn.asm @@ -0,0 +1,495 @@ +; *************************************************************************** +; copyright : (C) 2025 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + +; *************************************************************************** +; code + + +.cseg + + +; --------------------------------------------------------------------------- +; @routine ioRawInit +; Send a message +; +; @clobbers r16, r17 + +ioRawInit: + ; set baudrate +.if clock == 8000000 + ldi r16, 25 ; (19.2Kb/s at 8MHz) + ldi r17, 0 +.endif + +.if clock == 1000000 + ldi r16, 3 ; (19.2Kb/s at 1MHz) + ldi r17, 0 +.endif + + M_IO_WRITE UART_REG_UBRRH, r17 + M_IO_WRITE UART_REG_UBRRL, r16 + + ; set character format (asynchronous USART, 8-bit, one stop bit, no parity) + ldi r16, (1< 7 per loop, max about 1000 + clc ; 1 + ret ; 4 +ioRawWaitForData_gotit: + sec ; 1 + ret ; 4 +; @end + + + + diff --git a/avr/modules/uart_hw/comonuart0.asm b/avr/modules/uart_hw/comonuart0.asm index 60ebe7b..cc1e4ba 100644 --- a/avr/modules/uart_hw/comonuart0.asm +++ b/avr/modules/uart_hw/comonuart0.asm @@ -33,14 +33,19 @@ ComOnUart0_Init: rcall comOnUart0SetAttnInput ; (none) rcall UART_HW_Interface_Init ; (R16, R17, X) - rcall comOnUart0Init ; (R16, R17, X) + rcall comOnUart0Init ; (R16, R17, X) ldi r16, COMONUART0_IFACENUM std Y+NET_IFACE_OFFS_IFACENUM, r16 - sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line - in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1 - ori r16, (1<