started working on AtMega8515 module C1.
This commit is contained in:
Martin Preuss
@@ -12,7 +12,9 @@
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io.asm
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io_attn.asm
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io_bitbang.asm
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io_uart.asm
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io_uart1.asm
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io_uart_all.asm
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wait.asm
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</extradist>
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@@ -21,7 +21,11 @@
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; REGS: R16
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flashReadEepromIncr:
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.ifdef EEPE
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sbic EECR, EEPE ; wait for previous write to complete (if any)
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.else
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sbic EECR, EEWE ; wait for previous write to complete (if any)
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.endif
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rjmp flashReadEepromIncr
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out EEARH, xh ; set EEPROM address
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out EEARL, xl
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@@ -56,6 +56,17 @@ flash1pWritePages_loop:
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; transfer data from temporary page buffer into FLASH memory
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ldi r20, (1<<PGWRT) + (1<<SPMEN) ; enable next SPM, write page (R1/R0 ignored)
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rcall flashDoSpm ; (R16)
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#if 0
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.ifdef RWWSRE
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flash1pWritePages_endLoop:
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in r20, SPMCR
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sbrc r20, RWWSB
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rjmp flash1pWritePages_endLoop
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ldi r20, (1<<RWWSRE) | (1<<SPMEN) ; reenable RWW
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rcall flashDoSpm ; (R16)
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.endif
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#endif
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ret
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; @end
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81
avr/modules/flash/flash1pmega.asm
Normal file
81
avr/modules/flash/flash1pmega.asm
Normal file
@@ -0,0 +1,81 @@
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; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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.equ FLASH_PAGESIZE = (PAGESIZE*2)
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; ***************************************************************************
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; data
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.dseg
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flashPageStart: .byte 2
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flashPageBuffer: .byte FLASH_PAGESIZE
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; ***************************************************************************
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; code
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.cseg
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; ---------------------------------------------------------------------------
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; flash1pMegaWritePage
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;
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; Interrupts must be disabled!
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;
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; @clobbers r0, r1, r20, r24, r25, X, Z
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flash1pMegaWritePage:
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lds zl, flashPageStart
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lds zh, flashPageStart+1
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; copy from SDRAM into MCUs temporary page buffer
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ldi xl, LOW(flashPageBuffer)
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ldi xh, HIGH(flashPageBuffer)
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ldi r24, LOW(PAGESIZE)
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flash1pMegaWritePages_loop:
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ld r0, X+ ; read source data from buffer (low)
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ld r1, X+ ; read source data from buffer (high)
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ldi r20, (1<<SPMEN) ; enable next SPM, write R1:R0 into temp page buffer
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rcall flashDoSpm ; (R16)
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adiw zh:zl, 2
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dec r24
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brne flash1pMegaWritePages_loop
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subi zl, LOW(PAGESIZE*2) ; point back to begin of page
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sbci zh, HIGH(PAGESIZE*2)
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; transfer data from temporary page buffer into FLASH memory
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ldi r20, (1<<PGWRT) + (1<<SPMEN) ; enable next SPM, write page (R1/R0 ignored)
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rcall flashDoSpm ; (R16)
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rcall flash1pMegaEnableRWW
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;flash1pMegaWritePages_endLoop:
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; in r20, SPMCR
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; sbrc r20, RWWSB
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; rjmp flash1pMegaWritePages_endLoop
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; ldi r20, (1<<RWWSRE) | (1<<SPMEN) ; reenable RWW
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; rcall flashDoSpm ; (R16)
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ret
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; @end
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flash1pMegaEnableRWW:
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ldi r20, (1<<RWWSRE) | (1<<SPMEN) ; reenable RWW
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rcall flashDoSpm ; (R16)
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ret
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.equ flashWritePage = flash1pMegaWritePage
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@@ -117,6 +117,7 @@ flashProcessHandleFlashStart:
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rcall flashWaitFor100ms ; TODO: Shorten wait time!!
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clr r16
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rcall flashProcessSendFlashResponse ; (R15, R16, R17, R18, R19, R20, R21, R22, X)
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sec
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flashProcessHandleFlashStart_notMe:
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ret
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@@ -292,11 +292,19 @@ flashErasePage:
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flashDoSpm:
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flashDoSpm_wait: ; wait for possibly previous SPM to complete
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.ifdef SPMCSR
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in r16, SPMCSR
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.else
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in r16, SPMCR
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.endif
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sbrc r16, SPMEN
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rjmp flashDoSpm_wait
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; SPM timed sequence
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.ifdef SPMCSR
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out SPMCSR, r20
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.else
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out SPMCR, r20
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.endif
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spm
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ret
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; @end
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@@ -94,4 +94,45 @@ ioWaitForAttnState1ms_stateReached:
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; ---------------------------------------------------------------------------
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; @routine ioRawWaitForOneBitLength
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;
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; wait for one bit length (minus cycles for call and ret).
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;
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; @clobbers r22
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ioRawWaitForOneBitLength:
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Utils_WaitNanoSecs COM_BIT_LENGTH, 7, r22 ; wait for one bit duration (minus RCALL/RET)
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRawAcquireBus
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;
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; Reserve bus if free (otherwise return error)
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; Expects interrupts to be disabled.
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;
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; @return CFLAG set if okay (bus acquired), cleared on error
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; @clobbers: none
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ioRawAcquireBus:
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; check for ATTN line: busy?
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cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable pullup on ATTN
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nop ; needed to sample current input
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sbis COM_ATTN_INPUT, COM_ATTN_PIN ; ATTN low?
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rjmp ioRawAcquireBus_busy ; jump if it is
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sbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as output
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; set ATTN low
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sec
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ret
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ioRawAcquireBus_busy:
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clc
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ret
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; @end
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@@ -281,7 +281,7 @@ ioRawReceiveByte_error:
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; @clobbers R16, R22 (R17, R21, X)
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ioRawSendPacket:
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rcall ioRawAcquireBus
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rcall ioRawAcquireBus ; (none)
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brcc ioRawSendPacket_lineBusyError
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rcall ioRawWaitForOneBitLength ; wait for one bit duration (R22)
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@@ -316,47 +316,6 @@ ioRawSendPacket_lineBusyError:
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; ---------------------------------------------------------------------------
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; @routine ioRawAcquireBus
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;
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; Reserve bus if free (otherwise return error)
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; Expects interrupts to be disabled.
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;
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; @return CFLAG set if okay (bus acquired), cleared on error
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; @clobbers: none
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ioRawAcquireBus:
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; check for ATTN line: busy?
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cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable pullup on ATTN
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nop ; needed to sample current input
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sbis COM_ATTN_INPUT, COM_ATTN_PIN ; ATTN low?
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rjmp ioRawAcquireBus_busy ; jump if it is
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sbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as output
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cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; set ATTN low
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sec
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ret
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ioRawAcquireBus_busy:
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clc
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRawWaitForOneBitLength
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;
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; wait for one bit length (minus cycles for call and ret).
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;
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; @clobbers r22
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ioRawWaitForOneBitLength:
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Utils_WaitNanoSecs COM_BIT_LENGTH, 7, r22 ; wait for one bit duration (minus RCALL/RET)
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ioRawSendByte
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;
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32
avr/modules/flash/io_uart.asm
Normal file
32
avr/modules/flash/io_uart.asm
Normal file
@@ -0,0 +1,32 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
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.equ UART_REG_UDR = UDR
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.equ UART_REG_UCSRA = UCSRA
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.equ UART_REG_UCSRB = UCSRB
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.equ UART_REG_UCSRC = UCSRC
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.equ UART_REG_UBRRL = UBRRL
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.equ UART_REG_UBRRH = UBRRH
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.equ UART_BIT_UCSZ0 = UCSZ0
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.equ UART_BIT_UCSZ1 = UCSZ1
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.equ UART_BIT_UDRE = UDRE
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.equ UART_BIT_RXC = RXC
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.equ UART_BIT_TXC = TXC
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.equ UART_BIT_FE = FE
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.equ UART_BIT_DOR = DOR
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.equ UART_BIT_UPE = UPE
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.equ UART_BIT_RXEN = RXEN
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.equ UART_BIT_TXEN = TXEN
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@@ -8,377 +8,23 @@
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
; ***************************************************************************
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||||
; code
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||||
|
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.cseg
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|
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|
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; ---------------------------------------------------------------------------
|
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; @routine ioRawInit
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; Send a message
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;
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; @clobbers r16, r17
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ioRawInit:
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; set baudrate
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.if clock == 8000000
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ldi r16, 25 ; (19.2Kb/s at 8MHz)
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ldi r17, 0
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.endif
|
||||
|
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.if clock == 1000000
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ldi r16, 3 ; (19.2Kb/s at 1MHz)
|
||||
ldi r17, 0
|
||||
.endif
|
||||
|
||||
sts UBRR1H, r17
|
||||
sts UBRR1L, r16
|
||||
|
||||
; set character format (asynchronous USART, 8-bit, one stop bit, no parity)
|
||||
ldi r16, (3<<UCSZ10)
|
||||
sts UCSR1C, r16
|
||||
|
||||
; enable transceiver
|
||||
lds r16, UCSR1B
|
||||
; cbr r16, (1<<UDRIE1) ; disable DRE interrupt
|
||||
ori r16, (1<<RXEN1) | (1<<TXEN1) ; enable transmit and receive
|
||||
sts UCSR1B, r16
|
||||
|
||||
.ifdef COM_ATTN_PUE
|
||||
lds r16, COM_ATTN_PUE
|
||||
cbr r16, COM_ATTN_PIN ; disable pullup on ATTN
|
||||
sts COM_ATTN_PUE, r16
|
||||
.endif
|
||||
|
||||
ret
|
||||
;@end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsg
|
||||
; Send a message
|
||||
;
|
||||
; @clobbers r16, r17, X
|
||||
|
||||
ioRawSendMsg:
|
||||
ldi xl, LOW(flashSendBuffer)
|
||||
ldi xh, HIGH(flashSendBuffer)
|
||||
rjmp ioRawSendPacket ; (r16, r17, X)
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine UART_HW_Uart1_RawSendPacket
|
||||
; Send packet.
|
||||
;
|
||||
; @param X buffer to send
|
||||
; @return CFLAG: set if okay (packet sent), cleared on error
|
||||
; @clobbers r16, r17, X
|
||||
|
||||
ioRawSendPacket:
|
||||
adiw xh:xl, 1
|
||||
ld r17, X
|
||||
sbiw xh:xl, 1
|
||||
ldi r16, 3 ; add DEST, LEN, CRC bytes
|
||||
add r17, r16
|
||||
ioRawSendPacket_loop:
|
||||
lds r16, UCSR1A
|
||||
sbrs r16, UDRE1
|
||||
rjmp ioRawSendPacket_loop
|
||||
sbr r16, (1<<TXC1)
|
||||
sts UCSR1A, r16
|
||||
ld r16, X+
|
||||
sts UDR1, r16
|
||||
dec r17
|
||||
brne ioRawSendPacket_loop
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForValidMsg
|
||||
; Wait for valid incoming msg
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r16, r17, r18 (r19, r22, X)
|
||||
|
||||
ioRawWaitForValidMsg:
|
||||
ldi xl, LOW(flashRecvBuffer)
|
||||
ldi xh, HIGH(flashRecvBuffer)
|
||||
ldi r18, FLASH_RECVBUFFER_MAXLEN-3 ; maximum accepted msglen byte
|
||||
ldi r20, 10 ; 10 secs
|
||||
rjmp ioRecvMsg
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvMsg
|
||||
;
|
||||
; Wait for next message, if received check validity.
|
||||
; On error skip the currently received message.
|
||||
;
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param R20 max number of secs to wait for incoming message
|
||||
; @param X buffer to receive to
|
||||
; @clobbers (r16, r17, r18, r19, r20, r22)
|
||||
|
||||
ioRecvMsg:
|
||||
rcall ioRawRecvMsg ; (r16, r17, r18, r19, r20, r22)
|
||||
brcc ioRecvMsg_error
|
||||
push xl
|
||||
push xh
|
||||
rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
|
||||
pop xh
|
||||
pop xl
|
||||
brcs ioRecvMsg_end
|
||||
ioRecvMsg_error:
|
||||
rcall ioRecvSkipMessage ; skip remainder of the message
|
||||
clc
|
||||
ioRecvMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvSkipMessage
|
||||
;
|
||||
; skip all receiption data until a data pause of about 10ms
|
||||
;
|
||||
; @clobbers r16
|
||||
|
||||
ioRecvSkipMessage:
|
||||
ioRecvSkipMessage_loop:
|
||||
rcall ioRecvFlush ; (r16)
|
||||
; wait for a data pause of 10ms
|
||||
rcall ioRawRecvByteWithin10ms ; (r20, r22)
|
||||
brcs ioRecvSkipMessage_loop
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvFlush
|
||||
;
|
||||
; flush receiption buffer.
|
||||
;
|
||||
; @clobbers r16
|
||||
|
||||
ioRecvFlush:
|
||||
lds r16, UCSR1A ; read status
|
||||
sbrs r16, RXC1
|
||||
ret
|
||||
lds r16, UDR1 ; read data byte
|
||||
rjmp ioRecvFlush
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvMsg
|
||||
;
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param R20 max number of secs to wait for incoming message
|
||||
; @param X buffer to receive to
|
||||
; @clobbers r16, r17, r19 (r18, r20, r22)
|
||||
|
||||
ioRawRecvMsg:
|
||||
lds r19, UCSR1A
|
||||
cbr r19, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
|
||||
sts UCSR1A, r19 ; clear errors
|
||||
; wait for begin of message
|
||||
rcall ioRawWaitForDataSeconds ; (r20, r22)
|
||||
brcc ioRawRecvMsg_end
|
||||
clr r19 ; bytecounter
|
||||
; read first two bytes
|
||||
ldi r17, 2 ; 2 bytes: address byte, msg len
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
cp r16, r20 ; check size
|
||||
brcc ioRawRecvMsg_error
|
||||
inc r16 ; account for checksum byte
|
||||
; read remaining bytes including checksum byte
|
||||
mov r17, r16
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
sub xl, r19 ; let X point back to begin of message
|
||||
sbc xh, r19
|
||||
add xh, r19
|
||||
sec
|
||||
ret
|
||||
ioRawRecvMsg_error:
|
||||
clc
|
||||
ioRawRecvMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvBytes
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @return r16 last byte received
|
||||
; @param r17 number of bytes to read
|
||||
; @param x buffer to receive to
|
||||
; @clobbers r16, r17 (r20, r22)
|
||||
|
||||
ioRawRecvBytes:
|
||||
rcall ioRawRecvByteWithin10ms ; (r20, r22)
|
||||
brcc ioRawRecvBytes_end
|
||||
st X+, r16
|
||||
dec r17
|
||||
brne ioRawRecvBytes
|
||||
sec
|
||||
ioRawRecvBytes_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvByteWithin10ms
|
||||
;
|
||||
; Wait up to 10ms for incoming byte and read it.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @return r16 byte received (if CFLAG set)
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawRecvByteWithin10ms:
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
brcc ioRawRecvByteWithin10ms_end
|
||||
lds r16, UCSR1A ; check for errors
|
||||
andi r16, (1<<FE1) | (1<<DOR1) | (1<<UPE1)
|
||||
brne ioRawRecvByteWithin10ms_error
|
||||
lds r16, UDR1 ; read data byte
|
||||
sec
|
||||
ret
|
||||
ioRawRecvByteWithin10ms_error:
|
||||
clc
|
||||
ioRawRecvByteWithin10ms_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForDataSeconds
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @param r20 maximum number of seconds to wait
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForDataSeconds:
|
||||
ioRawWaitForDataSeconds_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1s ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForDataSeconds_gotit
|
||||
sbi LED_PIN, LED_PINNUM ; toggle
|
||||
dec r20
|
||||
brne ioRawWaitForDataSeconds_loop
|
||||
clc
|
||||
ioRawWaitForDataSeconds_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1s
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1s:
|
||||
ldi r20, 100
|
||||
ioRawWaitForData1s_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData1s_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData1s_loop
|
||||
clc
|
||||
ioRawWaitForData1s_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData10ms
|
||||
;
|
||||
; Wait for incoming data for max 10 milliseconds.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData10ms:
|
||||
.if clock == 8000000
|
||||
ldi r20, 80
|
||||
.endif
|
||||
.if clock == 1000000
|
||||
ldi r20, 10
|
||||
.endif
|
||||
ioRawWaitForData10ms_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1000Cycles ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData10ms_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData10ms_loop
|
||||
clc
|
||||
ioRawWaitForData10ms_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1000Cycles
|
||||
;
|
||||
; Wait for incoming data for max 1000 clock cycles
|
||||
; (about 1ms at 1MHz, 0.125 at 8MHz)
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1000Cycles:
|
||||
ldi r20, 140 ; 1
|
||||
ioRawWaitForData_loop:
|
||||
lds r22, UCSR1A ; 2
|
||||
sbrc r22, RXC1 ; 2/3
|
||||
rjmp ioRawWaitForData_gotit ; 2
|
||||
dec r20 ; 1
|
||||
brne ioRawWaitForData_loop ; 1/2 -> 7 per loop, max about 1000
|
||||
clc ; 1
|
||||
ret ; 4
|
||||
ioRawWaitForData_gotit:
|
||||
sec ; 1
|
||||
ret ; 4
|
||||
; @end
|
||||
.equ UART_REG_UDR = UDR1
|
||||
.equ UART_REG_UCSRA = UCSR1A
|
||||
.equ UART_REG_UCSRB = UCSR1B
|
||||
.equ UART_REG_UCSRC = UCSR1C
|
||||
.equ UART_REG_UBRRL = UBRR1L
|
||||
.equ UART_REG_UBRRH = UBRR1H
|
||||
|
||||
.equ UART_BIT_UCSZ0 = UCSZ10
|
||||
.equ UART_BIT_UDRE = UDRE1
|
||||
.equ UART_BIT_RXC = RXC1
|
||||
.equ UART_BIT_TXC = TXC1
|
||||
.equ UART_BIT_FE = FE1
|
||||
.equ UART_BIT_DOR = DOR1
|
||||
.equ UART_BIT_UPE = UPE1
|
||||
.equ UART_BIT_RXEN = RXEN1
|
||||
.equ UART_BIT_TXEN = TXEN1
|
||||
|
||||
|
||||
|
||||
|
||||
387
avr/modules/flash/io_uart_all.asm
Normal file
387
avr/modules/flash/io_uart_all.asm
Normal file
@@ -0,0 +1,387 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
; ***************************************************************************
|
||||
; code
|
||||
|
||||
|
||||
.cseg
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawInit
|
||||
; Send a message
|
||||
;
|
||||
; @clobbers r16, r17
|
||||
|
||||
ioRawInit:
|
||||
; set baudrate
|
||||
.if clock == 8000000
|
||||
ldi r16, 25 ; (19.2Kb/s at 8MHz)
|
||||
ldi r17, 0
|
||||
.endif
|
||||
|
||||
.if clock == 1000000
|
||||
ldi r16, 3 ; (19.2Kb/s at 1MHz)
|
||||
ldi r17, 0
|
||||
.endif
|
||||
|
||||
sts UART_REG_UBRRH, r17
|
||||
sts UART_REG_UBRRL, r16
|
||||
|
||||
; set character format (asynchronous USART, 8-bit, one stop bit, no parity)
|
||||
ldi r16, (3<<UART_BIT_UCSZ0)
|
||||
sts UART_REG_UCSRC, r16
|
||||
|
||||
; enable transceiver
|
||||
lds r16, UART_REG_UCSRB
|
||||
; cbr r16, (1<<UDRIE1) ; disable DRE interrupt
|
||||
ori r16, (1<<UART_BIT_RXEN) | (1<<UART_BIT_TXEN) ; enable transmit and receive
|
||||
sts UART_REG_UCSRB, r16
|
||||
|
||||
.ifdef COM_ATTN_PUE
|
||||
lds r16, COM_ATTN_PUE
|
||||
cbr r16, COM_ATTN_PIN ; disable pullup on ATTN
|
||||
sts COM_ATTN_PUE, r16
|
||||
.else
|
||||
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
|
||||
|
||||
.endif
|
||||
|
||||
ret
|
||||
;@end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsg
|
||||
; Send a message
|
||||
;
|
||||
; @clobbers r16, r17, X
|
||||
|
||||
ioRawSendMsg:
|
||||
ldi xl, LOW(flashSendBuffer)
|
||||
ldi xh, HIGH(flashSendBuffer)
|
||||
rjmp ioRawSendPacket ; (r16, r17, X)
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine UART_HW_Uart1_RawSendPacket
|
||||
; Send packet.
|
||||
;
|
||||
; @param X buffer to send
|
||||
; @return CFLAG: set if okay (packet sent), cleared on error
|
||||
; @clobbers r16, r17, X
|
||||
|
||||
ioRawSendPacket:
|
||||
adiw xh:xl, 1
|
||||
ld r17, X
|
||||
sbiw xh:xl, 1
|
||||
ldi r16, 3 ; add DEST, LEN, CRC bytes
|
||||
add r17, r16
|
||||
ioRawSendPacket_loop:
|
||||
lds r16, UART_REG_UCSRA
|
||||
sbrs r16, UART_BIT_UDRE
|
||||
rjmp ioRawSendPacket_loop
|
||||
sbr r16, (1<<UART_BIT_TXC)
|
||||
sts UART_REG_UCSRA, r16
|
||||
ld r16, X+
|
||||
sts UART_REG_UDR, r16
|
||||
dec r17
|
||||
brne ioRawSendPacket_loop
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForValidMsg
|
||||
; Wait for valid incoming msg
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r16, r17, r18 (r19, r22, X)
|
||||
|
||||
ioRawWaitForValidMsg:
|
||||
ldi xl, LOW(flashRecvBuffer)
|
||||
ldi xh, HIGH(flashRecvBuffer)
|
||||
ldi r18, FLASH_RECVBUFFER_MAXLEN-3 ; maximum accepted msglen byte
|
||||
ldi r20, 10 ; 10 secs
|
||||
rjmp ioRecvMsg
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvMsg
|
||||
;
|
||||
; Wait for next message, if received check validity.
|
||||
; On error skip the currently received message.
|
||||
;
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param R20 max number of secs to wait for incoming message
|
||||
; @param X buffer to receive to
|
||||
; @clobbers (r16, r17, r18, r19, r20, r22)
|
||||
|
||||
ioRecvMsg:
|
||||
rcall ioRawRecvMsg ; (r16, r17, r18, r19, r20, r22)
|
||||
brcc ioRecvMsg_error
|
||||
push xl
|
||||
push xh
|
||||
rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
|
||||
pop xh
|
||||
pop xl
|
||||
brcs ioRecvMsg_end
|
||||
ioRecvMsg_error:
|
||||
rcall ioRecvSkipMessage ; skip remainder of the message
|
||||
clc
|
||||
ioRecvMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvSkipMessage
|
||||
;
|
||||
; skip all receiption data until a data pause of about 10ms
|
||||
;
|
||||
; @clobbers r16
|
||||
|
||||
ioRecvSkipMessage:
|
||||
ioRecvSkipMessage_loop:
|
||||
rcall ioRecvFlush ; (r16)
|
||||
; wait for a data pause of 10ms
|
||||
rcall ioRawRecvByteWithin10ms ; (r20, r22)
|
||||
brcs ioRecvSkipMessage_loop
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvFlush
|
||||
;
|
||||
; flush receiption buffer.
|
||||
;
|
||||
; @clobbers r16
|
||||
|
||||
ioRecvFlush:
|
||||
lds r16, UART_REG_UCSRA ; read status
|
||||
sbrs r16, UART_BIT_RXC
|
||||
ret
|
||||
lds r16, UART_REG_UDR ; read data byte
|
||||
rjmp ioRecvFlush
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvMsg
|
||||
;
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param R20 max number of secs to wait for incoming message
|
||||
; @param X buffer to receive to
|
||||
; @clobbers r16, r17, r19 (r18, r20, r22)
|
||||
|
||||
ioRawRecvMsg:
|
||||
lds r19, UART_REG_UCSRA
|
||||
cbr r19, (1<<UART_BIT_FE) | (1<<UART_BIT_DOR) | (1<<UART_BIT_UPE)
|
||||
sts UART_REG_UCSRA, r19 ; clear errors
|
||||
; wait for begin of message
|
||||
rcall ioRawWaitForDataSeconds ; (r20, r22)
|
||||
brcc ioRawRecvMsg_end
|
||||
clr r19 ; bytecounter
|
||||
; read first two bytes
|
||||
ldi r17, 2 ; 2 bytes: address byte, msg len
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
cp r16, r20 ; check size
|
||||
brcc ioRawRecvMsg_error
|
||||
inc r16 ; account for checksum byte
|
||||
; read remaining bytes including checksum byte
|
||||
mov r17, r16
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
sub xl, r19 ; let X point back to begin of message
|
||||
sbc xh, r19
|
||||
add xh, r19
|
||||
sec
|
||||
ret
|
||||
ioRawRecvMsg_error:
|
||||
clc
|
||||
ioRawRecvMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvBytes
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @return r16 last byte received
|
||||
; @param r17 number of bytes to read
|
||||
; @param x buffer to receive to
|
||||
; @clobbers r16, r17 (r20, r22)
|
||||
|
||||
ioRawRecvBytes:
|
||||
rcall ioRawRecvByteWithin10ms ; (r20, r22)
|
||||
brcc ioRawRecvBytes_end
|
||||
st X+, r16
|
||||
dec r17
|
||||
brne ioRawRecvBytes
|
||||
sec
|
||||
ioRawRecvBytes_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvByteWithin10ms
|
||||
;
|
||||
; Wait up to 10ms for incoming byte and read it.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @return r16 byte received (if CFLAG set)
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawRecvByteWithin10ms:
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
brcc ioRawRecvByteWithin10ms_end
|
||||
lds r16, UART_REG_UCSRA ; check for errors
|
||||
andi r16, (1<<UART_BIT_FE) | (1<<UART_BIT_DOR) | (1<<UART_BIT_UPE)
|
||||
brne ioRawRecvByteWithin10ms_error
|
||||
lds r16, UART_REG_UDR ; read data byte
|
||||
sec
|
||||
ret
|
||||
ioRawRecvByteWithin10ms_error:
|
||||
clc
|
||||
ioRawRecvByteWithin10ms_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForDataSeconds
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @param r20 maximum number of seconds to wait
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForDataSeconds:
|
||||
ioRawWaitForDataSeconds_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1s ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForDataSeconds_gotit
|
||||
sbi LED_PIN, LED_PINNUM ; toggle
|
||||
dec r20
|
||||
brne ioRawWaitForDataSeconds_loop
|
||||
clc
|
||||
ioRawWaitForDataSeconds_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1s
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1s:
|
||||
ldi r20, 100
|
||||
ioRawWaitForData1s_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData1s_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData1s_loop
|
||||
clc
|
||||
ioRawWaitForData1s_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData10ms
|
||||
;
|
||||
; Wait for incoming data for max 10 milliseconds.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData10ms:
|
||||
.if clock == 8000000
|
||||
ldi r20, 80
|
||||
.endif
|
||||
.if clock == 1000000
|
||||
ldi r20, 10
|
||||
.endif
|
||||
ioRawWaitForData10ms_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1000Cycles ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData10ms_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData10ms_loop
|
||||
clc
|
||||
ioRawWaitForData10ms_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1000Cycles
|
||||
;
|
||||
; Wait for incoming data for max 1000 clock cycles
|
||||
; (about 1ms at 1MHz, 0.125 at 8MHz)
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1000Cycles:
|
||||
ldi r20, 140 ; 1
|
||||
ioRawWaitForData_loop:
|
||||
lds r22, UART_REG_UCSRA ; 2
|
||||
sbrc r22, UART_BIT_RXC ; 2/3
|
||||
rjmp ioRawWaitForData_gotit ; 2
|
||||
dec r20 ; 1
|
||||
brne ioRawWaitForData_loop ; 1/2 -> 7 per loop, max about 1000
|
||||
clc ; 1
|
||||
ret ; 4
|
||||
ioRawWaitForData_gotit:
|
||||
sec ; 1
|
||||
ret ; 4
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
495
avr/modules/flash/io_uart_all_attn.asm
Normal file
495
avr/modules/flash/io_uart_all_attn.asm
Normal file
@@ -0,0 +1,495 @@
|
||||
; ***************************************************************************
|
||||
; copyright : (C) 2025 by Martin Preuss
|
||||
; email : martin@libchipcard.de
|
||||
;
|
||||
; ***************************************************************************
|
||||
; * This file is part of the project "AqHome". *
|
||||
; * Please see toplevel file COPYING of that project for license details. *
|
||||
; ***************************************************************************
|
||||
|
||||
|
||||
; ***************************************************************************
|
||||
; code
|
||||
|
||||
|
||||
.cseg
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawInit
|
||||
; Send a message
|
||||
;
|
||||
; @clobbers r16, r17
|
||||
|
||||
ioRawInit:
|
||||
; set baudrate
|
||||
.if clock == 8000000
|
||||
ldi r16, 25 ; (19.2Kb/s at 8MHz)
|
||||
ldi r17, 0
|
||||
.endif
|
||||
|
||||
.if clock == 1000000
|
||||
ldi r16, 3 ; (19.2Kb/s at 1MHz)
|
||||
ldi r17, 0
|
||||
.endif
|
||||
|
||||
M_IO_WRITE UART_REG_UBRRH, r17
|
||||
M_IO_WRITE UART_REG_UBRRL, r16
|
||||
|
||||
; set character format (asynchronous USART, 8-bit, one stop bit, no parity)
|
||||
ldi r16, (1<<UART_BIT_UCSZ0) | (1<<UART_BIT_UCSZ1)
|
||||
sts UART_REG_UCSRC, r16
|
||||
|
||||
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
|
||||
|
||||
.ifdef COM_ATTN_PUE
|
||||
lds r16, COM_ATTN_PUE
|
||||
cbr r16, COM_ATTN_PIN ; disable pullup on ATTN
|
||||
sts COM_ATTN_PUE, r16
|
||||
.else
|
||||
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
|
||||
.endif
|
||||
|
||||
ret
|
||||
;@end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsg
|
||||
; Send a message
|
||||
;
|
||||
; @clobbers r16, r17, X
|
||||
|
||||
ioRawSendMsg:
|
||||
ldi xl, LOW(flashSendBuffer)
|
||||
ldi xh, HIGH(flashSendBuffer)
|
||||
rcall ioRawSendMsgWithAttn
|
||||
brcc ioRawSendMsg
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsgWithAttn
|
||||
;
|
||||
; @param X buffer to send
|
||||
; @return CFLAG: set if okay (packet sent), cleared on error
|
||||
; @clobbers r16, r17 (X)
|
||||
|
||||
ioRawSendMsgWithAttn:
|
||||
ioRawSendMsgWithAttn_loop:
|
||||
ldi r16, 0xff ; expect ATTN high
|
||||
ldi r17, 10
|
||||
rcall ioWaitForAttnState100ms ; wait for up to 1s
|
||||
brcs ioRawSendMsgWithAttn_attnHigh
|
||||
ret
|
||||
ioRawSendMsgWithAttn_attnHigh:
|
||||
rcall ioRawAcquireBus ; (none)
|
||||
brcc ioRawSendMsgWithAttn_loop
|
||||
|
||||
rcall ioRawWaitForOneBitLength ; wait for one bit duration (R22)
|
||||
rcall ioRawWaitForOneBitLength ; wait for one bit duration (R22)
|
||||
|
||||
rcall ioRawSendMsgHandleTransceiver ; (r16, r17, X)
|
||||
cbi COM_ATTN_DDR, COM_ATTN_PIN ; release ATTN line (by setting direction to IN)
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsgHandleTransceiver
|
||||
; Enable transceiver, send packet, disable transceiver.
|
||||
;
|
||||
; @param X buffer to send
|
||||
; @return CFLAG: set if okay (packet sent), cleared on error
|
||||
; @clobbers r16 (r17, X)
|
||||
|
||||
ioRawSendMsgHandleTransceiver:
|
||||
; enable transceiver
|
||||
M_IO_READ r16, UART_REG_UCSRB
|
||||
sbr r16,(1<<UART_BIT_TXEN) ; enable transmit
|
||||
M_IO_WRITE UART_REG_UCSRB, r16
|
||||
rcall ioRawSendMsgDirect
|
||||
; disable transceiver
|
||||
M_IO_READ r16, UART_REG_UCSRB
|
||||
cbr r16,(1<<UART_BIT_TXEN) ; disable transmit
|
||||
M_IO_WRITE UART_REG_UCSRB, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawSendMsgDirect
|
||||
; Send packet.
|
||||
;
|
||||
; @param X buffer to send
|
||||
; @return CFLAG: set if okay (packet sent), cleared on error
|
||||
; @clobbers r16, r17, X
|
||||
|
||||
ioRawSendMsgDirect:
|
||||
adiw xh:xl, 1
|
||||
ld r17, X ; read msg size
|
||||
sbiw xh:xl, 1
|
||||
ldi r16, 3 ; add DEST, LEN, CRC bytes
|
||||
add r17, r16
|
||||
ioRawSendMsgDirect_loop:
|
||||
; wait until transceiver ready
|
||||
M_IO_READ r16, UART_REG_UCSRA
|
||||
sbrs r16, UART_BIT_UDRE
|
||||
rjmp ioRawSendMsgDirect_loop
|
||||
; clear TXC flag by sending a 1
|
||||
sbr r16, (1<<UART_BIT_TXC)
|
||||
M_IO_WRITE UART_REG_UCSRA, r16
|
||||
; write byte to uart data register
|
||||
ld r16, X+
|
||||
M_IO_WRITE UART_REG_UDR, r16
|
||||
dec r17
|
||||
brne ioRawSendMsgDirect_loop
|
||||
; wait until all data send (i.e. send buffer empty and all bits shifted out)
|
||||
ioRawSendMsgDirect_loopComplete:
|
||||
M_IO_READ r16, UART_REG_UCSRA
|
||||
sbrs r16, UART_BIT_TXC
|
||||
rjmp ioRawSendMsgDirect_loopComplete
|
||||
sec
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForValidMsg
|
||||
; Wait for valid incoming msg
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r16, r17, r18 (r19, r22, X)
|
||||
|
||||
ioRawWaitForValidMsg:
|
||||
ldi r16, 0xff ; expect ATTN high
|
||||
ldi r17, 100
|
||||
rcall ioWaitForAttnState100ms ; wait for up to 10s
|
||||
brcc ioRawWaitForValidMsg_end ; ATTN not high, exit
|
||||
ldi r16, 0 ; expect ATTN low
|
||||
ldi r17, 100
|
||||
rcall ioWaitForAttnState100ms ; wait for up to 10s
|
||||
brcs ioRawWaitForValidMsg_attnLow
|
||||
ret
|
||||
ioRawWaitForValidMsg_attnLow:
|
||||
ldi xl, LOW(flashRecvBuffer)
|
||||
ldi xh, HIGH(flashRecvBuffer)
|
||||
ldi r18, FLASH_RECVBUFFER_MAXLEN-3 ; maximum accepted msglen byte
|
||||
ldi r20, 10 ; 10 secs
|
||||
rcall ioRecvMsgHandleReceiver ; (r16, r17, r18, r19, r20, r22)
|
||||
brcs ioRawWaitForValidMsg_packetReceived
|
||||
; wait until ATTN is high (up to 10s)
|
||||
ldi r16, 0xff ; expect ATTN high
|
||||
ldi r17, 100
|
||||
rcall ioWaitForAttnState100ms ; wait for up to 10s
|
||||
clc
|
||||
ret
|
||||
ioRawWaitForValidMsg_packetReceived:
|
||||
ldi r16, 0xff ; expect ATTN high
|
||||
ldi r17, 100
|
||||
rcall ioWaitForAttnState100ms ; wait for up to 10s
|
||||
brcc ioRawWaitForValidMsg_end
|
||||
ldi xl, LOW(flashRecvBuffer)
|
||||
ldi xh, HIGH(flashRecvBuffer)
|
||||
rcall NETMSG_CheckMessageInBuffer
|
||||
ioRawWaitForValidMsg_end:
|
||||
ret
|
||||
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvMsgHandleReceiver
|
||||
;
|
||||
; Turn receiver on, receive message, turn receiver off.
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param R20 max number of secs to wait for incoming message
|
||||
; @param X buffer to receive to
|
||||
; @clobbers r16 (r17, r18, r19, r20, r22)
|
||||
|
||||
ioRecvMsgHandleReceiver:
|
||||
; enable receiver
|
||||
M_IO_READ r16, UART_REG_UCSRB
|
||||
sbr r16,(1<<UART_BIT_RXEN) ; enable receive
|
||||
M_IO_WRITE UART_REG_UCSRB, r16
|
||||
rcall ioRecvMsg
|
||||
M_IO_READ r16, UART_REG_UCSRB
|
||||
cbr r16,(1<<UART_BIT_RXEN) ; disable receive
|
||||
M_IO_WRITE UART_REG_UCSRB, r16
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvMsg
|
||||
;
|
||||
; Wait for next message, if received check validity.
|
||||
; On error skip the currently received message.
|
||||
;
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param R20 max number of secs to wait for incoming message
|
||||
; @param X buffer to receive to
|
||||
; @clobbers (r16, r17, r18, r19, r20, r22)
|
||||
|
||||
ioRecvMsg:
|
||||
rcall ioRawRecvMsg ; (r16, r17, r18, r19, r20, r22)
|
||||
brcc ioRecvMsg_error
|
||||
push xl
|
||||
push xh
|
||||
rcall NETMSG_CheckMessageInBuffer ; (R16, R17, R18, R19, R20, X)
|
||||
pop xh
|
||||
pop xl
|
||||
brcs ioRecvMsg_end
|
||||
ioRecvMsg_error:
|
||||
rcall ioRecvSkipMessage ; skip remainder of the message
|
||||
clc
|
||||
ioRecvMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvSkipMessage
|
||||
;
|
||||
; skip all receiption data until a data pause of about 10ms
|
||||
;
|
||||
; @clobbers r16
|
||||
|
||||
ioRecvSkipMessage:
|
||||
ioRecvSkipMessage_loop:
|
||||
rcall ioRecvFlush ; (r16)
|
||||
; wait for a data pause of 10ms
|
||||
rcall ioRawRecvByteWithin10ms ; (r20, r22)
|
||||
brcs ioRecvSkipMessage_loop
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRecvFlush
|
||||
;
|
||||
; flush receiption buffer.
|
||||
;
|
||||
; @clobbers r16
|
||||
|
||||
ioRecvFlush:
|
||||
M_IO_READ r16, UART_REG_UCSRA ; read status
|
||||
sbrs r16, UART_BIT_RXC
|
||||
ret
|
||||
M_IO_READ r16, UART_REG_UDR ; read data byte
|
||||
rjmp ioRecvFlush
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvMsg
|
||||
;
|
||||
; @return CFLAG set if okay, cleared on error
|
||||
; @param r18 max accepted msglen size (buffersize-3)
|
||||
; @param R20 max number of secs to wait for incoming message
|
||||
; @param X buffer to receive to
|
||||
; @clobbers r16, r17, r19 (r18, r20, r22)
|
||||
|
||||
ioRawRecvMsg:
|
||||
M_IO_READ r19, UART_REG_UCSRA
|
||||
cbr r19, (1<<UART_BIT_FE) | (1<<UART_BIT_DOR) | (1<<UART_BIT_UPE)
|
||||
M_IO_WRITE UART_REG_UCSRA, r19 ; clear errors
|
||||
; wait for begin of message
|
||||
rcall ioRawWaitForDataSeconds ; (r20, r22)
|
||||
brcc ioRawRecvMsg_end
|
||||
clr r19 ; bytecounter
|
||||
; read first two bytes
|
||||
ldi r17, 2 ; 2 bytes: address byte, msg len
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
cp r16, r20 ; check size
|
||||
brcc ioRawRecvMsg_error
|
||||
inc r16 ; account for checksum byte
|
||||
; read remaining bytes including checksum byte
|
||||
mov r17, r16
|
||||
add r19, r17
|
||||
rcall ioRawRecvBytes ; (r16, r17, r18, r22)
|
||||
brcc ioRawRecvMsg_error
|
||||
sub xl, r19 ; let X point back to begin of message
|
||||
sbc xh, r19
|
||||
add xh, r19
|
||||
sec
|
||||
ret
|
||||
ioRawRecvMsg_error:
|
||||
clc
|
||||
ioRawRecvMsg_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvBytes
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @return r16 last byte received
|
||||
; @param r17 number of bytes to read
|
||||
; @param x buffer to receive to
|
||||
; @clobbers r16, r17 (r20, r22)
|
||||
|
||||
ioRawRecvBytes:
|
||||
rcall ioRawRecvByteWithin10ms ; (r20, r22)
|
||||
brcc ioRawRecvBytes_end
|
||||
st X+, r16
|
||||
dec r17
|
||||
brne ioRawRecvBytes
|
||||
sec
|
||||
ioRawRecvBytes_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawRecvByteWithin10ms
|
||||
;
|
||||
; Wait up to 10ms for incoming byte and read it.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @return r16 byte received (if CFLAG set)
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawRecvByteWithin10ms:
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
brcc ioRawRecvByteWithin10ms_end
|
||||
M_IO_READ r16, UART_REG_UCSRA ; check for errors
|
||||
andi r16, (1<<UART_BIT_FE) | (1<<UART_BIT_DOR) | (1<<UART_BIT_UPE)
|
||||
brne ioRawRecvByteWithin10ms_error
|
||||
M_IO_READ r16, UART_REG_UDR ; read data byte
|
||||
sec
|
||||
ret
|
||||
ioRawRecvByteWithin10ms_error:
|
||||
clc
|
||||
ioRawRecvByteWithin10ms_end:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForDataSeconds
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @param r20 maximum number of seconds to wait
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForDataSeconds:
|
||||
ioRawWaitForDataSeconds_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1s ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForDataSeconds_gotit
|
||||
sbi LED_PIN, LED_PINNUM ; toggle
|
||||
dec r20
|
||||
brne ioRawWaitForDataSeconds_loop
|
||||
clc
|
||||
ioRawWaitForDataSeconds_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1s
|
||||
;
|
||||
; Wait for incoming data for max 1s
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1s:
|
||||
ldi r20, 100
|
||||
ioRawWaitForData1s_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData10ms ; (R20, R22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData1s_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData1s_loop
|
||||
clc
|
||||
ioRawWaitForData1s_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData10ms
|
||||
;
|
||||
; Wait for incoming data for max 10 milliseconds.
|
||||
;
|
||||
; @return CFLAG set if okay (data available), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData10ms:
|
||||
.if clock == 8000000
|
||||
ldi r20, 80
|
||||
.endif
|
||||
.if clock == 1000000
|
||||
ldi r20, 10
|
||||
.endif
|
||||
ioRawWaitForData10ms_loop:
|
||||
push r20
|
||||
rcall ioRawWaitForData1000Cycles ; (r20, r22)
|
||||
pop r20
|
||||
brcs ioRawWaitForData10ms_gotit
|
||||
dec r20
|
||||
brne ioRawWaitForData10ms_loop
|
||||
clc
|
||||
ioRawWaitForData10ms_gotit:
|
||||
ret
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
; ---------------------------------------------------------------------------
|
||||
; @routine ioRawWaitForData1000Cycles
|
||||
;
|
||||
; Wait for incoming data for max 1000 clock cycles
|
||||
; (about 1ms at 1MHz, 0.125 at 8MHz)
|
||||
;
|
||||
; @return CFLAG set if okay (packet received), cleared on error
|
||||
; @clobbers: r20, r22
|
||||
|
||||
ioRawWaitForData1000Cycles:
|
||||
ldi r20, 140 ; 1
|
||||
ioRawWaitForData_loop:
|
||||
M_IO_READ r22, UART_REG_UCSRA ; 2
|
||||
sbrc r22, UART_BIT_RXC ; 2/3
|
||||
rjmp ioRawWaitForData_gotit ; 2
|
||||
dec r20 ; 1
|
||||
brne ioRawWaitForData_loop ; 1/2 -> 7 per loop, max about 1000
|
||||
clc ; 1
|
||||
ret ; 4
|
||||
ioRawWaitForData_gotit:
|
||||
sec ; 1
|
||||
ret ; 4
|
||||
; @end
|
||||
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user