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uart bitbang2 now also works on c01!

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This commit is contained in:
Martin Preuss
2025-06-01 00:21:07 +02:00
parent 8d1661d8e4
commit 120e3e1e6b
3 changed files with 43 additions and 3 deletions
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5
avr/devices/c01/defs.asm
View File

@@ -67,6 +67,11 @@
.equ COM_BIT_LENGTH = 52000 ; 104000ns=9600, 52000ns=19200, 26000ns=38400
.equ COM_HALFBIT_LENGTH = 26000 ; see https://de.wikipedia.org/wiki/Universal_Asynchronous_Receiver_Transmitter
.equ COM_DATA_DDR = DDRD
.equ COM_DATA_INPUT = PIND
.equ COM_DATA_OUTPUT = PORTD
.equ COM_DATA_PIN = PORTD0
.equ COM_ATTN_DDR = DDRD
.equ COM_ATTN_INPUT = PIND
.equ COM_ATTN_OUTPUT = PORTD

9
avr/devices/c01/main/main.asm
View File

@@ -56,7 +56,8 @@
#define MODULES_LED_SIMPLE
#define MODULES_NETWORK
;#define MODULES_COMONUART0
#define MODULES_UART_HW
;#define MODULES_UART_HW
#define MODULES_UART_BITBANG
#define MODULES_SPI_HW
#define MODULES_ILI9341
;#define MODULES_FONT_8X8
@@ -117,7 +118,8 @@
; ---------------------------------------------------------------------------
; Reset and interrupt vectors
rjmp BOOTLOADER_ADDR ; 1: Reset vector RESET
rjmp NetUart_AttnChangeIsr ; 2: INT0 External Interrupt Request 0
; rjmp NetUart_AttnChangeIsr ; 2: INT0 External Interrupt Request 0
rjmp UART_BitBang_PcintIsr
reti ; 3: INT1 External Interrupt Request 1
reti ; 4: TIMER1_CAPT Timer/Counter1 Capture Event
reti ; 5: TIMER1_COMPA Timer/Counter1 Compare Match A
@@ -216,7 +218,8 @@ onEveryLoop:
; ---------------------------------------------------------------------------
; defines for network interface
.equ netInterfaceData = netUartIface
;.equ netInterfaceData = netUartIface
.equ netInterfaceData = uart_bitbang_iface

32
avr/modules/uart_bitbang2/iface.asm
View File

@@ -55,12 +55,41 @@ UART_BitBang_Init:
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
; enable IRQ
.ifdef INT0
.if COM_IRQ_BIT_ATTN == INT0
inr r16, MCUCR
cbr r16, (1<<ISC01) | (1<<ISC00)
sbr r16, (1<<ISC01) | (0<<ISC00) ; falling edge of ATTN
outr MCUCR, r16
; sbr r16, (0<<ISC01) | (0<<ISC00) ; low level triggers
inr r16, COM_IRQ_ADDR_ATTN ; enable irq for ATTN line
sbr r16, (1<<COM_IRQ_BIT_ATTN)
outr COM_IRQ_ADDR_ATTN, r16
.else
sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
ori r16, (1<<COM_IRQ_GIMSK_ATTN)
out GIMSK, R16
ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
out GIFR, r16
.endif
.else
sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
ori r16, (1<<COM_IRQ_GIMSK_ATTN)
out GIMSK, R16
ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
out GIFR, r16
.endif
#if 0
sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
ori r16, (1<<COM_IRQ_GIMSK_ATTN)
out GIMSK, R16
ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
out GIFR, r16
#endif
sec
ret
@@ -78,6 +107,7 @@ UART_BitBang_Fini:
cbi COM_DATA_DDR, COM_DATA_PIN ; set TXD port as input
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
#if 0
cbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; disable pin change irq for ATTN line
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
andi r16, ~(1<<COM_IRQ_GIMSK_ATTN)
@@ -85,6 +115,8 @@ UART_BitBang_Fini:
ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
out GIFR, r16
#endif
ret
; @end