sending works again with n20.

This commit is contained in:
Martin Preuss
2025-05-31 14:20:05 +02:00
parent 0b8cb929b7
commit 061119819f
3 changed files with 95 additions and 77 deletions

View File

@@ -104,33 +104,28 @@ uartBitbang_SendByte_loop: ; 11 for low bit
uartBitbang_SendByte_setLow:
sbi COM_DATA_DDR, COM_DATA_PIN ; +2 set DATA as output
cbi COM_DATA_OUTPUT, COM_DATA_PIN ; +2 set DATA low
Utils_WaitNanoSecs COM_BIT_LENGTH, 11, r22
rjmp uartBitbang_SendByte_loopEnd ; +2
rjmp uartBitbang_SendByte_wait ; +2
uartBitbang_SendByte_setHigh:
cbi COM_DATA_DDR, COM_DATA_PIN ; +2 set DATA as input, pullup R makes it ONE
nop ; +1 (to make pin change available)
Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 0, r22 ; wait for half a bit length for line to safely settle
sbis COM_DATA_INPUT, COM_DATA_PIN ; +1 if no skip, +2 if skipped
rjmp uartBitbang_SendByte_error ; +2 if error (collision: we wanted line to be high but it is low)
Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 11, r22
cbi COM_DATA_DDR, COM_DATA_PIN ; +2 set DATA as input, pullup R makes it ONE
Utils_WaitNanoSecs COM_BIT_LENGTH, 8, r22
cbi COM_DATA_OUTPUT, COM_DATA_PIN ; +2 disable internal pullup for DATA
nop ; +1
nop ; +1
uartBitbang_SendByte_wait:
Utils_WaitNanoSecs COM_BIT_LENGTH, 12, r22
uartBitbang_SendByte_loopEnd:
dec r21 ; +1
brne uartBitbang_SendByte_loop ; +2, sum per loop: 11 cycles
; send stopbit
cbi COM_DATA_DDR, COM_DATA_PIN ; +2 set DATA as input, pullup R makes it ONE
Utils_WaitNanoSecs COM_BIT_LENGTH, 0, r22 ; wait for one bit length
cbi COM_DATA_OUTPUT, COM_DATA_PIN ; +2 disable internal pullup for DATA
Utils_WaitNanoSecs COM_BIT_LENGTH, 1, r22 ; wait for one bit length
sec
ret
uartBitbang_SendByte_error:
clc
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbangReceiveByte
;
@@ -204,50 +199,6 @@ uartBitbang_WaitForDataHigh:
; ---------------------------------------------------------------------------
; @routine uartBitbang_WaitForAttnHigh
;
; Wait up to 1ms for data pin to become high
; @return CFLAG set if okay, clear otherwise
; @clobbers R17, R22
uartBitbang_WaitForAttnHigh:
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
UART_BB_M_WAIT_FOR_PIN_HIGH COM_ATTN_INPUT, COM_ATTN_PIN
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_AcquireBus
;
; Reserve bus if free (otherwise return error)
; Expects interrupts to be disabled.
;
; @return CFLAG set if okay (bus acquired), cleared on error
; @clobbers: none
uartBitbang_AcquireBus:
; check for ATTN line: busy?
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable pullup on ATTN
nop ; needed to sample current input
sbis COM_ATTN_INPUT, COM_ATTN_PIN ; ATTN low?
rjmp uartBitbang_AcquireBus_busy ; jump if it is
sbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as output
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; set ATTN low
sec
ret
uartBitbang_AcquireBus_busy:
clc
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_WaitForOneBitLength
;

View File

@@ -49,6 +49,12 @@ UART_BitBang_Init:
rcall NET_Interface_Init ; (R16, R17, X)
; init hw
cbi COM_DATA_DDR, COM_DATA_PIN ; set TXD port as input
cbi COM_DATA_OUTPUT, COM_DATA_PIN ; disable internal pullup for DATA
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
; enable IRQ
sbi COM_IRQ_ADDR_ATTN, COM_IRQ_BIT_ATTN ; enable pin change irq for ATTN line
in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
ori r16, (1<<COM_IRQ_GIMSK_ATTN)
@@ -123,16 +129,12 @@ uartBitBang_sendNextPkg:
rcall NET_Buffer_Locate ; get pointer to buffer (R17)
brcc uartBitBang_sendNextPkg_end
adiw xh:xl, 1 ; skip buffer header
rcall uartBitbang_SendMsg ; (R16, R17, R21, R22, X)
brcc uartBitBang_sendNextPkg_error
rcall uartBitbang_SendMsg ; (R16, R17, R21, R22, R24, R25, X)
brcc uartBitBang_sendNextPkg_end
rcall NET_Interface_GetNextOutgoingMsgNum ; remove from stack (R17, R18, X)
rcall NET_Buffer_ReleaseByNum ; release buffer (R16, X)
ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
sec
rjmp uartBitBang_sendNextPkg_end
uartBitBang_sendNextPkg_error:
rcall NET_Interface_IncCounter16 ; (R24, R25)
uartBitBang_sendNextPkg_end:
ret
; @end

View File

@@ -128,16 +128,38 @@ uartBitbang_RawReceiveMsg_end:
; @param X ptr to buffer to send
; @return CFLAGS set if okay, cleared otherwise (index of error variable in R16)
; @return R16 index of error variable (if CFLAGS cleared)
; @clobbers R16, R22 (R17, R21, X)
; @clobbers R16 (R17, R21, R22, R24, R25, X)
uartBitbang_SendMsg:
rcall uartBitbang_AcquireBus
brcc uartBitbang_SendMsg_lineBusyError
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
rcall uartBitbang_RawSendMsg ; (R16, R17, R21, R22, R24, R25, X)
cbi COM_ATTN_DDR, COM_ATTN_PIN ; release ATTN line (by setting direction to IN)
ret
uartBitbang_SendMsg_lineBusyError:
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
clc
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_RawSendMsg
;
; Send packet over wire.
;
; @param X ptr to buffer to send
; @return CFLAGS set if okay, cleared otherwise (index of error variable in R16)
; @return R16 index of error variable (if CFLAGS cleared)
; @clobbers R16, R17 (R21, R22, R24, R25, X)
uartBitbang_RawSendMsg:
adiw xh:xl, NETMSG_OFFS_MSGLEN
ld r17, X
sbiw xh:xl, NETMSG_OFFS_MSGLEN
@@ -145,25 +167,68 @@ uartBitbang_SendMsg:
inc r17 ; account for msglen byte
inc r17 ; account for crc byte
uartBitbang_SendMsg_loop:
uartBitbang_RawSendMsg_loop:
rcall uartBitbang_WaitForOneBitLength ; wait for one bit duration (R22)
ld r16, X+
rcall uartBitbang_SendByte ; send byte (R16, R21, R22)
brcc uartBitbang_SendMsg_releaseBusRet
brcc uartBitbang_RawSendMsg_ioError
dec r17
brne uartBitbang_SendMsg_loop
brne uartBitbang_RawSendMsg_loop
ldi r16, NET_IFACE_OFFS_PACKETSOUT_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
sec
uartBitbang_SendMsg_releaseBusRet:
cbi COM_ATTN_DDR, COM_ATTN_PIN ; release ATTN line (by setting direction to IN)
brcc uartBitbang_SendMsg_ioError
; packet successfully sent
ret
uartBitbang_SendMsg_ioError:
uartBitbang_RawSendMsg_ioError:
ldi r16, NET_IFACE_OFFS_ERR_COLLISIONS_LOW
rcall NET_Interface_IncCounter16 ; (R24, R25)
clc
ret
uartBitbang_SendMsg_lineBusyError:
ldi r16, NET_IFACE_OFFS_ERR_BUSY_LOW
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_WaitForAttnHigh
;
; Wait up to 1ms for data pin to become high
; @return CFLAG set if okay, clear otherwise
; @clobbers R17, R22
uartBitbang_WaitForAttnHigh:
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN port as input
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable internal pullup for ATTN
UART_BB_M_WAIT_FOR_PIN_HIGH COM_ATTN_INPUT, COM_ATTN_PIN
ret
; @end
; ---------------------------------------------------------------------------
; @routine uartBitbang_AcquireBus
;
; Reserve bus if free (otherwise return error)
; Expects interrupts to be disabled.
;
; @return CFLAG set if okay (bus acquired), cleared on error
; @clobbers: none
uartBitbang_AcquireBus:
; check for ATTN line: busy?
cbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as input
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; disable pullup on ATTN
nop ; needed to sample current input
sbis COM_ATTN_INPUT, COM_ATTN_PIN ; ATTN low?
rjmp uartBitbang_AcquireBus_busy ; jump if it is
sbi COM_ATTN_DDR, COM_ATTN_PIN ; set ATTN as output
cbi COM_ATTN_OUTPUT, COM_ATTN_PIN ; set ATTN low
sec
ret
uartBitbang_AcquireBus_busy:
clc
ret
; @end