577 lines
15 KiB
NASM
577 lines
15 KiB
NASM
; ***************************************************************************
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; copyright : (C) 2024 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; ---------------------------------------------------------------------------
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; @macro m_uart_irq_handle_tick
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;
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; @clobbers any
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;
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; @param %0 COM_DATA_DDR
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; @param %1 COM_DATA_INPUT
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; @param %2 COM_DATA_OUTPUT
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; @param %3 COM_DATA_PIN
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; @param %4 COM_ATTN_DDR
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; @param %5 COM_ATTN_INPUT
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; @param %6 COM_ATTN_OUTPUT
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; @param %7 COM_ATTN_PIN
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; @param %8 uartIrqDataIface1
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.macro m_uart_irq_handle_tick
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ldi yl, LOW(@8)
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ldi yh, HIGH(@8)
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ldi zl, LOW(_jumptable)
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ldi zh, HIGH(_jumptable)
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rjmp UART_Irq_HandleTick
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_jumptable:
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rjmp _readDataBit ; read DATA BIT (r16=bit)
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rjmp _readAttnBit ; read ATTN BIT (r16=bit)
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rjmp _writeDataBit ; write DATA BIT (r16=bit)
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rjmp _writeAttnBit ; write ATTN BIT (r16=bit)
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_readDataBit:
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clr r16
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sbic @1, @3
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inc r16
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ret
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_readAttnBit:
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clr r16
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sbic @5, @7
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inc r16
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ret
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_writeDataBit:
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tst r16
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brne _writeDataBit1
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cbi @0, @3 ; set data line to output (makes it LOW)
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ret
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_writeDataBit1:
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sbi @0, @3 ; set data line to output (external pullup R makes it HIGH)
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ret
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_writeAttnBit:
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tst r16
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brne _writeAttnBit1
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cbi @4, @7 ; set ATTN line to output (makes it LOW)
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ret
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_writeAttnBit1:
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sbi @4, @7 ; set ATTN line to output (external pullup R makes it HIGH)
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ret
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.endmacro
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; @end
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; ---------------------------------------------------------------------------
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; @macro m_ringbuffer_writebyte
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;
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; @param R16 byte to write
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; @param Y base address (for "LDD Y+nn" and "STD Y+nn")
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; @param %0 constant maxBytes
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; @param %1 offset to Y to access usedBytes variable (for "LDD Y+nn" and "STD Y+nn")
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; @param %2 offset to Y to access readPos variable
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; @param %3 offset to Y to access writePos variable
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; @param %4 offset to Y to access buffer
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; @return CFLAG set if okay, cleared on error (i.e. buffer full)
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; @clobbers R17, X
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.macro m_ringbuffer_writebyte
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ldd r17, Y+@1 ; usedBytes
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cpi r17, @0 ; maxBytes
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brcc l_end
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inc r17
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std Y+@1, r17 ; usedBytes
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ldd r17, Y+@3 ; writePos
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mov xl, yl
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mov xh, yh
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adiw xh:xl, @4
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add xl, r17
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adc xh, r17
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sub xh, r17
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st X, r16
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inc r17
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cpi r17, @0
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brcs l_store
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clr r17
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l_store:
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std Y+@3, r17 ; writePos
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sec
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l_end:
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.endmacro
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; @end
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; ---------------------------------------------------------------------------
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; @macro m_ringbuffer_readbyte
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;
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; @param Y base address (for "LDD Y+nn" and "STD Y+nn")
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; @param %0 constant maxBytes
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; @param %1 offset to Y to access usedBytes variable (for "LDD Y+nn" and "STD Y+nn")
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; @param %2 offset to Y to access readPos variable
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; @param %3 offset to Y to access writePos variable
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; @param %4 offset to Y to access buffer
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; @return CFLAG set if okay, cleared on error (i.e. buffer full)
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; @return R16 byte read
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; @clobbers R17, X
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.macro m_ringbuffer_readbyte
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ldd r17, Y+@1 ; usedBytes
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tst r17
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clc
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breq l_end
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dec r17
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std Y+@1, r17 ; usedBytes
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ldd r17, Y+@2 ; readPos
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mov xl, yl
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mov xh, yh
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adiw xh:xl, @4
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add xl, r17
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adc xh, r17
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sub xh, r17
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ld r16, X
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inc r17
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cpi r17, @0
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brcs l_store
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clr r17
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l_store:
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std Y+@2, r17 ; readPos
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sec
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l_end:
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.endmacro
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.dseg
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uartIrqBase: .byte 4
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;uartIrqState: .byte 1
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;uartIrqCounter: .byte 1
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;uartIrqStateCounter: .byte 1
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;uartIrqCurrentByte: .byte 1
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.cseg
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UART_IRQ_BEGIN:
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; ---------------------------------------------------------------------------
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; @routine UART_Irq_HandleTick @global
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;
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; @param Y pointer to interface data in SRAM (see @ref UART_IRQ_IFACE_OFFS_STATE)
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; @param Z pointer to IFACE jump table for the given interface
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; @clobbers any
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UART_Irq_HandleTick:
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ldd r16, Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER
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tst r16
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breq UART_Irq_HandleTick_handle
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dec r16
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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UART_Irq_HandleTick_handle:
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATE
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rjmp uart_irq_JumpToStateFunction
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; @end
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; r16: function
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uart_irq_JumpToStateFunction:
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cpi r16, UART_IRQ_STATE_COUNT ; invalid function num?
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brcc uart_irq_JumpToStateFunction_end
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ldi r18, LOW(uart_irq_state_jumptable)
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ldi r19, HIGH(uart_irq_state_jumptable)
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add r18, r16
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clr r16
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adc r19, r16
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push r18
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push r19
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uart_irq_JumpToStateFunction_end:
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ret ; indirect jump to address we just pushed to the stack
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uart_irq_state_jumptable:
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rjmp uart_irq_handle_idle
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rjmp uart_irq_handle_waitforattnhigh
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rjmp uart_irq_handle_waitforstartbit
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rjmp uart_irq_handle_waitfordatabit
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rjmp uart_irq_handle_waitforstopbit
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rjmp uart_irq_handle_sendingattn
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rjmp uart_irq_handle_sendingstartbit
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rjmp uart_irq_handle_sendingdatabit
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rjmp uart_irq_handle_sendingstopbit
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; z=iface jumptable
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uart_irq_ReadDataBit:
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adiw zh:zl, UART_IRQ_IFACE_PINFN_READDATA
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push zl
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push zh
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sbiw zh:zl, UART_IRQ_IFACE_PINFN_READDATA
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ret ; indirect jump to address we just pushed to the stack
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uart_irq_ReadAttnBit:
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adiw zh:zl, UART_IRQ_IFACE_PINFN_READATTN
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push zl
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push zh
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sbiw zh:zl, UART_IRQ_IFACE_PINFN_READATTN
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ret ; indirect jump to address we just pushed to the stack
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uart_irq_WriteDataBit:
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adiw zh:zl, UART_IRQ_IFACE_PINFN_WRITEDATA
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push zl
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push zh
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sbiw zh:zl, UART_IRQ_IFACE_PINFN_WRITEDATA
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ret ; indirect jump to address we just pushed to the stack
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uart_irq_WriteAttnBit:
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adiw zh:zl, UART_IRQ_IFACE_PINFN_WRITEATTN
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push zl
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push zh
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sbiw zh:zl, UART_IRQ_IFACE_PINFN_WRITEATTN
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ret ; indirect jump to address we just pushed to the stack
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; y=iface sram data
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; z=iface jumptable
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uart_irq_handle_idle:
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rcall uart_irq_ReadAttnBit
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tst r16
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brne uart_irq_handle_idle_checksend ; jump if ATTN line high
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; ATTN low, start receiving
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ldi r16, UART_IRQ_STATE_WAITFORSTARTBIT
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME10
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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rjmp uart_irq_handle_idle_end
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uart_irq_handle_idle_checksend:
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; check whether there is something to send
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ldd r16, Y+UART_IRQ_IFACE_OFFS_WRITEBUF_USED
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tst r16
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breq uart_irq_handle_idle_end ; nothing to send
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; start sending
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clr r16
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rcall uart_irq_WriteAttnBit
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ldi r16, UART_IRQ_STATE_SENDINGATTN
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME2
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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uart_irq_handle_idle_end:
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ret
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uart_irq_handle_waitforstartbit:
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rcall uart_irq_ReadAttnBit
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tst r16
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brne uart_irq_handle_waitforstartbit_toidle
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; ATTN still low
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rcall uart_irq_ReadDataBit
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tst r16
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breq uart_irq_handle_waitforstartbit_datalow
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; DATA still high
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ldd r16, Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER
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tst r16
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brne uart_irq_handle_waitforstartbit_end
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ldi r16, UART_IRQ_STATE_WAITFORATTNHIGH
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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rjmp uart_irq_handle_waitforstartbit_end
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uart_irq_handle_waitforstartbit_datalow:
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ldi r16, UART_IRQ_STATE_WAITFORDATABIT
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME1_5
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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ldi r16, 8 ; 8 bit
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std Y+UART_IRQ_IFACE_OFFS_STATECOUNTER, r16
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clr r16
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std Y+UART_IRQ_IFACE_OFFS_STATEDATA, r16
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rjmp uart_irq_handle_waitforstartbit_end
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uart_irq_handle_waitforstartbit_toidle:
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ldi r16, UART_IRQ_STATE_IDLE
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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uart_irq_handle_waitforstartbit_end:
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ret
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uart_irq_handle_waitfordatabit:
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rcall uart_irq_ReadAttnBit
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tst r16
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brne uart_irq_handle_waitfordatabit_toidle
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ldd r16, Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER
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tst r16
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brne uart_irq_handle_waitfordatabit_end
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; counter=0: read data
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rcall uart_irq_ReadDataBit
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ror r16 ; rotate bit into carry flag
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATEDATA ; doesn't change carry flag
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ror r16 ; rotate carry flag into data byte
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std Y+UART_IRQ_IFACE_OFFS_STATEDATA, r16
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATECOUNTER
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dec r16
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brne uart_irq_handle_waitfordatabit_bytecomplete
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ldi r16, UART_IRQ_TIME_BITTIME1 ; read next bit
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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rjmp uart_irq_handle_waitfordatabit_end
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uart_irq_handle_waitfordatabit_bytecomplete:
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ldi r16, UART_IRQ_STATE_WAITFORSTOPBIT
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME1_5
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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rjmp uart_irq_handle_waitfordatabit_end
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uart_irq_handle_waitfordatabit_toidle:
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ldi r16, UART_IRQ_STATE_IDLE
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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uart_irq_handle_waitfordatabit_end:
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ret
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uart_irq_handle_waitforstopbit:
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rcall uart_irq_ReadAttnBit
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tst r16
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brne uart_irq_handle_waitforstopbit_toidle
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rcall uart_irq_ReadDataBit
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tst r16
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brne uart_irq_handle_waitforstopbit_datahigh
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; still low
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ldd r16, Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER
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tst r16
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breq uart_irq_handle_waitforstopbit_abortmsg ; timeout, abort
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rjmp uart_irq_handle_waitforstopbit_end
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uart_irq_handle_waitforstopbit_datahigh:
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATEDATA ; store received byte
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rcall uart_irq_rdbuf_writebyte
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brcc uart_irq_handle_waitforstopbit_abortmsg ; readbuffer full, abort
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ldi r16, UART_IRQ_STATE_WAITFORSTARTBIT ; wait for next byte
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME10
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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rjmp uart_irq_handle_waitforstopbit_end
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uart_irq_handle_waitforstopbit_abortmsg:
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ldi r16, UART_IRQ_STATE_WAITFORATTNHIGH
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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rjmp uart_irq_handle_waitforstopbit_end
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uart_irq_handle_waitforstopbit_toidle:
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ldi r16, UART_IRQ_STATE_IDLE
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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uart_irq_handle_waitforstopbit_end:
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ret
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uart_irq_handle_waitforattnhigh:
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rcall uart_irq_ReadAttnBit
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tst r16
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breq uart_irq_handle_waitforattnhigh_end ; still low
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uart_irq_handle_waitforattnhigh_toidle:
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ldi r16, UART_IRQ_STATE_IDLE
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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uart_irq_handle_waitforattnhigh_end:
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ret
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uart_irq_handle_sendingattn:
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ldd r16, Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER
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tst r16
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brne uart_irq_handle_sendingattn_end
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; send start bit
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clr r16
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rcall uart_irq_WriteDataBit
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ldi r16, UART_IRQ_STATE_SENDINGSTARTBIT
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME1
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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uart_irq_handle_sendingattn_end:
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ret
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uart_irq_handle_sendingstartbit:
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ldd r16, Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER
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tst r16
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brne uart_irq_handle_sendingstartbit_end
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; store current data byte from ringbuffer
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rcall uart_irq_wrbuf_readbyte
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std Y+UART_IRQ_IFACE_OFFS_STATEDATA, r16
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; send data bit
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATEDATA
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andi r16, 1
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rcall uart_irq_WriteDataBit
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATEDATA
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ror r16
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std Y+UART_IRQ_IFACE_OFFS_STATEDATA, r16
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ldi r16, UART_IRQ_STATE_SENDINGDATABIT
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME1
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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ldi r16, 8
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std Y+UART_IRQ_IFACE_OFFS_STATECOUNTER, r16
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uart_irq_handle_sendingstartbit_end:
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ret
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uart_irq_handle_sendingdatabit:
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ldd r16, Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER
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tst r16
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brne uart_irq_handle_sendingdatabit_end
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; all bits sent?
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATECOUNTER
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dec r16
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breq uart_irq_handle_sendingdatabit_tosendstopbit
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std Y+UART_IRQ_IFACE_OFFS_STATECOUNTER, r16
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; send next data bit
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATEDATA
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andi r16, 1
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rcall uart_irq_WriteDataBit
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ldd r16, Y+UART_IRQ_IFACE_OFFS_STATEDATA
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ror r16
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std Y+UART_IRQ_IFACE_OFFS_STATEDATA, r16
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ldi r16, UART_IRQ_TIME_BITTIME1 ; send next bit
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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rjmp uart_irq_handle_sendingstartbit_end
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uart_irq_handle_sendingdatabit_tosendstopbit:
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; send stop bit
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ldi r16, 1
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rcall uart_irq_WriteDataBit
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ldi r16, UART_IRQ_STATE_SENDINGSTOPBIT
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME1
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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uart_irq_handle_sendingdatabit_end:
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ret
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uart_irq_handle_sendingstopbit:
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ldd r16, Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER
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tst r16
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brne uart_irq_handle_sendingstopbit_end
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; more to send?
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ldd r16, Y+UART_IRQ_IFACE_OFFS_WRITEBUF_USED
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tst r16
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breq uart_irq_handle_sendingstopbit_toidle ; nothing in buffer, go idle
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; wait some time before sending next byte
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ldi r16, UART_IRQ_STATE_SENDINGATTN
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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ldi r16, UART_IRQ_TIME_BITTIME1
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std Y+UART_IRQ_IFACE_OFFS_TICKCOUNTER, r16
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rjmp uart_irq_handle_sendingstopbit_end
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uart_irq_handle_sendingstopbit_toidle:
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ldi r16, 1
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rcall uart_irq_WriteAttnBit
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ldi r16, UART_IRQ_STATE_IDLE
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std Y+UART_IRQ_IFACE_OFFS_STATE, r16
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uart_irq_handle_sendingstopbit_end:
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ret
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; ---------------------------------------------------------------------------
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; @routine uart_irq_rdbuf_writebyte
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;
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; @param R16 byte to write
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; @param Y base address (for "LDD Y+nn" and "STD Y+nn")
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; @return CFLAG set if okay, cleared on error (i.e. buffer full)
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; @clobbers R17, X
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|
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uart_irq_rdbuf_writebyte:
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m_ringbuffer_writebyte \
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UART_IRQ_IFACE_READBUF_SIZE, \
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UART_IRQ_IFACE_OFFS_READBUF_USED, \
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UART_IRQ_IFACE_OFFS_READBUF_RDPOS, \
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UART_IRQ_IFACE_OFFS_READBUF_WRPOS, \
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UART_IRQ_IFACE_OFFS_READBUF_BUF
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ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine uart_irq_rdbuf_readbyte
|
|
;
|
|
; @param Y base address (for "LDD Y+nn" and "STD Y+nn")
|
|
; @return CFLAG set if okay, cleared on error (i.e. buffer full)
|
|
; @return R16 byte read
|
|
; @clobbers R17, X
|
|
|
|
uart_irq_rdbuf_readbyte:
|
|
m_ringbuffer_readbyte \
|
|
UART_IRQ_IFACE_READBUF_SIZE, \
|
|
UART_IRQ_IFACE_OFFS_READBUF_USED, \
|
|
UART_IRQ_IFACE_OFFS_READBUF_RDPOS, \
|
|
UART_IRQ_IFACE_OFFS_READBUF_WRPOS, \
|
|
UART_IRQ_IFACE_OFFS_READBUF_BUF
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine uart_irq_wrbuf_writebyte
|
|
;
|
|
; @param R16 byte to write
|
|
; @param Y base address (for "LDD Y+nn" and "STD Y+nn")
|
|
; @return CFLAG set if okay, cleared on error (i.e. buffer full)
|
|
; @clobbers R17, X
|
|
|
|
uart_irq_wrbuf_writebyte:
|
|
m_ringbuffer_writebyte \
|
|
UART_IRQ_IFACE_WRITEBUF_SIZE, \
|
|
UART_IRQ_IFACE_OFFS_WRITEBUF_USED, \
|
|
UART_IRQ_IFACE_OFFS_WRITEBUF_RDPOS, \
|
|
UART_IRQ_IFACE_OFFS_WRITEBUF_WRPOS, \
|
|
UART_IRQ_IFACE_OFFS_WRITEBUF_BUF
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
; ---------------------------------------------------------------------------
|
|
; @routine uart_irq_wrbuf_readbyte
|
|
;
|
|
; @param Y base address (for "LDD Y+nn" and "STD Y+nn")
|
|
; @return CFLAG set if okay, cleared on error (i.e. buffer full)
|
|
; @return R16 byte read
|
|
; @clobbers R17, X
|
|
|
|
uart_irq_wrbuf_readbyte:
|
|
m_ringbuffer_readbyte \
|
|
UART_IRQ_IFACE_WRITEBUF_SIZE, \
|
|
UART_IRQ_IFACE_OFFS_WRITEBUF_USED, \
|
|
UART_IRQ_IFACE_OFFS_WRITEBUF_RDPOS, \
|
|
UART_IRQ_IFACE_OFFS_WRITEBUF_WRPOS, \
|
|
UART_IRQ_IFACE_OFFS_WRITEBUF_BUF
|
|
ret
|
|
; @end
|
|
|
|
|
|
|
|
|
|
UART_IRQ_END:
|
|
.equ MODULE_SIZE_UART_IRQ = UART_IRQ_END-UART_IRQ_BEGIN
|
|
|
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|