153 lines
3.4 KiB
NASM
153 lines
3.4 KiB
NASM
; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; Hardware routine for AtMega 644P devices
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.cseg
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; ---------------------------------------------------------------------------
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; @routine systemInitHardware
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;
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systemInitHardware:
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; set all ports as inputs and enable internal pull-up resistors
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ldi r16, 0xff
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clr r17
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out DDRA, r17 ; all input
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out PORTA, r16 ; enable pull-up on all
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out DDRB, r17 ; all input
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out PORTB, r16 ; enable pull-up on all
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out DDRC, r17 ; all input
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out PORTC, r16 ; enable pull-up on all
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out DDRD, r17 ; all input
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out PORTD, r16 ; enable pull-up on all
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine systemSetSpeed
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;
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systemSetSpeed:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine systemSleep
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;
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systemSleep:
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; only modify SE, SM2, SM1 and SM0
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cli
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inr r16, SMCR
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cbr r16, (1<<SE) | (0<<SM2) | (0<<SM1) | (0<<SM0)
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outr SMCR, r16
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sei ; make sure interrupts really are enabled
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inr r16, SMCR ; enable sleep mode
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sbr r16, (1<<SE)
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outr SMCR, r16
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sleep ; sleep, wait for interrupt
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inr r16, SMCR ; disable sleep mode
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cbr r16, (1<<SE)
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outr SMCR, r16
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine systemSetupTimer0
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;
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systemSetupTimer0: ; setup timer for IRQ every 100ms
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ldi r16, (1<<WGM01) | (0<<WGM00) ; Prescaler 1024, CTC mode
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outr TCCR0A, r16
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ldi r16, (1<<CS02) | (0<<CS01) | (1<<CS00) | (0<<WGM02) ; Prescaler 1024, CTC mode
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outr TCCR0B, r16
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;
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; Settings for clock 1Mhz (default)
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; use timer0 with OCR0A=98-1 (irq every 97.65625 millisecs), baseTimerModuleReloadValue 1
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;
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.if clock == 1000000
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; CMP-A interrupt about every 100ms
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ldi r16, 98-1 ; (1,000,000/1024)/10 = 97.65625
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outr OCR0A, r16
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ldi r16, 1
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sts baseTimerModuleReloadValue, r16
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sts baseTimerModuleTickCounter, r16
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; Settings for clock 8Mhz
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; use timer0 with OCR0=78 (irq every 9.984 millisecs), baseTimerModuleReloadValue 10
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;
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.elif clock == 8000000
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; CMP interrupt about every 10ms
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ldi r16, 78-1
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outr OCR0A, r16
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ldi r16, 10
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sts baseTimerModuleReloadValue, r16
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sts baseTimerModuleTickCounter, r16
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.elif clock == 10000000
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; CMP-A interrupt about every 10ms
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ldi r16, 98-1 ; (10,000,000/1024)/10 = 97.65625
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outr OCR0A, r16
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ldi r16, 10
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sts baseTimerModuleReloadValue, r16
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sts baseTimerModuleTickCounter, r16
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.elif clock == 20000000
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; CMP-A interrupt about every 5ms
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ldi r16, 98-1
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outr OCR0A, r16
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ldi r16, 20
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sts baseTimerModuleReloadValue, r16
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sts baseTimerModuleTickCounter, r16
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.else
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.error "Unhandled clock frequency"
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.endif
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ldi r16, (1<<OCF0A) ; clear pending interrupts
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outr TIFR0, r16
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inr r16, TIMSK0
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sbr r16, (1<<OCIE0A) ; Timer/Counter0 Output Compare Match A Interrupt Enable
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outr TIMSK0, r16
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.endif
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sec
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ret
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; @end
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