; ***************************************************************************
; BMP280 module
; (c) 2023 Martin Preuss
;


; ***************************************************************************
; defines



; ***************************************************************************
; data

.dseg

bmp280DataBegin:
  bmp280Id: .byte 1
bmp280DataEnd:



; ***************************************************************************
; code

.cseg




; ---------------------------------------------------------------------------
; BMP280_Init
;
; IN:
; - nothing
; OUT:
; - CFLAG: set if okay, clear on error
; USED:

BMP280_Init:
  ldi xh, HIGH(bmp280DataBegin)
  ldi xl, LOW(bmp280DataBegin)
  clr r16
  ldi r17, (bmp280DataEnd-bmp280DataBegin)
  rcall Utils_FillSram

  rcall bmp280ReadId
  brcc BMP280_Init_error
  sts bmp280Id, r16    ; store id
  sec
  ret
BMP280_Init_error:
  clc
  ret


; ---------------------------------------------------------------------------
; BMP280_Fini
;
; IN:
; - nothing
; OUT:
; - CFLAG: set if okay, clear on error
; USED:

BMP280_Fini:
  sec
  ret



; ---------------------------------------------------------------------------
; bmp280ReadId
;
; IN:
; - nothing
; OUT:
; - CFLAG: set if okay, clear on error
; - R16  : id (most probably 0x60)
; USED: R15, R16 (R17, R18, R22)

bmp280ReadId:
  ldi r16, 0xd0
  rjmp bmp280ReadSingleReg



; ---------------------------------------------------------------------------
; bmp280ReadSingleReg
;
; IN:
; - R16: register id
; OUT:
; - CFLAG: set if okay, clear on error
; - R16  : register content
; USED: R1, R15, R16 (R17, R18, R22)

bmp280ReadSingleReg:
  in r15, SREG
  cli
  mov r1, r16
  rcall twiStart               ; (R22)
  ldi r16, (BMP280_ADDR*2)     ; start in write mode
  rcall twiSendByteExpectAck   ; (R16, R17, R18, R22)
  brcc bmp280ReadSingleReg_error
  mov r16, r1                  ; register num
  rcall twiSendByteExpectAck   ; (R16, R17, R18, R22)
  brcc bmp280ReadSingleReg_error
  rcall twiRestart             ; (R22)
  ldi r16, (BMP280_ADDR*2)+1   ; restart in read mode
  rcall twiSendByteExpectAck   ; (R16, R17, R18, R22)
  brcc bmp280ReadSingleReg_error
  
  rcall twiReceiveByteSendAck  ; read ID
  brcc bmp280ReadSingleReg_error
  rcall twiStop                ; (R22)
  out SREG, r15
  sec
  ret
bmp280ReadSingleReg_error:
  rcall twiStop                ; (R22)
  out SREG, r15
  clc
  ret



; ---------------------------------------------------------------------------
; bmp280ReadRegsToSram
;
; IN:
; - X: pointer to buffer to read data in
; - R18: first register to read from
; - R19: number of registers to read
; OUT:
; - CFLAG: set if okay, clear on error
; - R16  : id (most probably 0x60)
; USED: R15, R16 (R17, R18, R22)

bmp280ReadRegsToSram:
  in r15, SREG
  cli
  mov r1, r18
  mov r2, r19
  rcall twiStart                  ; (R22)
  ldi r16, (BMP280_ADDR*2)        ; start in write mode
  rcall twiSendByteExpectAck      ; (R16, R17, R18, R22)
  brcc bmp280ReadRegsToSram_error

  mov r16, r1                     ; first register to read
  rcall twiSendByteExpectAck      ; (R16, R17, R18, R22)
  brcc bmp280ReadRegsToSram_error
  rcall twiRestart                ; (R22)
  ldi r16, (BMP280_ADDR*2)+1      ; restart in read mode
  rcall twiSendByteExpectAck      ; (R16, R17, R18, R22)
  brcc bmp280ReadRegsToSram_error
bmp280ReadRegsToSram_loop:
    rcall twiReceiveByteSendAck   ; read register content
    brcc bmp280ReadRegsToSram
    st x+, r16                    ; store register content
    dec r2
  brne bmp280ReadRegsToSram_loop
  rcall twiStop                   ; (R22)
  out SREG, r15
  sec
  ret
bmp280ReadRegsToSram_error:
  rcall twiStop                ; (R22)
  out SREG, r15
  clc
  ret