; *************************************************************************** ; copyright : (C) 2025 by Martin Preuss ; email : martin@libchipcard.de ; ; *************************************************************************** ; * This file is part of the project "AqHome". * ; * Please see toplevel file COPYING of that project for license details. * ; *************************************************************************** .equ UART_HW_IFACE_READBUF_SIZE = 8 .equ UART_HW_IFACE_WRITEBUF_SIZE = 8 .equ UART_HW_BUFFER_INUSE_BIT = 7 .equ UART_HW_BUFFER_IFACENUM1_BIT = 1 .equ UART_HW_BUFFER_IFACENUM0_BIT = 0 .equ UART_HW_MODE_OFF = 0 .equ UART_HW_MODE_IDLE = 1 .equ UART_HW_MODE_READING = 2 .equ UART_HW_MODE_WRITING = 4 .equ UART_HW_MODE_SKIPPING = 8 .equ UART_HW_MODE_WAITATTNLOW = 16 ; waiting after setting ATTN low .equ UART_HW_STATUS_UNDERRUN = 0x01 .equ UART_HW_STATUS_OVERRUN = 0x02 .equ UART_HW_STATUS_HWERR = 0x04 .equ UART_HW_STATUS_SOFTERR = 0x08 .equ UART_HW_STATUS_ATTN = 0x80 .equ UART_HW_IFACE_OFFS_IFACENUM = 0 ; interface number (put into received messages) .equ UART_HW_IFACE_OFFS_MODE = 1 .equ UART_HW_IFACE_OFFS_STATUS = 2 .equ UART_HW_IFACE_OFFS_READTIMER = 3 .equ UART_HW_IFACE_OFFS_WRITETIMER = 4 .equ UART_HW_IFACE_OFFS_ERR_OVR = 5 .equ UART_HW_IFACE_OFFS_ERR_CONTENT = 6 ; ringbuffer for incoming chars .equ UART_HW_IFACE_OFFS_READBUF = 7 .equ UART_HW_IFACE_OFFS_READBUF_MAX = UART_HW_IFACE_OFFS_READBUF .equ UART_HW_IFACE_OFFS_READBUF_USED = UART_HW_IFACE_OFFS_READBUF+1 .equ UART_HW_IFACE_OFFS_READBUF_RDPOS = UART_HW_IFACE_OFFS_READBUF+2 .equ UART_HW_IFACE_OFFS_READBUF_WRPOS = UART_HW_IFACE_OFFS_READBUF+3 .equ UART_HW_IFACE_OFFS_READBUF_DATA = UART_HW_IFACE_OFFS_READBUF+4 ; UART_HW_IFACE_READBUF_SIZE bytes ; ringbuffer for outgoing chars .equ UART_HW_IFACE_OFFS_WRITEBUF = UART_HW_IFACE_OFFS_READBUF_DATA+UART_HW_IFACE_READBUF_SIZE .equ UART_HW_IFACE_OFFS_WRITEBUF_MAX = UART_HW_IFACE_OFFS_WRITEBUF .equ UART_HW_IFACE_OFFS_WRITEBUF_USED = UART_HW_IFACE_OFFS_WRITEBUF+1 .equ UART_HW_IFACE_OFFS_WRITEBUF_RDPOS = UART_HW_IFACE_OFFS_WRITEBUF+2 .equ UART_HW_IFACE_OFFS_WRITEBUF_WRPOS = UART_HW_IFACE_OFFS_WRITEBUF+3 .equ UART_HW_IFACE_OFFS_WRITEBUF_DATA = UART_HW_IFACE_OFFS_WRITEBUF+4 .equ UART_HW_IFACE_OFFS_READMSG = UART_HW_IFACE_OFFS_WRITEBUF_DATA+UART_HW_IFACE_WRITEBUF_SIZE .equ UART_HW_IFACE_OFFS_READMSG_BUFNUM = UART_HW_IFACE_OFFS_READMSG ; 1 byte .equ UART_HW_IFACE_OFFS_READMSG_PTR = UART_HW_IFACE_OFFS_READMSG+1 ; 2 bytes .equ UART_HW_IFACE_OFFS_READMSG_USED = UART_HW_IFACE_OFFS_READMSG+3 ; 1 byte .equ UART_HW_IFACE_OFFS_READMSG_LEFT = UART_HW_IFACE_OFFS_READMSG+4 ; 1 byte .equ UART_HW_IFACE_OFFS_WRITEMSG = UART_HW_IFACE_OFFS_READMSG_LEFT+1 .equ UART_HW_IFACE_OFFS_WRITEMSG_BUFNUM = UART_HW_IFACE_OFFS_WRITEMSG ; 1 byte .equ UART_HW_IFACE_OFFS_WRITEMSG_PTR = UART_HW_IFACE_OFFS_WRITEMSG+1 ; 2 bytes .equ UART_HW_IFACE_OFFS_WRITEMSG_USED = UART_HW_IFACE_OFFS_WRITEMSG+3 ; 1 byte .equ UART_HW_IFACE_OFFS_WRITEMSG_LEFT = UART_HW_IFACE_OFFS_WRITEMSG+4 ; 1 byte .equ UART_HW_IFACE_SIZE = UART_HW_IFACE_OFFS_WRITEMSG_LEFT+1