; *************************************************************************** ; copyright : (C) 2025 by Martin Preuss ; email : martin@libchipcard.de ; ; *************************************************************************** ; * This file is part of the project "AqHome". * ; * Please see toplevel file COPYING of that project for license details. * ; *************************************************************************** .equ UART_HW_READMODE_OFF = 0 .equ UART_HW_READMODE_IDLE = 1 .equ UART_HW_READMODE_READING = 2 .equ UART_HW_READMODE_SKIPPING = 3 .equ UART_HW_READMODE_MSGRECEIVED = 4 .equ UART_HW_WRITEMODE_OFF = 0 .equ UART_HW_WRITEMODE_IDLE = 16 .equ UART_HW_WRITEMODE_WRITING = 17 .equ UART_HW_WRITEMODE_WAITBUFFEREMPTY = 18 .equ UART_HW_WRITEMODE_WRITEBUFFEREMPTY = 19 .equ UART_HW_STATUS_UNDERRUN_BIT = 0 .equ UART_HW_STATUS_OVERRUN_BIT = 1 .equ UART_HW_STATUS_HWERR_BIT = 2 .equ UART_HW_STATUS_SOFTERR_BIT = 3 .equ UART_HW_STATUS_ATTN_BIT = 7 .equ UART_HW_IFACE_OFFS_READ = NET_IFACE_SIZE .equ UART_HW_IFACE_OFFS_READMODE = UART_HW_IFACE_OFFS_READ .equ UART_HW_IFACE_OFFS_READBUFNUM = UART_HW_IFACE_OFFS_READ+1 .equ UART_HW_IFACE_OFFS_READBUFPOS_LOW = UART_HW_IFACE_OFFS_READ+2 .equ UART_HW_IFACE_OFFS_READBUFPOS_HIGH = UART_HW_IFACE_OFFS_READ+3 .equ UART_HW_IFACE_OFFS_READBUFUSED = UART_HW_IFACE_OFFS_READ+4 .equ UART_HW_IFACE_OFFS_READBUFLEFT = UART_HW_IFACE_OFFS_READ+5 .equ UART_HW_IFACE_OFFS_WRITE = UART_HW_IFACE_OFFS_READBUFLEFT+1 .equ UART_HW_IFACE_OFFS_WRITEMODE = UART_HW_IFACE_OFFS_WRITE .equ UART_HW_IFACE_OFFS_WRITEBUFNUM = UART_HW_IFACE_OFFS_WRITE+1 .equ UART_HW_IFACE_OFFS_WRITEBUFPOS_LOW = UART_HW_IFACE_OFFS_WRITE+2 .equ UART_HW_IFACE_OFFS_WRITEBUFPOS_HIGH = UART_HW_IFACE_OFFS_WRITE+3 .equ UART_HW_IFACE_OFFS_WRITEBUFUSED = UART_HW_IFACE_OFFS_WRITE+4 .equ UART_HW_IFACE_OFFS_WRITEBUFLEFT = UART_HW_IFACE_OFFS_WRITE+5 .equ UART_HW_IFACE_SIZE = UART_HW_IFACE_OFFS_WRITEBUFLEFT+1