; ***************************************************************************
; copyright   : (C) 2026 by Martin Preuss
; email       : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome".                              *
; * Please see toplevel file COPYING of that project for license details.   *
; ***************************************************************************


; ***************************************************************************
; Source file for base system node on AtTiny 84
;
; This is for the maintenance system (i.e. the flash loader).
;
; All definitions and changes should go into this file.
; ***************************************************************************

.equ clock=1000000 ; Define the clock frequency

.nolist
.include "include/tn84def.inc" ; Define device ATtiny84
.list

.include "version.asm"
.include "../defs.asm"

.include "common/calls.asm"
.include "common/utils_io.asm"
.include "common/utils_wait.asm"
.include "devices/all/defs.asm"


#define COM_ACCEPT_ALL_DEST



; ***************************************************************************
; defines

; ---------------------------------------------------------------------------
; generic




; ---------------------------------------------------------------------------
; firmware settings



; ---------------------------------------------------------------------------
; LED

.equ LED_DDR             = DDRA
.equ LED_PORT            = PORTA
.equ LED_PIN             = PINA
.equ LED_PINNUM          = PORTA3


; ***************************************************************************
; code segment

.cseg
.org 0x0000



; ---------------------------------------------------------------------------
; Reset and interrupt vectors
;  rjmp start ; Reset vector
  rjmp main ; Reset vector
  reti ; EXT_INT0
  reti ; PCI0
  reti ; PCI1
  reti ; WATCHDOG
  reti ; ICP1
  reti ; OC1A
  reti ; OC1B
  reti ; OVF1
  reti ; OC0A
  reti ; OC0B
  reti ; OVF0
  reti ; ACI
  reti ; ADCC
  reti ; ERDY
  reti ; USI_STR
  reti ; USI_OVF


devInfoBlock:        ; 12 bytes
devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
devInfoId:           .db DEVICEINFO_ID, 0
devInfoVersion:      .db DEVICEINFO_VERSION, DEVICEINFO_REVISION             ; version, revision
firmwareVersion:     .db FIRMWARE_VARIANT_BOOT, FIRMWARE_VERSION_MAJOR
                     .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL

firmwareStart:   rjmp main ; will be overwritten when flashing



; ***************************************************************************
; main code


.org BOOTLOADER_ADDR


main:
  rjmp bootLoader ; this routine is in modules/bootloader/main.asm



; ***************************************************************************
; includes

.include "common/utils_wait_fixed.asm"
.include "common/utils_copy_from_flash.asm"
.include "common/utils_copy_sdram.asm"

.include "modules/flash/defs.asm"
.include "modules/flash/eeprom.asm"
.include "modules/flash/io.asm"
.include "modules/flash/io_com2w.asm"
.include "modules/flash/flash1p.asm"
.include "modules/flash/flashxp.asm"
.include "modules/flash/flashprocess.asm"
.include "modules/flash/wait.asm"
.include "modules/bootloader/main.asm"
.include "modules/network/msg/defs.asm"
.include "modules/network/msg/crc.asm"

;.include "common/debug.asm"



systemSetSpeed:
.if clock == 8000000
  ldi r16, (1<<CLKPCE)
  ldi r17, 0
  out CLKPR, r16
  out CLKPR, r17
.endif

.if clock == 1000000
  ldi r16, (1<<CLKPCE)
  ldi r17, (1<<CLKPS1) | (1<<CLKPS0)
  out CLKPR, r16
  out CLKPR, r17
.endif
  ret