; ***************************************************************************
; copyright   : (C) 2024 by Martin Preuss
; email       : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome".                              *
; * Please see toplevel file COPYING of that project for license details.   *
; ***************************************************************************




; ***************************************************************************
; Source file for temperature sensor node on AtTiny 84
;
; This is for the full system (i.e. not the boot loader).
;
; All definitions and changes should go into this file.
;
;
; ***************************************************************************


; .equ clock=1000000 ; Define the clock frequency
.equ clock=8000000 ; Define the clock frequency



.nolist
.include "include/tn84def.inc" ; Define device ATtiny84
.list

.include "defs_all.asm"
.include "./defs.asm"



; ***************************************************************************
; defines

; ---------------------------------------------------------------------------
; generic


.include "common/utils_wait.asm"


; ---------------------------------------------------------------------------
; firmware settings including list of modules used

.equ FIRMWARE_VERSION_MAJOR       = 0
.equ FIRMWARE_VERSION_MINOR       = 0
.equ FIRMWARE_VERSION_PATCHLEVEL  = 1




; ***************************************************************************
; code segment

.cseg
.org 000000



; ---------------------------------------------------------------------------
; Reset and interrupt vectors (will be removed as soon as we can flash data over COM)

;	rjmp main ; Reset vector
        rjmp BOOTLOADER_ADDR ; Reset vector  ; use this for flashed system
	reti ; EXT_INT0
	reti ; PCI0
	reti ; PCI1
	reti ; WATCHDOG
	reti ; ICP1
	reti ; OC1A
	reti ; OC1B
	reti ; OVF1
        rjmp uartIrqIsrOC0A ; OC0A
	reti ; OC0B
	reti ; OVF0
	reti ; ACI
        reti ; ADCC
	reti ; ERDY
	reti ; USI_STR
	reti ; USI_OVF


devInfoBlock:        ; 12 bytes
devInfoManufacturer: .db 'A', 'Q', 'U', 'A'
devInfoId:           .db 'X', 0
devInfoVersion:      .db 3, 0                 ; version, revision
firmwareVersion:     .db FIRMWARE_VARIANT_ROUTER, FIRMWARE_VERSION_MAJOR
                     .db FIRMWARE_VERSION_MINOR, FIRMWARE_VERSION_PATCHLEVEL

firmwareStart:   rjmp main


; ***************************************************************************
; includes

.include "common/utils.asm"
.include "common/utils_wait_fixed.asm"
;.include "common/utils_copy_from_flash.asm"
;.include "common/utils_copy_sdram.asm"
.include "common/crc8.asm"

#include "modules/uart_irq/defs.asm"
#include "modules/uart_irq/iface.asm"
#include "modules/uart_irq/iface1.asm"
#include "modules/uart_irq/iface2.asm"


; ***************************************************************************
; data in SRAM

.dseg

programRamBegin:
ledTimer: .byte 1
programRamEnd:



; ***************************************************************************
; data in FLASH

.cseg


main:
  ldi xh, HIGH(programRamBegin)
  ldi xl, LOW(programRamBegin)
  clr r16
  ldi r17, (programRamEnd-programRamBegin)
  rcall Utils_FillSram
  rcall init
  sbi LED_SIMPLE_DDR, LED_SIMPLE_PINNUM  ; out
  cbi LED_SIMPLE_PORT, LED_SIMPLE_PINNUM ; on
  clr r16
  sts ledTimer, r16
  sei
main_loop:
;    rcall writeTestByteToIface2
;    rcall copyFromIface1To2
;    brcc main_sleep
;    rjmp main_loop
    
main_sleep:
    ; only modify SE, SM1 and SM0
    cli
    in r16, MCUCR
    ldi r17, (1<<SE) | (1<<SM1) | (1<<SM0)
    neg r17
    and r16, r17
    ori r16, (1<<SE)           ; sleep mode "idle", enable
    out MCUCR, r16
    sei                        ; make sure interrupts really are enabled
    sleep                      ; sleep, wait for interrupt
    lds r16, ledTimer
    dec r16
    sts ledTimer, r16
    brne main_loop
    sbi LED_SIMPLE_PORTIN, LED_SIMPLE_PINNUM  ; toggle
    rcall writeTestByteToIface2
  rjmp main_loop



init:
  rcall systemSetSpeed
  rcall Utils_Init
  rcall UART_Irq_InitIface1
  rcall UART_Irq_InitIface2
  rcall uart_irq_timer_init
  ret


copyFromIface1To2:
  ldi yl, LOW(uartIrqDataIface1)
  ldi yh, HIGH(uartIrqDataIface1)
  rcall uart_irq_rdbuf_readbyte
  brcs copyFromIface1To2_gotOne
  ret
copyFromIface1To2_gotOne:
  ldi yl, LOW(uartIrqDataIface2)
  ldi yh, HIGH(uartIrqDataIface2)
  rcall uart_irq_wrbuf_writebyte
  sec
  ret


writeTestByteToIface2:
  ldi yl, LOW(uartIrqDataIface2)
  ldi yh, HIGH(uartIrqDataIface2)
  ldi r16, 0x55
  rjmp uart_irq_wrbuf_writebyte



systemSetSpeed:
;.if clock == 8000000
  ldi r16, (1<<CLKPCE)
  ldi r17, 0
  out CLKPR, r16
  out CLKPR, r17
;.endif
  ret


systemSetBootSpeed:
.if clock == 8000000
  ldi r16, (1<<CLKPCE)
  ldi r17, (1<<CLKPS1) | (1<<CLKPS0)
  out CLKPR, r16
  out CLKPR, r17
.endif
  ret