; *************************************************************************** ; copyright : (C) 2025 by Martin Preuss ; email : martin@libchipcard.de ; ; *************************************************************************** ; * This file is part of the project "AqHome". * ; * Please see toplevel file COPYING of that project for license details. * ; *************************************************************************** .cseg ; --------------------------------------------------------------------------- ; @routine UART_HW_Init @global ; ; Initializes buffers. ; ; @clobbers R16, R17, X, Y UART_HW_Init: ldi xh, HIGH(uartHwDataBegin) ldi xl, LOW(uartHwDataBegin) clr r16 ldi r17, (uartHwDataEnd-uartHwDataBegin) rcall Utils_FillSram rcall UART_HW_FixedBuffers_Init ldi r16, UART_HW_MSGNUMINBUF_SIZE ldi yl, LOW(uartHw_ringBufferMsgNumIn) ldi yh, HIGH(uartHw_ringBufferMsgNumIn) rcall RingBufferY_Init ldi r16, UART_HW_MSGNUMOUTBUF_SIZE ldi yl, LOW(uartHw_ringBufferMsgNumOut) ldi yh, HIGH(uartHw_ringBufferMsgNumOut) rcall RingBufferY_Init sec ret ; @end ; --------------------------------------------------------------------------- ; @routine UART_HW_InterfaceInit @global ; ; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE) ; @clobbers R16, R17, X UART_HW_InterfaceInit: mov xl, yl mov xh, yh ldi r17, UART_HW_IFACE_SIZE clr r16 rcall Utils_FillSram ; (R17, X) ldi r16, 0xff std Y+UART_HW_IFACE_OFFS_READBUFNUM, r16 std Y+UART_HW_IFACE_OFFS_WRITEBUFNUM, r16 ldi r16, UART_HW_READMODE_OFF std Y+UART_HW_IFACE_OFFS_READMODE, r16 ldi r16, UART_HW_WRITEMODE_IDLE std Y+UART_HW_IFACE_OFFS_WRITEMODE, r16 ret ; @end ; --------------------------------------------------------------------------- ; @routine UART_HW_Interface_SetReadBuffer @global ; ; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE) ; @param r16 read buffer number ; @param X read buffer pos ; @clobbers R17 UART_HW_Interface_SetReadBuffer: std Y+UART_HW_IFACE_OFFS_READBUFNUM, r16 adiw xh:xl, 1 std Y+UART_HW_IFACE_OFFS_READBUFPOSLOW, xl std Y+UART_HW_IFACE_OFFS_READBUFPOSHIGH, xh sbiw xh:xl, 1 clr r17 std Y+UART_HW_IFACE_OFFS_READBUFUSED, r17 std Y+UART_HW_IFACE_OFFS_READBUFLEFT, r17 ret ; @end ; --------------------------------------------------------------------------- ; @routine UART_HW_Interface_SetWriteBuffer @global ; ; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE) ; @param r16 write buffer number ; @param X write buffer pos ; @clobbers r17 UART_HW_Interface_SetWriteBuffer: std Y+UART_HW_IFACE_OFFS_WRITEBUFNUM, r16 adiw xh:xl, 1 std Y+UART_HW_IFACE_OFFS_WRITEBUFPOSLOW, xl ; begin of msg (dest addr byte) std Y+UART_HW_IFACE_OFFS_WRITEBUFPOSHIGH, xh adiw xh:xl, 1 ld r17, X ; payload length byte sbiw xh:xl, 2 ; back to start of buffer inc r17 inc r17 inc r17 std Y+UART_HW_IFACE_OFFS_WRITEBUFUSED, r17 std Y+UART_HW_IFACE_OFFS_WRITEBUFLEFT, r17 ret ; @end