; *************************************************************************** ; copyright : (C) 2025 by Martin Preuss ; email : martin@libchipcard.de ; ; *************************************************************************** ; * This file is part of the project "AqHome". * ; * Please see toplevel file COPYING of that project for license details. * ; *************************************************************************** .equ TTYONUART1_SKIPTIME = 2 .equ TTYONUART1_IFACENUM = 2 .dseg ttyOnUart1_iface: .byte UART_HW_IFACE_SIZE .cseg ; --------------------------------------------------------------------------- ; @routine TtyOnUart1_Init @global ; ; @clobbers Y (R16, R17, X) TtyOnUart1_Init: ldi yl, LOW(ttyOnUart1_iface) ldi yh, HIGH(ttyOnUart1_iface) rcall UART_HW_Uart1_Init ; (R16, R17, X) ldi r16, TTYONUART1_IFACENUM std Y+UART_HW_IFACE_OFFS_IFACENUM, r16 ldi r16, UART_HW_MODE_IDLE | UART_HW_MODE_W_IDLE ; start in full idle mode std Y+UART_HW_IFACE_OFFS_MODE, r16 ret ; @end ; --------------------------------------------------------------------------- ; @routine TtyOnUart1_Periodically @global ; ; @clobbers R16, Y TtyOnUart1_Periodically: ldi yl, LOW(ttyOnUart1_iface) ldi yh, HIGH(ttyOnUart1_iface) ldd r16, Y+UART_HW_IFACE_OFFS_READTIMER inc r16 breq TtyOnUart1_Periodically_l1 std Y+UART_HW_IFACE_OFFS_READTIMER, r16 TtyOnUart1_Periodically_l1: ldd r16, Y+UART_HW_IFACE_OFFS_WRITETIMER inc r16 breq TtyOnUart1_Periodically_l2 std Y+UART_HW_IFACE_OFFS_WRITETIMER, r16 TtyOnUart1_Periodically_l2: ret ; @end ; --------------------------------------------------------------------------- ; @routine TtyOnUart1_RxCharIsr @global @isr ; ; @clobbers none TtyOnUart1_RxCharIsr: push r15 in r15, SREG push r16 push r17 push r18 push xl push xh push yl push yh ldi yl, LOW(ttyOnUart1_iface) ldi yh, HIGH(ttyOnUart1_iface) rcall UART_HW_Uart1_RxCharIsr ; (R16, R17, R18, X) pop yh pop yl pop xh pop xl pop r18 pop r17 pop r16 out SREG, r15 pop r15 reti ; @end ; --------------------------------------------------------------------------- ; @routine TtyOnUart1_TxUdreIsr @global @isr ; ; @clobbers none TtyOnUart1_TxUdreIsr: push r15 in r15, SREG push r16 push r17 push r18 push xl push xh push yl push yh ldi yl, LOW(ttyOnUart1_iface) ldi yh, HIGH(ttyOnUart1_iface) rcall UART_HW_Uart1_TxUdreIsr ; (R16, R17, R18, X) pop yh pop yl pop xh pop xl pop r18 pop r17 pop r16 out SREG, r15 pop r15 reti ; @end ; --------------------------------------------------------------------------- ; @routine TtyOnUart1_TxCharIsr @global @isr ; ; @clobbers none TtyOnUart1_TxCharIsr: push r15 in r15, SREG push r16 push r17 push r18 push xl push xh push yl push yh ldi yl, LOW(ttyOnUart1_iface) ldi yh, HIGH(ttyOnUart1_iface) rcall UART_HW_Uart1_TxCharIsr ; (R16, R17, R18, X) pop yh pop yl pop xh pop xl pop r18 pop r17 pop r16 out SREG, r15 pop r15 reti ; @end ; --------------------------------------------------------------------------- ; @routine TtyOnUart1_Run @global ; ; @clobbers all TtyOnUart1_Run: ldi yl, LOW(ttyOnUart1_iface) ldi yh, HIGH(ttyOnUart1_iface) rcall ttyOnUart1RunWriteModes rcall ttyOnUart1RunReadModes ret ; @end ; --------------------------------------------------------------------------- ; @routine ttyOnUart1RunWriteModes ; ; @clobbers all, !Y ttyOnUart1RunWriteModes: ldd r16, Y+UART_HW_IFACE_OFFS_MODE ; handle write functions cbr r16, UART_HW_MODE_READMASK cpi r16, UART_HW_MODE_W_IDLE breq ttyOnUart1RunWIdle cpi r16, UART_HW_MODE_WRITING breq ttyOnUart1RunWriting cpi r16, UART_HW_MODE_WAITBUFFEREMPTY breq ttyOnUart1RunWaitBufferEmpty cpi r16, UART_HW_MODE_WRITEBUFFEREMPTY breq ttyOnUart1RunWriteBufferEmpty ret ; @end ; --------------------------------------------------------------------------- ; @routine ttyOnUart1RunWIdle ; ; @clobbers all, !Y ttyOnUart1RunWIdle: rcall UART_HW_InterfaceGetNextOutgoingMsgNum ; (R17, R18, X) brcc ttyOnUart1RunWIdle_end rcall UART_HW_Interface_WriteSetBuffer ; (r16, r19, X) ldd r16, Y+UART_HW_IFACE_OFFS_MODE cbr r16, UART_HW_MODE_WRITEMASK ori r16, UART_HW_MODE_WRITING std Y+UART_HW_IFACE_OFFS_MODE, r16 rcall ttyOnUart1RunWriting ; fill ringbuffer rcall UART_HW_Uart1_StartTx ; enable transceiver and interrupts ttyOnUart1RunWIdle_end: ret ; @end ; --------------------------------------------------------------------------- ; @routine ttyOnUart1RunWriting ; ; @clobbers all, !Y ttyOnUart1RunWriting: rjmp UART_HW_Interface_RunWriting ; (R16, R17, R18, R19, R20, R21, X) ; @end ; --------------------------------------------------------------------------- ; @routine ttyOnUart1RunWaitBufferEmpty ; ; @clobbers all, !Y ttyOnUart1RunWaitBufferEmpty: ldd r16, Y+UART_HW_IFACE_OFFS_STATUS sbrs r16, UART_HW_STATUS_UNDERRUN_BIT ; underrun bit set? ret ; return if bit still clear cbr r16, (1<