; ***************************************************************************
; copyright   : (C) 2025 by Martin Preuss
; email       : martin@libchipcard.de
;
; ***************************************************************************
; * This file is part of the project "AqHome".                              *
; * Please see toplevel file COPYING of that project for license details.   *
; ***************************************************************************


.equ TTYONUART1_SKIPTIME = 2
.equ TTYONUART1_IFACENUM = 2


.dseg

ttyOnUart1_iface: .byte UART_HW_IFACE_SIZE



.cseg


; ---------------------------------------------------------------------------
; @routine TtyOnUart1_Init @global
;
; @clobbers Y (R16, R17, X)

TtyOnUart1_Init:
  ldi yl, LOW(ttyOnUart1_iface)
  ldi yh, HIGH(ttyOnUart1_iface)
  rcall UART_HW_InterfaceInit ; (R16, R17, X)
  rcall UART_HW_Uart1_Init    ; (R16, R17, X)
  ldi r16, TTYONUART1_IFACENUM
  std Y+UART_HW_IFACE_OFFS_IFACENUM, r16
  ret
; @end



; ---------------------------------------------------------------------------
; @routine TtyOnUart1_Periodically @global
;
; @clobbers R16, Y

TtyOnUart1_Periodically:
  ldi yl, LOW(ttyOnUart1_iface)
  ldi yh, HIGH(ttyOnUart1_iface)
  
  ldd r16, Y+UART_HW_IFACE_OFFS_READTIMER
  inc r16
  breq TtyOnUart1_Periodically_l1
  std Y+UART_HW_IFACE_OFFS_READTIMER, r16
TtyOnUart1_Periodically_l1:
  ldd r16, Y+UART_HW_IFACE_OFFS_WRITETIMER
  inc r16
  breq TtyOnUart1_Periodically_l2
  std Y+UART_HW_IFACE_OFFS_WRITETIMER, r16
TtyOnUart1_Periodically_l2:
  ret
; @end



; ---------------------------------------------------------------------------
; @routine TtyOnUart1_RxCharIsr @global @isr
;
; @clobbers none

TtyOnUart1_RxCharIsr:
  push r15
    in r15, SREG
    push r16
      push r17
        push r18
          push xl
            push xh
              push yl
                push yh
                  ldi yl, LOW(ttyOnUart1_iface)
                  ldi yh, HIGH(ttyOnUart1_iface)
                  rcall UART_HW_Uart1_RxCharIsr ; (R16, R17, R18, X)
                pop yh
              pop yl
            pop xh
          pop xl
        pop r18
      pop r17
    pop r16
    out SREG, r15
  pop r15
  reti
; @end



; ---------------------------------------------------------------------------
; @routine TtyOnUart1_TxUdreIsr @global @isr
;
; @clobbers none

TtyOnUart1_TxUdreIsr:
  push r15
    in r15, SREG
    push r16
      push r17
        push xl
          push xh
            push yl
              push yh
                ldi yl, LOW(ttyOnUart1_iface)
                ldi yh, HIGH(ttyOnUart1_iface)
                rcall UART_HW_Uart1_TxUdreIsr  ; (R16, R17, X)
              pop yh
            pop yl
          pop xh
        pop xl
      pop r17
    pop r16
    out SREG, r15
  pop r15
  reti
; @end



; ---------------------------------------------------------------------------
; @routine TtyOnUart1_TxCharIsr @global @isr
;
; @clobbers none

TtyOnUart1_TxCharIsr:
  push r15
    in r15, SREG
    push r16
      push r17
        push r18
          push xl
            push xh
              push yl
                push yh
                  ldi yl, LOW(ttyOnUart1_iface)
                  ldi yh, HIGH(ttyOnUart1_iface)
                  rcall UART_HW_Uart1_TxCharIsr ; (R16, R17, R18, X)
                pop yh
              pop yl
            pop xh
          pop xl
        pop r18
      pop r17
    pop r16
    out SREG, r15
  pop r15
  reti
; @end



; ---------------------------------------------------------------------------
; @routine TtyOnUart1_SendBuffer @global
;
; @clobbers R17

TtyOnUart1_SendBuffer:
  push r15
    in r15, SREG
    cli
    ldd r17, Y+UART_HW_IFACE_OFFS_WRITEMODE
    cpi r17, UART_HW_WRITEMODE_IDLE
    breq TtyOnUart1_SendBuffer_setBuffer
    out SREG, r15
  pop r15
  clc
  ret
TtyOnUart1_SendBuffer_setBuffer:
    rcall UART_HW_Interface_SetWriteBuffer    ; (R17)
    ldi r17, UART_HW_WRITEMODE_WRITING
    std Y+UART_HW_IFACE_OFFS_WRITEMODE, r17
    rcall UART_HW_Uart1_StartTx               ; (R16)
  pop r15
  out SREG, r15
  sec
  ret
; @end



; ---------------------------------------------------------------------------
; @routine TtyOnUart1_Run @global
;
; @clobbers all

TtyOnUart1_Run:
  push r15
    in r15, SREG
    cli
    ldi yl, LOW(ttyOnUart1_iface)
    ldi yh, HIGH(ttyOnUart1_iface)
  
    rcall ttyOnUart1RunWriteModes
;  rcall ttyOnUart1RunReadModes
  pop r15
  out SREG, r15
  ret
; @end



; ---------------------------------------------------------------------------
; @routine ttyOnUart1RunWriteModes
;
; @clobbers all, !Y

ttyOnUart1RunWriteModes:
  ldd r16, Y+UART_HW_IFACE_OFFS_WRITEMODE   ; handle write functions
  cpi r16, UART_HW_WRITEMODE_WRITING
  breq ttyOnUart1RunWriting
  cpi r16, UART_HW_WRITEMODE_WAITBUFFEREMPTY
  breq ttyOnUart1RunWaitBufferEmpty
  cpi r16, UART_HW_WRITEMODE_WRITEBUFFEREMPTY
  breq ttyOnUart1RunWriteBufferEmpty
  ret
; @end



; ---------------------------------------------------------------------------
; @routine ttyOnUart1RunWriting
;
; @clobbers

ttyOnUart1RunWriting:
  ; TODO: check for timeout etc.
  ret
; @end



; ---------------------------------------------------------------------------
; @routine ttyOnUart1RunWaitBufferEmpty
;
; @clobbers none

ttyOnUart1RunWaitBufferEmpty:
  ; TODO: check for timeout etc.
  ret
; @end



; ---------------------------------------------------------------------------
; @routine ttyOnUart1RunWriteBufferEmpty
;
; @clobbers R16, R17, X

ttyOnUart1RunWriteBufferEmpty:
  ldd r16, Y+UART_HW_IFACE_OFFS_WRITEBUFNUM
  ldi r17, 0xff
  cp r16, r17
  breq ttyOnUart1RunWriteBufferEmpty_setIdle
  std Y+UART_HW_IFACE_OFFS_WRITEBUFNUM, r17
  rcall UART_HW_FixedBuffers_ReleaseByNum     ; (R16, X)
ttyOnUart1RunWriteBufferEmpty_setIdle:
  rcall UART_HW_Uart1_StopTx                  ; disable transceiver and interrupts (R16)
  ldi r16, UART_HW_WRITEMODE_IDLE
  std Y+UART_HW_IFACE_OFFS_WRITEMODE, r16
  ret
; @end



; ---------------------------------------------------------------------------
; @routine ttyOnUart1RunReadModes
;
; @clobbers all, !Y

ttyOnUart1RunReadModes:
  ret
; @end