uart_hw2: basically works, but skips messages.
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@@ -27,6 +27,9 @@ comOnUart1_iface: .byte UART_HW2_IFACE_SIZE
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; @clobbers R16, R17, Y (X)
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ComOnUart1_Init:
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rcall comOnUart1StopRx
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rcall comOnUart1StopTx
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ldi yl, LOW(comOnUart1_iface)
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ldi yh, HIGH(comOnUart1_iface)
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rcall NET_Interface_Init ; (R16, R17, X)
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@@ -36,13 +39,23 @@ ComOnUart1_Init:
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std Y+UART_HW2_IFACE_OFFS_MODE, r16
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clr r16
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std Y+NET_IFACE_OFFS_IFACENUM, r16
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rcall comOnUart1SetAttnInput
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sbi COM_IRQ_ADDR_ATTN1, COM_IRQ_BIT_ATTN1 ; enable pin change irq for ATTN line
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inr r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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.ifdef COM_ATTN1_PUE
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inr r16, COM_ATTN1_PUE
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cbr r16, (1<<COM_ATTN1_PIN)
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outr COM_ATTN1_PUE, r16
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.endif
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inr r16, COM_IRQ_ADDR_ATTN1
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sbr r16, (1<<COM_IRQ_BIT_ATTN1) ; enable pin change irq for ATTN line
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outr COM_IRQ_ADDR_ATTN1, r16
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inr r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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sbr r16, (1<<COM_IRQ_GIMSK_ATTN1)
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outr GIMSK, r16
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ldi r16, (1<<COM_IRQ_GIFR_ATTN1) ; clear pending irq by writing 1 to ATTN bit
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ldi r16, (1<<COM_IRQ_GIFR_ATTN1) ; clear pending irq by writing 1 to ATTN bit
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outr GIFR, r16
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; set baudrate
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@@ -210,6 +223,14 @@ comOnUart1StartWriting_end:
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; @clobbers all
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ComOnUart1_Run:
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push r15
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inr r15, SREG
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cli
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rcall ComOnUart1_Run_noirq
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outr SREG, r15
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pop r15
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ret
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ComOnUart1_Run_noirq:
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ldi yl, LOW(comOnUart1_iface)
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ldi yh, HIGH(comOnUart1_iface)
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
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@@ -323,7 +344,7 @@ comOnUart1RunMsgReceived:
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brcc comOnUart1RunMsgReceived_enobuf
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mov r18, r16 ; buffer num
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rcall NET_Interface_SetIfaceNumInBuffer ; (R16, R17)
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adiw xh:xl, 1
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adiw xh:xl, 1 ; skip buffer header
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ldd r17, Y+UART_HW2_IFACE_OFFS_BUFUSED ; always is at least 2 here
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comOnUart1RunMsgReceived_copyLoop:
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ld r16, Z+
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@@ -396,7 +417,7 @@ comOnUart1RunMsgSent:
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ldi r16, UART_HW2_MODE_IDLE
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rcall comOnUart1SetMode ; (R17)
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rcall comOnUart1SetAttnInput ; release ATTN (none)
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rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least for a short period high (R22)
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rcall Utils_WaitFor10MicroSecs ; make sure ATTN is at least high for a short period (R22)
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ret
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; @end
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@@ -463,11 +484,11 @@ comOnUart1StopRx:
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; @clobbers R16
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comOnUart1StartTx:
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lds r16, UCSR1A
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inr r16, UCSR1A
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cbr r16, (1<<TXC1) ; clear TXCn interrupt
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outr UCSR1A, r16
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inr r16, UCSR1B
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sbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; enable TX UDRE and TXC1 interrupt, enable transceive
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sbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; enable TX UDRE and TXC0 interrupt, enable transceive
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outr UCSR1B, r16
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ret
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; @end
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@@ -481,7 +502,7 @@ comOnUart1StartTx:
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comOnUart1StopTx:
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inr r16, UCSR1B
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cbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; disable TX UDRE and TXC1 interrupt, enable transceive
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cbr r16, (1<<UDRIE1) | (1<<TXCIE1) | (1<<TXEN1) ; disable TX UDRE and TXC0 interrupt, enable transceive
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outr UCSR1B, r16
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ret
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; @end
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@@ -499,7 +520,7 @@ comOnUart1StopTx:
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comOnUart1SetAttnInput:
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cbi COM_ATTN1_DDR, COM_ATTN1_PIN ; set ATTN as input
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.ifdef COM_ATTN1_PUE
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; cbi COM_ATTN1_PUE, COM_ATTN_PIN ; disable pullup on ATTN
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; cbi COM_ATTN1_PUE, COM_ATTN_PIN ; disable pullup on ATTN
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.else
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cbi COM_ATTN1_OUTPUT, COM_ATTN1_PIN ; disable pullup on ATTN
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.endif
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@@ -636,7 +657,7 @@ ComOnUart1_TxCharIsr:
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; @clobbers none
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ComOnUart1AttnChangeIsr:
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ComOnUart1_AttnChangeIsr:
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push r15
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in r15, SREG
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rcall ComOnUart1_HandleAttnChange
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@@ -680,19 +701,19 @@ ComOnUart1_HandleAttnChange:
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; @clobbers R16 (R17, X)
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comOnUart1ActOnAttn:
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
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rcall comOnUart1IsAttnLow ; (none)
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brcc comOnUart1ActOnAttn_attnHigh
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; ATTN low
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ldd r16, Y+UART_HW2_IFACE_OFFS_MODE
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cpi r16, UART_HW2_MODE_IDLE
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brne comOnUart1ActOnAttn_end ; not idle
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rcall comOnUart1StartReading ; (R16, R17, X)
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rjmp comOnUart1ActOnAttn_end
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; ATTN high
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comOnUart1ActOnAttn_attnHigh:
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cpi r16, UART_HW2_MODE_SKIPPING
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cpi r16, UART_HW2_MODE_SKIPPING
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brne comOnUart1ActOnAttn_end
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ldi r16, UART_HW2_MODE_IDLE
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ldi r16, UART_HW2_MODE_IDLE ; leave skipping mode
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rcall comOnUart1SetMode ; (R17)
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comOnUart1ActOnAttn_end:
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ret
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@@ -723,7 +744,7 @@ comOnUart1RxCharIsr:
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; store char
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ldd xl, Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW
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ldd xh, Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH
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st X+, r16
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st X+, r16 ; last byte written
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_LOW, xl
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
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; handle counters
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@@ -792,7 +813,7 @@ comOnUart1TxUdreIsr:
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std Y+UART_HW2_IFACE_OFFS_BUFPOS_HIGH, xh
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; send byte
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outr UDR1, r16 ; send byte
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; decrease counter
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; decreased counter
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dec r17
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std Y+UART_HW2_IFACE_OFFS_BUFLEFT, r17
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brne comOnUart1TxUdreIsr_end ; still bytes left to send, jump
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@@ -813,7 +834,7 @@ comOnUart1TxUdreIsr_end:
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; ---------------------------------------------------------------------------
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; @routine comOnUart1TxCharIsr @global
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;
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; Handler for TXC1 interrupt called when the last byte has been completely sent and
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; Handler for TXC0 interrupt called when the last byte has been completely sent and
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; the data register is empty.
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;
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; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
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