From eecb022a0ca75f275842b1b2ab76c50e6d61814b Mon Sep 17 00:00:00 2001
From: Martin Preuss <martin@aquamaniac.de>
Date: Mon, 5 May 2025 21:05:07 +0200
Subject: [PATCH] avr/modules/flash: make protocol more robust

- wait for ATTN high after error receiving a packet
- use different wait times when waiting for FLASH_START and FLASH_DATA
---
 avr/modules/flash/defs.asm         | 3 ++-
 avr/modules/flash/flashprocess.asm | 8 +++++---
 avr/modules/flash/io.asm           | 2 +-
 avr/modules/flash/io_bitbang.asm   | 5 +++++
 4 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/avr/modules/flash/defs.asm b/avr/modules/flash/defs.asm
index ffc904f..d56a463 100644
--- a/avr/modules/flash/defs.asm
+++ b/avr/modules/flash/defs.asm
@@ -29,5 +29,6 @@
 
 .equ FLASH_PACKET_START_OFFS_UID    = FLASH_MSG_OFFS_PAYLOAD+0 ; 4 bytes
 
-
+.equ FLASH_WAITFORDATA_TRIES        = 30
+.equ FLASH_WAITFORSTART_TRIES       = 5
 
diff --git a/avr/modules/flash/flashprocess.asm b/avr/modules/flash/flashprocess.asm
index b847451..c20a358 100644
--- a/avr/modules/flash/flashprocess.asm
+++ b/avr/modules/flash/flashprocess.asm
@@ -48,6 +48,7 @@ checkFlash:
   rcall ioRawSendMsg                   ; (r16, r17, X)
 
   ldi r16, NETMSG_CMD_FLASH_START
+  ldi r20, FLASH_WAITFORSTART_TRIES
   rcall ioWaitForGivenMsg              ; (r16, r17, r18, r19, r20, r22, X)
   brcc checkFlash_end
   
@@ -59,8 +60,8 @@ checkFlash:
   ldi xl, LOW(flashRecvBuffer)
   ldi xh, HIGH(flashRecvBuffer)
   rcall flashProcessHandleFlashStart
-  brcc checkFlash_end
-  sec
+;  brcc checkFlash_end
+;  sec
 checkFlash_end:
   ret
 ; @end
@@ -80,6 +81,7 @@ flashProcess:
 flashProcess_loop1:
     ; wait up to 10s for incoming FLASH_DATA message
     ldi r16, NETMSG_CMD_FLASH_DATA
+    ldi r20, FLASH_WAITFORDATA_TRIES
     rcall ioWaitForGivenMsg            ; (r16, r17, r18, r19, r20, r22, X)
     brcc flashProcess_end              ; no FLASH_DATA or FLASH_END msg
     ; either FLASH_DATA or FLASH_END received
@@ -186,7 +188,7 @@ flashProcessHandleFlashData_sendResponse:
   pop r16
 #endif
 
-  ldi r24, 50
+  ldi r24, 25
   rcall flashWaitForMillisecs                ; (R22, R24)
   rcall flashProcessSendFlashResponse        ; (R16, R17, R18, R19, R20, X)
   sbi LED_PIN, LED_PINNUM                    ; toggle
diff --git a/avr/modules/flash/io.asm b/avr/modules/flash/io.asm
index dae9c22..a0fd731 100644
--- a/avr/modules/flash/io.asm
+++ b/avr/modules/flash/io.asm
@@ -22,10 +22,10 @@
 ; @return CFLAG set if okay (packet received), cleared on error
 ; @return r16 code of received msg
 ; @param  r16 command to wait for
+; @param  r20 number of tries (low number when waiting for FLASH_START, higher when waiting for FLASH_DATA)
 ; @clobbers: r16, r17, r20, X (r18, r19, r22)
 
 ioWaitForGivenMsg:
-    ldi r20, 10                      ; number of tries
 ioWaitForGivenMsg_loop:
     push r16
       push r20
diff --git a/avr/modules/flash/io_bitbang.asm b/avr/modules/flash/io_bitbang.asm
index a69b6fb..48b42e7 100644
--- a/avr/modules/flash/io_bitbang.asm
+++ b/avr/modules/flash/io_bitbang.asm
@@ -135,6 +135,11 @@ ioRawWaitForValidMsg_attnLow:
   ldi r17, FLASH_RECVBUFFER_MAXLEN-3
   rcall ioRawReceivePacketIntoBuffer
   brcs ioRawWaitForValidMsg_packetReceived
+  ; wait until ATTN is high (up to 10s)
+  ldi r16, 0xff                         ; expect ATTN high
+  ldi r17, 100
+  rcall ioWaitForAttnState100ms         ; wait for up to 10s
+  clc
   ret
 ioRawWaitForValidMsg_packetReceived:
   ldi r16, 0xff                         ; expect ATTN high