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avr: fixed a few errors in new uart_bitbang module.

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This commit is contained in:
Martin Preuss
2024-10-20 23:35:26 +02:00
parent 89019f1e60
commit e232b4adbf
4 changed files with 11 additions and 10 deletions
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12
avr/modules/uart_bitbang/bytelevel.asm
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@@ -96,7 +96,7 @@ uartBitbang_SendByte_setHigh:
cbi COM_TXD_DDR, COM_TXD_PIN ; +2 set DATA as input, pullup R makes it ONE
nop ; +1 (to make pin change available)
Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 0, r22 ; wait for half a bit length for line to safely settle
sbis COM_RXD_DATA, COM_RXD_PIN ; +1 if no skip, +2 if skipped
sbis COM_RXD_INPUT, COM_RXD_PIN ; +1 if no skip, +2 if skipped
rjmp uartBitbang_SendByte_error ; +2 if error (collision: we wanted line to be high but it is low)
Utils_WaitNanoSecs COM_HALFBIT_LENGTH, 11, r22
uartBitbang_SendByte_loopEnd:
@@ -126,6 +126,8 @@ uartBitbang_SendByte_error:
; @clobbers R16, R20, R21, R22 (R17)
uartBitbang_ReceiveByte:
cbi COM_RXD_OUTPUT, COM_RXD_PIN ; disable internal pullup for RXD
cbi COM_RXD_DDR, COM_RXD_PIN ; set RXD port as input
ldi r21, 8 ; bits left
clr r20 ; byte currently receiving
; wait for startbit
@@ -135,8 +137,8 @@ uartBitbang_ReceiveByte:
uartBitbang_ReceiveByte_loop:
Utils_WaitNanoSecs COM_BIT_LENGTH, 8, r22 ; 8 cycles used in the complete loop between waits
sec ; +1
sbic COM_RXD_DATA, COM_RXD_PIN ; LOW: +2, HIGH: +1
rjmp uartBitbang_ReceiveByte_shiftIn ; HIGH: +2, rjmp, use set CFLAG
sbic COM_RXD_INPUT, COM_RXD_PIN ; LOW: +2, HIGH: +1
rjmp uartBitbang_ReceiveByte_shiftIn ; HIGH: +2, rjmp, use set CFLAG
clc ; LOW: +1
uartBitbang_ReceiveByte_shiftIn:
ror r20 ; +1
@@ -162,7 +164,7 @@ uartBitbang_ReceiveByte_error:
; @clobbers R17, R22
uartBitbang_WaitForDataLow:
UART_BB_M_WAIT_FOR_PIN_LOW COM_RXD_DATA, COM_RXD_PIN
UART_BB_M_WAIT_FOR_PIN_LOW COM_RXD_INPUT, COM_RXD_PIN
ret
; @end
@@ -176,7 +178,7 @@ uartBitbang_WaitForDataLow:
; @clobbers R17, R22
uartBitbang_WaitForDataHigh:
UART_BB_M_WAIT_FOR_PIN_LOW COM_RXD_DATA, COM_RXD_PIN
UART_BB_M_WAIT_FOR_PIN_HIGH COM_RXD_INPUT, COM_RXD_PIN
ret
; @end