From df3f1595da14eee42029a5f9f52b239f559b4b64 Mon Sep 17 00:00:00 2001
From: Martin Preuss <martin@aquamaniac.de>
Date: Mon, 30 Jan 2023 01:01:19 +0100
Subject: [PATCH] bmp280: more work on module.

---
 avr/bmp280.asm | 43 +++++++++++++++++++++++++++++--------------
 1 file changed, 29 insertions(+), 14 deletions(-)

diff --git a/avr/bmp280.asm b/avr/bmp280.asm
index 4d63a77..80d5744 100644
--- a/avr/bmp280.asm
+++ b/avr/bmp280.asm
@@ -46,14 +46,7 @@ BMP280_Init:
 
   rcall bmp280ReadId
   brcc BMP280_Init_error
-  lds bmp280Id, r16    ; store id
-  push r16
-   rcall bmp280PrintDebug
-  pop r2           ; pop r16 into r2
-  ldi r16, 240
-  mov r1, r16
-  ldi r16, 0xff
-  rcall COM_EnqueueDebug
+  sts bmp280Id, r16    ; store id
   sec
   ret
 BMP280_Init_error:
@@ -87,33 +80,51 @@ BMP280_Fini:
 ; USED: R15, R16 (R17, R18, R22)
 
 bmp280ReadId:
+  ldi r16, 0xd0
+  rjmp bmp280ReadSingleReg
+
+
+
+; ---------------------------------------------------------------------------
+; bmp280ReadSingleReg
+;
+; IN:
+; - R16: register id
+; OUT:
+; - CFLAG: set if okay, clear on error
+; - R16  : register content
+; USED: R1, R15, R16 (R17, R18, R22)
+
+bmp280ReadSingleReg:
   in r15, SREG
   cli
+  mov r1, r16
   rcall twiStart               ; (R22)
   ldi r16, (BMP280_ADDR*2)     ; start in write mode
   rcall twiSendByteExpectAck   ; (R16, R17, R18, R22)
-  brcc bmp280ReadId_error
-  ldi r16, 0xd0                ; register "id"
+  brcc bmp280ReadSingleReg_error
+  mov r16, r1                  ; register num
   rcall twiSendByteExpectAck   ; (R16, R17, R18, R22)
-  brcc bmp280ReadId_error
+  brcc bmp280ReadSingleReg_error
   rcall twiRestart             ; (R22)
   ldi r16, (BMP280_ADDR*2)+1   ; restart in read mode
   rcall twiSendByteExpectAck   ; (R16, R17, R18, R22)
-  brcc bmp280ReadId_error
+  brcc bmp280ReadSingleReg_error
   
   rcall twiReceiveByteSendAck  ; read ID
-  brcc bmp280ReadId_error
+  brcc bmp280ReadSingleReg_error
   rcall twiStop                ; (R22)
   out SREG, r15
   sec
   ret
-bmp280ReadId_error:
+bmp280ReadSingleReg_error:
   rcall twiStop                ; (R22)
   out SREG, r15
   clc
   ret
 
 
+
 ; ---------------------------------------------------------------------------
 ; bmp280ReadRegsToSram
 ;
@@ -146,6 +157,7 @@ bmp280ReadRegsToSram:
 bmp280ReadRegsToSram_loop:
     rcall twiReceiveByteSendAck   ; read register content
     brcc bmp280ReadRegsToSram
+    st x+, r16                    ; store register content
     dec r2
   brne bmp280ReadRegsToSram_loop
   rcall twiStop                   ; (R22)
@@ -158,3 +170,6 @@ bmp280ReadRegsToSram_error:
   clc
   ret
 
+
+
+