First try to unify ATTN handling.
This commit is contained in:
Martin Preuss
278
avr/devices/all/attn.asm
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278
avr/devices/all/attn.asm
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; ***************************************************************************
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; copyright : (C) 2025 by Martin Preuss
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; email : martin@libchipcard.de
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;
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; ***************************************************************************
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; * This file is part of the project "AqHome". *
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; * Please see toplevel file COPYING of that project for license details. *
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; ***************************************************************************
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; not used for now
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; ***************************************************************************
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; macros
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.macro mAttnInitInt0
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; select falling edge of ATTN
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inr r16, MCUCR
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cbr r16, (1<<ISC01) | (1<<ISC00)
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sbr r16, (1<<ISC01) | (0<<ISC00)
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outr MCUCR, r16
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.endmacro
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.macro mAttnInitPCI
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in r16, GIMSK ; enable pin change irq PCIE0 or PCIE1
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ori r16, (1<<COM_IRQ_GIMSK_ATTN)
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out GIMSK, R16
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ldi r16, (1<<COM_IRQ_GIFR_ATTN) ; clear pending irq by writing 1 to ATTN bit
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out GIFR, r16
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.endmacro
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.macro mAttnEnableIrqInt0
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inr r16, COM_IRQ_ADDR_ATTN
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sbr r16, (1<<ATTN_IRQ_BIT)
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outr COM_IRQ_ADDR_ATTN, r16
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.endmacro
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.macro mAttnEnableIrqPCI
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sbi COM_IRQ_ADDR_ATTN, ATTN_IRQ_BIT ; enable pin change irq for ATTN line
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.endmacro
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.macro mAttnDisableIrqInt0
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inr r16, COM_IRQ_ADDR_ATTN ; disable irq for ATTN line
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cbr r16, (1<<ATTN_IRQ_BIT)
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outr COM_IRQ_ADDR_ATTN, r16
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.endmacro
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.macro mAttnDisableIrqPCI
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cbi COM_IRQ_ADDR_ATTN, ATTN_IRQ_BIT ; disable pin change irq for ATTN line
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.endmacro
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; ***************************************************************************
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; code
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.cseg
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; ---------------------------------------------------------------------------
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; @routine ATTN_Init @global
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;
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; @clobbers R16
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ATTN_Init:
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.ifdef INT0
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.if ATTN_IRQ_BIT == INT0
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mAttnInitInt0
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.else
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mAttnInitPCI
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.endif
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.else
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mAttnInitPCI
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.endif
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rcall ATTN_SetHighEnableIrq
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sec
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ATTN_SetLowDisableIrq @global
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;
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; @clobbers R16
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ATTN_SetLowDisableIrq:
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.ifdef INT0
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.if ATTN_IRQ_BIT == INT0
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mAttnDisableIrqInt0
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.else
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mAttnDisableIrqPCI
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.endif
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.else
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mAttnDisableIrqPCI
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.endif
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sbi ATTN_DDR, ATTN_PIN ; set ATTN as output
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cbi ATTN_OUTPUT, ATTN_PIN ; set ATTN low
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ATTN_SetHighEnableIrq @global
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;
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; @clobbers R16
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ATTN_SetHighEnableIrq:
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cbi ATTN_DDR, ATTN_PIN ; set ATTN as input
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.ifdef ATTN_PUE
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cbi ATTN_PUE, ATTN_PIN ; disable pullup on ATTN
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.else
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cbi ATTN_OUTPUT, ATTN_PIN ; disable pullup on ATTN
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.endif
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.ifdef INT0
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.if ATTN_IRQ_BIT == INT0
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mAttnEnableIrqInt0
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.else
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mAttnEnableIrqPCI
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.endif
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.else
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mAttnEnableIrqPCI
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.endif
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ATTN_IsHigh @global
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;
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; @return CFLAG set if ATTN is high
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; @clobbers none
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ATTN_IsHigh:
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clc
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sbic ATTN_INPUT, ATTN_PIN ; ATTN low?
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sec ; yes, set CF
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ATTN_WaitForStateSeconds
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;
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; Wait for ATTN state max given seconds
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;
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; @return CFLAG set if okay (data available), cleared on error
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; @param R16 expected state (0xff for high, 0 for low)
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; @param r20 maximum number of seconds to wait
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; @clobbers: r20, r22
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ATTN_WaitForStateSeconds:
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ATTN_WaitForStateSeconds_loop:
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push r20
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rcall ATTN_WaitForState1s ; (r20, r22)
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pop r20
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brcs ATTN_WaitForStateSeconds_gotit
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sbi LED_PIN, LED_PINNUM ; toggle (doen't work on AtMega8515)
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dec r20
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brne ATTN_WaitForStateSeconds_loop
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clc
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ATTN_WaitForStateSeconds_gotit:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ATTN_WaitForState1s
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;
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; Wait for ATTN state for max 1s
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;
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; @param R16 expected state (0xff for high, 0 for low)
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; @return CFLAG set if okay (ATTN state reached), cleared on error
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; @clobbers: r20, r22
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ATTN_WaitForState1s:
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ldi r20, 100
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ATTN_WaitForState1s_loop:
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push r20
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rcall ATTN_WaitForState10ms ; (R20, R22)
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pop r20
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brcs ATTN_WaitForState1s_gotit
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dec r20
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brne ATTN_WaitForState1s_loop
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clc
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ATTN_WaitForState1s_gotit:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ATTN_WaitForState10ms
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;
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; Wait for ATTN state for max 10 milliseconds.
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;
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; @param R16 expected state (0xff for high, 0 for low)
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; @return CFLAG set if okay (ATTN state reached), cleared on error
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; @clobbers: r20, r22
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ATTN_WaitForState10ms:
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.if clock == 8000000
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ldi r20, 80
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.endif
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.if clock == 1000000
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ldi r20, 10
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.endif
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ATTN_WaitForState10ms_loop:
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push r20
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rcall ATTN_WaitForState1000Cycles ; (r20, r22)
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pop r20
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brcs ATTN_WaitForState10ms_gotit
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dec r20
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brne ATTN_WaitForState10ms_loop
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clc
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ATTN_WaitForState10ms_gotit:
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ret
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; @end
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; ---------------------------------------------------------------------------
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; @routine ATTN_WaitForStateState1000Cycles
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;
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; Wait for ATTN state for max 1000 clock cycles
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; (about 1ms at 1MHz, 0.125ms at 8MHz)
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;
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; @param R16 expected state (0xff for high, 0 for low)
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; @return CFLAG set if okay (packet received), cleared on error
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; @clobbers: r20, r22
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ATTN_WaitForState1000Cycles:
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ldi r20, 90 ; 1
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ATTN_WaitForState1000Cycles_loop:
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push r17 ; +2
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in r17, COM_ATTN_INPUT ; +1
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eor r17, r16 ; +1
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andi r17, (1<<COM_ATTN_PIN) ; +1
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pop r17 ; +2
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breq ATTN_WaitForState1000Cycles_stateReached ; +1
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dec r20 ; +1
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brne ATTN_WaitForState1000Cycles_loop ; +2
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clc
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ret
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ATTN_WaitForState1000Cycles_stateReached:
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sec
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ret
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; @end
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