From cb379d41496bdc1f91ff0b120f5da29371129491 Mon Sep 17 00:00:00 2001
From: Martin Preuss <martin@aquamaniac.de>
Date: Tue, 20 May 2025 00:31:56 +0200
Subject: [PATCH] avr: started working on new LCD module and SPI module.

---
 avr/devices/all/includes.asm      |  12 +
 avr/devices/all/modules.asm       |  13 +-
 avr/devices/c01/defs.asm          |  62 +++
 avr/modules/lcd2/ili9341/0BUILD   |  11 +
 avr/modules/lcd2/ili9341/defs.asm |  38 ++
 avr/modules/lcd2/ili9341/main.asm | 629 ++++++++++++++++++++++++++++++
 avr/modules/lcd2/xpt2046/0BUILD   |  11 +
 avr/modules/lcd2/xpt2046/main.asm |  11 +
 avr/modules/spi_hw/0BUILD         |  11 +
 avr/modules/spi_hw/main.asm       | 202 ++++++++++
 10 files changed, 996 insertions(+), 4 deletions(-)
 create mode 100644 avr/modules/lcd2/ili9341/0BUILD
 create mode 100644 avr/modules/lcd2/ili9341/defs.asm
 create mode 100644 avr/modules/lcd2/ili9341/main.asm
 create mode 100644 avr/modules/lcd2/xpt2046/0BUILD
 create mode 100644 avr/modules/lcd2/xpt2046/main.asm
 create mode 100644 avr/modules/spi_hw/0BUILD
 create mode 100644 avr/modules/spi_hw/main.asm

diff --git a/avr/devices/all/includes.asm b/avr/devices/all/includes.asm
index c76ac9a..59569b8 100644
--- a/avr/devices/all/includes.asm
+++ b/avr/devices/all/includes.asm
@@ -121,6 +121,11 @@
 .include "modules/owimaster/main.asm"
 #endif
 
+
+#ifdef MODULES_SPI_HW
+.include "modules/spi_hw/main.asm"
+#endif
+
 #ifdef MODULES_DS18B20
 .include "modules/ds18b20/main2.asm"
   #ifdef MODULES_NETWORK
@@ -147,6 +152,13 @@
   #endif
 #endif
 
+#ifdef MODULES_ILI9341
+.include "modules/lcd2/ili9341/defs.asm"
+.include "modules/lcd2/ili9341/main.asm"
+#endif
+
+
+
 #ifdef APPS_MOTION
 .include "modules/f_keepup/main.asm"
 .include "modules/valsched/main.asm"
diff --git a/avr/devices/all/modules.asm b/avr/devices/all/modules.asm
index 0e5249b..75ce833 100644
--- a/avr/devices/all/modules.asm
+++ b/avr/devices/all/modules.asm
@@ -84,6 +84,11 @@ initModules:
 #ifdef MODULES_OWI_MASTER
   rcall OwiMaster_Init
 #endif
+
+#ifdef MODULES_SPI_HW
+  rcall SPIHW_Init
+#endif
+
 #ifdef MODULES_LCD
   rcall LCD_Init
 #endif
@@ -135,6 +140,10 @@ initModules:
   rcall CCS811_Init
 #endif
 
+#ifdef MODULES_ILI9341
+  rcall ILI9341_Init
+#endif
+
 
   ; done
   ret
@@ -169,10 +178,6 @@ runModules_Com:
 runModules_ComEnd:  
 #endif
 
-#ifdef MODULES_UART_HW
-  rcall NET_Uart_Run
-#endif
-
 #ifdef MODULES_TTYONUART1
   rcall TtyOnUart1_Run
 #endif
diff --git a/avr/devices/c01/defs.asm b/avr/devices/c01/defs.asm
index 46aee57..21fed9d 100644
--- a/avr/devices/c01/defs.asm
+++ b/avr/devices/c01/defs.asm
@@ -79,6 +79,68 @@
 
 
 
+; ---------------------------------------------------------------------------
+; SPI hardware module
+
+.equ SPIHW_SS_DDR      = DDRB
+.equ SPIHW_SS_INPUT    = PINB
+.equ SPIHW_SS_OUTPUT   = PORTB
+.equ SPIHW_SS_PIN      = PORTB4
+
+.equ SPIHW_MOSI_DDR    = DDRB
+.equ SPIHW_MOSI_INPUT  = PINB
+.equ SPIHW_MOSI_OUTPUT = PORTB
+.equ SPIHW_MOSI_PIN    = PORTB5
+
+.equ SPIHW_MISO_DDR    = DDRB
+.equ SPIHW_MISO_INPUT  = PINB
+.equ SPIHW_MISO_OUTPUT = PORTB
+.equ SPIHW_MISO_PIN    = PORTB6
+
+.equ SPIHW_SCK_DDR    = DDRB
+.equ SPIHW_SCK_INPUT  = PINB
+.equ SPIHW_SCK_OUTPUT = PORTB
+.equ SPIHW_SCK_PIN    = PORTB7
+
+.equ SPIHW_SS0_DDR    = DDRB
+.equ SPIHW_SS0_OUTPUT = PORTB
+.equ SPIHW_SS0_INPUT  = PORTB
+.equ SPIHW_SS0_PIN    = PORTB0
+
+.equ SPIHW_SS1_DDR    = DDRB
+.equ SPIHW_SS1_OUTPUT = PORTB
+.equ SPIHW_SS1_INPUT  = PORTB
+.equ SPIHW_SS1_PIN    = PORTB1
+
+.equ SPIHW_SS2_DDR    = DDRB
+.equ SPIHW_SS2_OUTPUT = PORTB
+.equ SPIHW_SS2_INPUT  = PORTB
+.equ SPIHW_SS2_PIN    = PORTB2
+
+
+
+; ---------------------------------------------------------------------------
+; ILI9341 module
+
+.equ ILI9341_DEVICENUM    = 0
+.equ ILI9341_DSP_WIDTH    = 320
+.equ ILI9341_DSP_HEIGHT   = 240
+
+.equ ILI9341_RESET_DDR    = DDRB
+.equ ILI9341_RESET_OUTPUT = PORTB
+.equ ILI9341_RESET_INPUT  = PORTB
+.equ ILI9341_RESET_PIN    = PORTB3
+
+.equ ILI9341_DC_DDR       = DDRD
+.equ ILI9341_DC_OUTPUT    = PORTD
+.equ ILI9341_DC_INPUT     = PORTD
+.equ ILI9341_DC_PIN       = PORTD4
+
+.equ ILI9341_LED_DDR      = DDRD
+.equ ILI9341_LED_OUTPUT   = PORTD
+.equ ILI9341_LED_INPUT    = PORTD
+.equ ILI9341_LED_PIN      = PORTD5
+
 
 
 ; ---------------------------------------------------------------------------
diff --git a/avr/modules/lcd2/ili9341/0BUILD b/avr/modules/lcd2/ili9341/0BUILD
new file mode 100644
index 0000000..febd367
--- /dev/null
+++ b/avr/modules/lcd2/ili9341/0BUILD
@@ -0,0 +1,11 @@
+<?xml?>
+
+<gwbuild>
+
+  <extradist>
+    main.asm
+  </extradist>
+
+</gwbuild>
+
+
diff --git a/avr/modules/lcd2/ili9341/defs.asm b/avr/modules/lcd2/ili9341/defs.asm
new file mode 100644
index 0000000..63c4903
--- /dev/null
+++ b/avr/modules/lcd2/ili9341/defs.asm
@@ -0,0 +1,38 @@
+
+
+
+#define ILI9341_FRAMERATE_61_HZ 0x1F
+#define ILI9341_FRAMERATE_63_HZ 0x1E
+#define ILI9341_FRAMERATE_65_HZ 0x1D
+#define ILI9341_FRAMERATE_68_HZ 0x1C
+#define ILI9341_FRAMERATE_70_HZ 0x1B
+#define ILI9341_FRAMERATE_73_HZ 0x1A
+#define ILI9341_FRAMERATE_76_HZ 0x19
+#define ILI9341_FRAMERATE_79_HZ 0x18
+#define ILI9341_FRAMERATE_83_HZ 0x17
+#define ILI9341_FRAMERATE_86_HZ 0x16
+#define ILI9341_FRAMERATE_90_HZ 0x15
+#define ILI9341_FRAMERATE_95_HZ 0x14
+#define ILI9341_FRAMERATE_100_HZ 0x13
+#define ILI9341_FRAMERATE_106_HZ 0x12
+#define ILI9341_FRAMERATE_112_HZ 0x11
+#define ILI9341_FRAMERATE_119_HZ 0x10
+
+#define ILI9341_MADCTL_MY  0x80  ; row address order
+#define ILI9341_MADCTL_MX  0x40  ; column address order
+#define ILI9341_MADCTL_MV  0x20  ; row/column exchange
+#define ILI9341_MADCTL_ML  0x10  ; vertical refresh order
+#define ILI9341_MADCTL_RGB 0x00  ; RGB color order
+#define ILI9341_MADCTL_BGR 0x08  ; BGR color order
+#define ILI9341_MADCTL_MH  0x04  ; horizontal refresh order
+
+
+#define ILI9341_CMD_CASET    0x2A
+#define ILI9341_CMD_PASET    0x2B
+#define ILI9341_CMD_RAMWR    0x2C
+#define ILI9341_CMD_RAMRD    0x2E
+
+#define ILI9341_CMD_COLORSET 0x2d
+#define ILI9341_CMD_SETDSPBRIGHTNESS 0x51
+#define ILI9341_CMD_WRITECTLDISPLAY  0x53
+
diff --git a/avr/modules/lcd2/ili9341/main.asm b/avr/modules/lcd2/ili9341/main.asm
new file mode 100644
index 0000000..d086b2c
--- /dev/null
+++ b/avr/modules/lcd2/ili9341/main.asm
@@ -0,0 +1,629 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+
+; ***************************************************************************
+; defines
+
+#if 0
+.equ ILI9341_SPIMODE = (0<<SPIHW_MODE_SPEED0_BIT) | \
+                       (0<<SPIHW_MODE_SPEED1_BIT) | \
+                       (1<<SPIHW_MODE_DOUBLESPEED_BIT) | \
+                       (0<<SPIHW_MODE_DATAORDER_BIT) | \
+                       (0<<SPIHW_MODE_CPOL_BIT) | \
+                       (0<<SPIHW_MODE_CPHA_BIT)
+#endif
+
+#if 0
+.equ ILI9341_SPIMODE = (1<<SPIHW_MODE_SPEED0_BIT) | \
+                       (0<<SPIHW_MODE_SPEED1_BIT) | \
+                       (0<<SPIHW_MODE_DOUBLESPEED_BIT) | \
+                       (0<<SPIHW_MODE_DATAORDER_BIT) | \
+                       (0<<SPIHW_MODE_CPOL_BIT) | \
+                       (0<<SPIHW_MODE_CPHA_BIT)
+#endif
+
+#if 1
+.equ ILI9341_SPIMODE = (0<<SPIHW_MODE_SPEED0_BIT) | \
+                       (0<<SPIHW_MODE_SPEED1_BIT) | \
+                       (1<<SPIHW_MODE_DOUBLESPEED_BIT) | \
+                       (0<<SPIHW_MODE_DATAORDER_BIT) | \
+                       (0<<SPIHW_MODE_CPOL_BIT) | \
+                       (0<<SPIHW_MODE_CPHA_BIT)
+#endif
+
+
+; ***************************************************************************
+; data
+
+.dseg
+
+
+
+; ***************************************************************************
+; code
+
+.cseg
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ILI9341_Init @global
+
+ILI9341_Init:
+  ; setup pins
+  sbi ILI9341_RESET_DDR, ILI9341_RESET_PIN    ; RESET= output
+  sbi ILI9341_RESET_OUTPUT, ILI9341_RESET_PIN ; RESET= high
+  sbi ILI9341_DC_DDR, ILI9341_DC_PIN          ; DC   = output
+  sbi ILI9341_LED_DDR, ILI9341_LED_PIN        ; LED  = output
+  cbi ILI9341_LED_OUTPUT, ILI9341_LED_PIN     ; LED  = low
+
+  rcall ILI9341_Reset
+
+  rcall ILI9341_LeaveSleepMode
+  
+  ldi r16, 0xff
+  rcall ILI9341_SetBacklight
+
+  ldi r17, 0xff
+  ldi r16, 0xff
+  rcall ili9341Test5  
+  
+; 0bRRRRRGGGGGGBBBBB
+  ldi r17, 0b11111000 ; red
+  ldi r16, 0b00000000 ; red
+;  rcall ILI9341_FillScreen
+  rcall ili9341Test2
+
+; 0bRRRRRGGGGGGBBBBB
+  ldi r17, 0b00000000
+  ldi r16, 0b00011111  ; blue
+  rcall ili9341Test3
+
+; 0bRRRRRGGGGGGBBBBB
+  ldi r17, 0b00000111 ; green
+  ldi r16, 0b11100000 ; green
+  rcall ili9341Test4
+
+
+  sec
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ILI9341_Fini @global
+
+ILI9341_Fini:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ILI9341_Reset @global
+
+; @clobbers (R22)
+
+ILI9341_Reset:
+  cbi ILI9341_RESET_OUTPUT, ILI9341_RESET_PIN
+  ldi r16, 100
+  rcall Utils_WaitForMilliSecs
+  sbi ILI9341_RESET_OUTPUT, ILI9341_RESET_PIN
+  ldi r16, 50
+  rcall Utils_WaitForMilliSecs
+  
+  ldi zl, LOW(ili9341InitCommands*2)
+  ldi zh, HIGH(ili9341InitCommands*2)
+  rcall ili9341SendCommands
+
+  ldi r16, 120
+  rcall Utils_WaitForMilliSecs
+  
+  rcall ili9341BeginSpi
+  ldi r16, 0x29
+  rcall ili9341SendCommand
+  rcall ili9341EndSpi
+
+  ldi r16, 120
+  rcall Utils_WaitForMilliSecs
+  
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ILI9341_SetBacklight @global
+;
+; @param r16 0=off, on otherwise
+; @clobbers r16, r17
+
+ILI9341_SetBacklight:
+  tst r16
+  brne ILI9341_SetBacklight_on
+  cbi ILI9341_LED_OUTPUT, ILI9341_LED_PIN
+  ret
+ILI9341_SetBacklight_on:
+  sbi ILI9341_LED_OUTPUT, ILI9341_LED_PIN
+
+  push r16
+    rcall ili9341BeginSpi
+    
+    ldi r16, ILI9341_CMD_WRITECTLDISPLAY
+    rcall ili9341SendCommand
+  ;  ldi r16, 0b00100100
+    ldi r16, 0x24
+    rcall ili9341SendData
+
+    ldi r16, ILI9341_CMD_SETDSPBRIGHTNESS
+    rcall ili9341SendCommand
+  pop r16
+  rcall ili9341SendData
+
+  ldi r16, 0xbe
+  rcall ili9341SendCommand
+  ldi r16, 0x0f
+  rcall ili9341SendData
+
+  rcall ili9341EndSpi
+  
+  ret
+; @end
+
+
+
+
+ILI9341_LeaveSleepMode:
+  rcall ili9341BeginSpi
+  
+  ldi r16, 0x11 ; sleep out
+  rcall ili9341SendCommand
+  rcall ili9341EndSpi
+  ldi r16, 5
+  rcall Utils_WaitForMilliSecs
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ILI9341_FillScreen
+;
+; @param r17:r16 color
+
+ILI9341_FillScreen:
+  push r16
+    push r17
+      rcall ili9341BeginSpi ; (R16, R17)
+      clr r18
+      clr r19
+      clr r20
+      clr r21
+      ldi r22, LOW(ILI9341_DSP_WIDTH-1)
+      ldi r23, HIGH(ILI9341_DSP_WIDTH-1)
+      ldi r24, LOW(ILI9341_DSP_HEIGHT-1)
+      ldi r25, HIGH(ILI9341_DSP_HEIGHT-1)
+      rcall ili9341SetAddressWindow ; (R16)
+    pop r19 ; color high
+  pop r18   ; color low
+
+  ; start RAM write
+  ldi r16, ILI9341_CMD_RAMWR
+  rcall ili9341SendCommand
+
+  ldi r24, LOW(ILI9341_DSP_HEIGHT-1)
+  ldi r25, HIGH(ILI9341_DSP_HEIGHT-1)
+ILI9341_FillScreen_loopH:
+    push r24
+      push r25
+        ldi r24, LOW(ILI9341_DSP_WIDTH)
+        ldi r25, HIGH(ILI9341_DSP_WIDTH)
+ILI9341_FillScreen_loopW:
+          rcall ili9341Send16BitData
+          sbiw r25:r24, 1
+        brne ILI9341_FillScreen_loopW
+      pop r25
+    pop r24
+    sbiw r25:r24, 1
+  brne ILI9341_FillScreen_loopH
+
+  rcall ili9341EndSpi
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ILI9341_FillRect
+; @param r17:r16 color
+; @param r19:r18 X
+; @param r21:r20 Y
+; @param r23:r22 W
+; @param r25:r24 H
+
+ILI9341_FillRect:
+  push r16
+    push r17
+      rcall ili9341BeginSpi ; (R16, R17)
+      ldi r16, 1
+      push r22
+        push r23
+          push r24
+            push r25
+              sub r22, r16  ; X1=X+W-1
+              sbc r23, r16
+              add r23, r16
+              add r22, r18
+              adc r23, r19
+            
+              sub r24, r16  ; Y1=Y+H-1
+              sbc r25, r16
+              add r25, r16
+              add r24, r20
+              adc r25, r21
+              rcall ili9341SetAddressWindow ; (R16)
+            pop r25
+          pop r24
+        pop r23
+      pop r22
+    pop r19    ; color high (pop from r17)
+  pop r18      ; color low  (pop from r16)
+
+  sbi ILI9341_DC_OUTPUT, ILI9341_DC_PIN   ; D high (send data)
+
+ILI9341_FillRect_loopH:
+    push r24
+      push r25
+        mov r24, r22 ; W low
+        mov r25, r23 ; W high
+ILI9341_FillRect_loopW:
+          mov r16, r19 ; color high
+          rcall SPIHW_MasterTransfer              ; (R16)
+          mov r16, r18 ; color high
+          rcall SPIHW_MasterTransfer              ; (R16)
+          sbiw r25:r24, 1
+        brne ILI9341_FillRect_loopW
+      pop r25
+    pop r24
+    sbiw r25:r24, 1
+  brne ILI9341_FillRect_loopH
+  rcall ili9341EndSpi
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ili9341SetAddressWindow
+;
+; @param r19:r18 X0
+; @param r21:r20 Y0
+; @param r23:r22 X1
+; @param r25:r24 Y1
+; @clobbers R16
+
+ili9341SetAddressWindow:
+  ; send column address
+  ldi r16, ILI9341_CMD_CASET
+  rcall ili9341SendCommand
+  ; X0
+  mov r16, r19
+  rcall ili9341SendData
+  mov r16, r18
+  rcall ili9341SendData
+  ; X1
+  mov r16, r23
+  rcall ili9341SendData
+  mov r16, r22
+  rcall ili9341SendData
+
+  ; send row address
+  ldi r16, ILI9341_CMD_PASET
+  rcall ili9341SendCommand
+  ; Y0
+  mov r16, r21
+  rcall ili9341SendData
+  mov r16, r20
+  rcall ili9341SendData
+  ; Y1
+  mov r16, r25
+  rcall ili9341SendData
+  mov r16, r24
+  rcall ili9341SendData
+
+  ret
+; @end
+
+
+
+
+
+
+ili9341SendCommand:
+  cbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN       ; SS low
+  cbi ILI9341_DC_OUTPUT, ILI9341_DC_PIN   ; D low
+  nop
+  rcall SPIHW_MasterTransfer
+  sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN       ; SS low
+  ret
+; @end
+
+
+
+ili9341SendData:
+  cbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN       ; SS low
+  sbi ILI9341_DC_OUTPUT, ILI9341_DC_PIN   ; D high
+  rcall SPIHW_MasterTransfer              ; (R16)
+  sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN       ; SS low
+  ret
+; @end
+
+
+
+; @param r19:18 data
+ili9341Send16BitData:
+  cbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN       ; SS low
+  sbi ILI9341_DC_OUTPUT, ILI9341_DC_PIN   ; D high
+  mov r16, r19
+  rcall SPIHW_MasterTransfer
+  mov r16, r18
+  rcall SPIHW_MasterTransfer
+  sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN       ; SS low
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ili9341BeginSpi
+;
+; @clobbers r16, r17
+
+ili9341BeginSpi:
+  ldi r16, ILI9341_SPIMODE
+  ldi r17, ILI9341_DEVICENUM
+  rjmp SPIHW_MasterStart                   ; (R18)
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ili9341EndSpi
+;
+; @clobbers r16
+
+ili9341EndSpi:
+  rjmp SPIHW_MasterStop                    ; (R16)
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine ili9341SendCommands
+;
+; @clobbers r16
+
+; Z=byte pointer to command list (as for LPM)
+
+ili9341SendCommands:
+  rcall ili9341BeginSpi
+ili9341SendCommands_loop1:
+    lpm r16, Z+                             ; read command
+    lpm r18, Z+                             ; read number of args
+    cpi r18, 0xff                           ; end?
+    breq ili9341SendCommands_end
+    rcall ili9341SendCommand
+    mov r19, r18
+    andi r19, 1                             ; if 1: need to skip filler byte
+    tst r18
+    breq ili9341SendCommands_loop1          ; no args, next command
+ili9341SendCommands_loop2:
+      lpm r16, Z+
+      rcall ili9341SendData                 ; (R16)
+      dec r18
+    brne ili9341SendCommands_loop2
+    add zl, r19                             ; possibly skip filler byte
+    adc zh, r19
+    sub zh, r19
+  rjmp ili9341SendCommands_loop1
+ili9341SendCommands_end:
+  rcall ili9341EndSpi                       ; (R16)
+  ret
+; @end
+
+
+
+ili9341Test1:
+  rcall ili9341BeginSpi
+  ldi r16, 0x04
+  cbi ILI9341_DC_OUTPUT, ILI9341_DC_PIN   ; D low (send command)
+  rcall SPIHW_MasterTransfer              ; (R16)
+  sbi ILI9341_DC_OUTPUT, ILI9341_DC_PIN   ; D high (send data)
+  clr r16
+  ; read byte 1
+  rcall SPIHW_MasterTransfer              ; (R16)
+  ; read byte 2
+  rcall SPIHW_MasterTransfer              ; (R16)
+  ; read byte 3
+  rcall SPIHW_MasterTransfer              ; (R16)
+  ; read byte 4
+  rcall SPIHW_MasterTransfer              ; (R16)
+  rcall ili9341EndSpi                       ; (R16)
+  ret
+
+
+
+; @param %0 X
+; @param %1 Y
+; @param %2 W
+; @param %3 H
+.macro M_ILI9341_FILL_RECT
+  push r16
+    push r17
+      rcall ili9341BeginSpi ; (R16, R17)
+      ldi r18, LOW(@0)      ; X0
+      ldi r19, HIGH(@0)
+      ldi r20, LOW(@1)        ; Y0
+      ldi r21, HIGH(@1)
+      ldi r22, LOW(@0+@2-1)   ; X1
+      ldi r23, HIGH(@0+@2-1)
+      ldi r24, LOW(@1+@3-1)  ; y1
+      ldi r25, HIGH(@1+@3-1)  ; y1
+      rcall ili9341SetAddressWindow ; (R16)
+    pop r19 ; color high
+  pop r18   ; color low
+
+  ; start RAM write
+  ldi r16, ILI9341_CMD_RAMWR
+  rcall ili9341SendCommand
+
+  cbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN       ; SS low
+  sbi ILI9341_DC_OUTPUT, ILI9341_DC_PIN   ; D high
+
+  ldi r24, LOW(@3)    ; height
+  ldi r25, HIGH(@3)
+l_loopH_%:
+    push r24
+      push r25
+        ldi r24, LOW(@2)  ; width
+        ldi r25, HIGH(@2)
+l_loopW_%:
+          M_IO_WRITE SPDR, r19
+          rcall SPIHW_WaitForTransferComplete ; (R16)
+          M_IO_WRITE SPDR, r18
+          rcall SPIHW_WaitForTransferComplete ; (R16)
+          sbiw r25:r24, 1
+        brne l_loopW_%
+      pop r25
+    pop r24
+    sbiw r25:r24, 1
+  brne l_loopH_%
+
+  rcall ili9341EndSpi
+.endmacro
+
+
+
+ili9341Test2:
+  M_ILI9341_FILL_RECT 10, 20, 70, 100
+  ret
+
+
+
+ili9341Test3:
+  M_ILI9341_FILL_RECT 90, 40, 70, 100
+  ret
+
+
+
+ili9341Test4:
+  M_ILI9341_FILL_RECT 40, 30, 70, 100
+  ret
+
+
+
+ili9341Test5:
+  M_ILI9341_FILL_RECT 0, 0, 319, 239
+  ret
+
+
+
+
+ili9341WriteColorTable:
+  rcall ili9341BeginSpi          ; (R16, R17)
+  ldi r16, ILI9341_CMD_COLORSET
+  rcall ili9341SendCommand
+
+  ldi r17, 32  ; send R00-R31
+  clr r18
+  ldi r19, 2
+  rcall ili9341WriteColorTable_loop
+
+  ldi r17, 64  ; send G00-G63
+  clr r18
+  ldi r19, 1
+  rcall ili9341WriteColorTable_loop
+
+  ldi r17, 32  ; send B00-B31
+  clr r18
+  ldi r19, 2
+  rcall ili9341WriteColorTable_loop
+
+  rcall ili9341EndSpi
+  ret
+
+ili9341WriteColorTable_loop:
+    mov r16, r18
+    rcall ili9341SendData
+    add r18, r19
+    dec r17
+  brne ili9341WriteColorTable_loop
+  ret
+; @end
+
+
+
+
+ili9341InitCommands:
+; display off
+  .db 0x28, 0
+; PowerCtlA
+  .db 0xcb, 5, 0x39, 0x2C, 0x00, 0x34, 0x02, 0x00
+; PowerCtlB
+  .db 0xcf, 3, 0x00, 0xC1, 0x30, 0x00
+; DriverTimingCtlA
+  .db 0xe8, 3, 0x85, 0x00, 0x78, 0x00
+; DriverTimingCtlB
+  .db 0xea, 2, 0x00, 0x00
+; _PowerSeqCtl
+  .db 0xed, 4, 0x64, 0x03, 0x12, 0x81
+; PumpRatioCtl
+  .db 0xf7, 1, 0x20, 0x00
+; PowerCtl1
+  .db 0xc0, 1, 0x23, 0x00                    ; lookup!
+; PowerCtl2
+  .db 0xc1, 1, 0x10, 0x00                    ; lookup!
+; VomCtl1
+  .db 0xc5, 2, 0x3e, 0x28                    ; lookup!
+; VomCtl2
+  .db 0xc7, 1, 0x86, 0x00                    ; lookup!
+; ColMod
+  .db 0x3A, 1, 0x55, 0x00                    ; DPI=16bits/pixel, DBI=16bits/pixel
+; FrameRateCtl
+  .db 0xb1, 2, 0x00, ILI9341_FRAMERATE_79_HZ
+; DspFnCtl
+  .db 0xb6, 3, 0x08, 0x82, 0x27, 0x00
+; GammaCurve
+  .db 0x26, 1, 0x01, 0x00
+; PosGamma
+  .db 0xe0, 15
+  .db 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, 0xF1
+  .db 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00, 0x00
+; NegGamma
+  .db 0xe1, 15
+  .db 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, 0xC1
+  .db 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, 0x00
+; memory access control    (use ILI9341_MADCTL_MV to flip X/Y)
+;  .db 0x36, 1, (ILI9341_MADCTL_MX | ILI9341_MADCTL_BGR), 0x00
+;  .db 0x36, 1, (ILI9341_MADCTL_BGR), 0x00
+;                MMMMBM
+;                YXVLGH00
+  .db 0x36, 1, 0b11101000, 0x00
+; normal mode on
+  .db 0x13, 0
+
+; end
+  .db 0xff, 0xff
+
+
+  
+
+
diff --git a/avr/modules/lcd2/xpt2046/0BUILD b/avr/modules/lcd2/xpt2046/0BUILD
new file mode 100644
index 0000000..febd367
--- /dev/null
+++ b/avr/modules/lcd2/xpt2046/0BUILD
@@ -0,0 +1,11 @@
+<?xml?>
+
+<gwbuild>
+
+  <extradist>
+    main.asm
+  </extradist>
+
+</gwbuild>
+
+
diff --git a/avr/modules/lcd2/xpt2046/main.asm b/avr/modules/lcd2/xpt2046/main.asm
new file mode 100644
index 0000000..4e899e5
--- /dev/null
+++ b/avr/modules/lcd2/xpt2046/main.asm
@@ -0,0 +1,11 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+
+
diff --git a/avr/modules/spi_hw/0BUILD b/avr/modules/spi_hw/0BUILD
new file mode 100644
index 0000000..febd367
--- /dev/null
+++ b/avr/modules/spi_hw/0BUILD
@@ -0,0 +1,11 @@
+<?xml?>
+
+<gwbuild>
+
+  <extradist>
+    main.asm
+  </extradist>
+
+</gwbuild>
+
+
diff --git a/avr/modules/spi_hw/main.asm b/avr/modules/spi_hw/main.asm
new file mode 100644
index 0000000..ea6fd7b
--- /dev/null
+++ b/avr/modules/spi_hw/main.asm
@@ -0,0 +1,202 @@
+; ***************************************************************************
+; copyright   : (C) 2025 by Martin Preuss
+; email       : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome".                              *
+; * Please see toplevel file COPYING of that project for license details.   *
+; ***************************************************************************
+
+
+; ***************************************************************************
+; defines
+
+.equ SPIHW_MODE_SPEED0_BIT      = 0   ; 00=CLK/4, 01=CLK/16
+.equ SPIHW_MODE_SPEED1_BIT      = 1   ; 10=CLK/64, 11=CLK/128
+.equ SPIHW_MODE_DOUBLESPEED_BIT = 2   ; 1=double speed from SPIHW_MODE_SPEED0/1_BIT
+.equ SPIHW_MODE_DATAORDER_BIT   = 3   ; 1=LSB first, 0=MSB first
+.equ SPIHW_MODE_CPOL_BIT        = 4   ; 0=leading edge rising/trailing edge falling
+.equ SPIHW_MODE_CPHA_BIT        = 5   ; 0=sample on leading edge, setup on trailing edge
+
+
+
+; ***************************************************************************
+; data
+
+.dseg
+
+
+
+; ***************************************************************************
+; code
+
+.cseg
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_Init @global
+;
+
+SPIHW_Init:
+  sbi SPIHW_SS0_DDR, SPIHW_SS0_PIN ; SS0= output
+  sbi SPIHW_SS1_DDR, SPIHW_SS1_PIN ; SS1= output
+  sbi SPIHW_SS2_DDR, SPIHW_SS2_PIN ; SS2= output
+  sec
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_Fini @global
+;
+
+SPIHW_Fini:
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_MasterStart @global
+;
+; Start SPI hardware master with the given mode (see @ref SPIHW_MODE_SPEED0_BIT
+; and others).
+
+; @param r16 mode
+; @param r17 device num (0-7)
+; @clobbers r17
+
+SPIHW_MasterStart:
+  ; setup pins
+  sbi SPIHW_SS_DDR, SPIHW_SS_PIN      ; SS  : output
+  sbi SPIHW_MOSI_DDR, SPIHW_MOSI_PIN  ; MOSI: output
+  cbi SPIHW_MISO_DDR, SPIHW_MISO_PIN  ; MISO: input
+  sbi SPIHW_SCK_DDR, SPIHW_SCK_PIN    ; SCK:  output
+
+  ; select device
+  sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN   ; SS high
+  rcall spiHwSelectDevice             ; (none)
+;  cbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN   ; SS low
+
+  ; setup SPCR
+  clr r17
+  sbrc r16, SPIHW_MODE_DATAORDER_BIT
+    sbr r17, (1<<DORD)
+  sbrc r16, SPIHW_MODE_CPOL_BIT
+    sbr r17, (1<<CPOL)
+  sbrc r16, SPIHW_MODE_CPHA_BIT
+    sbr r17, (1<<CPHA)
+  sbrc r16, SPIHW_MODE_SPEED0_BIT
+    sbr r17, (1<<SPR0)
+  sbrc r16, SPIHW_MODE_SPEED1_BIT
+    sbr r17, (1<<SPR1)
+  sbr r17, (1<<SPE) | (1<<MSTR)
+  M_IO_WRITE SPCR, r17
+  
+  ; setup SPSR
+  clr r17
+  sbrc r16, SPIHW_MODE_DOUBLESPEED_BIT
+    sbr r17, (1<<SPI2X)
+  M_IO_WRITE SPSR, r17
+  
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_MasterStop @global
+;
+; Stop SPI hardware master.
+
+; @clobbers r16
+
+SPIHW_MasterStop:
+;  sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN   ; SS high
+  M_IO_READ r16, SPCR
+  cbr r16, (1<<SPE)
+  M_IO_WRITE SPCR, r16
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine spiHwSelectDevice
+;
+; Select given device via SS0-SS2 pins
+;
+; @param r17=device
+; @clobbers none
+
+spiHwSelectDevice:
+  cbi SPIHW_SS0_OUTPUT, SPIHW_SS0_PIN
+  sbrc r17, 0
+    sbi SPIHW_SS0_OUTPUT, SPIHW_SS0_PIN
+  cbi SPIHW_SS1_OUTPUT, SPIHW_SS1_PIN
+  sbrc r17, 1
+    sbi SPIHW_SS1_OUTPUT, SPIHW_SS1_PIN
+  cbi SPIHW_SS2_OUTPUT, SPIHW_SS2_PIN
+  sbrc r17, 2
+    sbi SPIHW_SS2_OUTPUT, SPIHW_SS2_PIN
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_MasterTransfer @global
+;
+; Complete transfer sending ony byte and receiving another.
+;
+; @param r16 byte to send
+; @param r16 byte received
+; @clobbers none
+
+SPIHW_MasterTransfer:
+  rcall SPIHW_MasterSendByte
+  rjmp SPIHW_WaitForTransferComplete
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_MasterSendByte @global
+;
+; Send a byte to the SPI interface. Does not wait for result, you need to
+; call @ref SPIHW_WaitForTransferComplete to complete the request and to
+; get the response.
+; This allows for transfers in background so that the caller can do other stuff
+; instead of idly waiting for the transfer to complete.
+; However, before calling this routine again you MUST call SPIHW_WaitForTransferComplete!
+
+; @param r16 byte to send
+; @clobbers none
+
+SPIHW_MasterSendByte:
+  M_IO_WRITE SPDR, r16
+  ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_WaitForTransferComplete @global
+;
+; Wait for a transfer to complete and return the byte received.
+;
+; @return r16 byte received
+; @clobbers none
+
+SPIHW_WaitForTransferComplete:
+    M_IO_READ r16, SPSR
+    sbrs r16, SPIF
+  rjmp SPIHW_WaitForTransferComplete
+  M_IO_READ r16, SPDR
+  ret
+; @end
+
+
+