diff --git a/avr/devices/all/includes.asm b/avr/devices/all/includes.asm
index c76ac9a..59569b8 100644
--- a/avr/devices/all/includes.asm
+++ b/avr/devices/all/includes.asm
@@ -121,6 +121,11 @@
.include "modules/owimaster/main.asm"
#endif
+
+#ifdef MODULES_SPI_HW
+.include "modules/spi_hw/main.asm"
+#endif
+
#ifdef MODULES_DS18B20
.include "modules/ds18b20/main2.asm"
#ifdef MODULES_NETWORK
@@ -147,6 +152,13 @@
#endif
#endif
+#ifdef MODULES_ILI9341
+.include "modules/lcd2/ili9341/defs.asm"
+.include "modules/lcd2/ili9341/main.asm"
+#endif
+
+
+
#ifdef APPS_MOTION
.include "modules/f_keepup/main.asm"
.include "modules/valsched/main.asm"
diff --git a/avr/devices/all/modules.asm b/avr/devices/all/modules.asm
index 0e5249b..75ce833 100644
--- a/avr/devices/all/modules.asm
+++ b/avr/devices/all/modules.asm
@@ -84,6 +84,11 @@ initModules:
#ifdef MODULES_OWI_MASTER
rcall OwiMaster_Init
#endif
+
+#ifdef MODULES_SPI_HW
+ rcall SPIHW_Init
+#endif
+
#ifdef MODULES_LCD
rcall LCD_Init
#endif
@@ -135,6 +140,10 @@ initModules:
rcall CCS811_Init
#endif
+#ifdef MODULES_ILI9341
+ rcall ILI9341_Init
+#endif
+
; done
ret
@@ -169,10 +178,6 @@ runModules_Com:
runModules_ComEnd:
#endif
-#ifdef MODULES_UART_HW
- rcall NET_Uart_Run
-#endif
-
#ifdef MODULES_TTYONUART1
rcall TtyOnUart1_Run
#endif
diff --git a/avr/devices/c01/defs.asm b/avr/devices/c01/defs.asm
index 46aee57..21fed9d 100644
--- a/avr/devices/c01/defs.asm
+++ b/avr/devices/c01/defs.asm
@@ -79,6 +79,68 @@
+; ---------------------------------------------------------------------------
+; SPI hardware module
+
+.equ SPIHW_SS_DDR = DDRB
+.equ SPIHW_SS_INPUT = PINB
+.equ SPIHW_SS_OUTPUT = PORTB
+.equ SPIHW_SS_PIN = PORTB4
+
+.equ SPIHW_MOSI_DDR = DDRB
+.equ SPIHW_MOSI_INPUT = PINB
+.equ SPIHW_MOSI_OUTPUT = PORTB
+.equ SPIHW_MOSI_PIN = PORTB5
+
+.equ SPIHW_MISO_DDR = DDRB
+.equ SPIHW_MISO_INPUT = PINB
+.equ SPIHW_MISO_OUTPUT = PORTB
+.equ SPIHW_MISO_PIN = PORTB6
+
+.equ SPIHW_SCK_DDR = DDRB
+.equ SPIHW_SCK_INPUT = PINB
+.equ SPIHW_SCK_OUTPUT = PORTB
+.equ SPIHW_SCK_PIN = PORTB7
+
+.equ SPIHW_SS0_DDR = DDRB
+.equ SPIHW_SS0_OUTPUT = PORTB
+.equ SPIHW_SS0_INPUT = PORTB
+.equ SPIHW_SS0_PIN = PORTB0
+
+.equ SPIHW_SS1_DDR = DDRB
+.equ SPIHW_SS1_OUTPUT = PORTB
+.equ SPIHW_SS1_INPUT = PORTB
+.equ SPIHW_SS1_PIN = PORTB1
+
+.equ SPIHW_SS2_DDR = DDRB
+.equ SPIHW_SS2_OUTPUT = PORTB
+.equ SPIHW_SS2_INPUT = PORTB
+.equ SPIHW_SS2_PIN = PORTB2
+
+
+
+; ---------------------------------------------------------------------------
+; ILI9341 module
+
+.equ ILI9341_DEVICENUM = 0
+.equ ILI9341_DSP_WIDTH = 320
+.equ ILI9341_DSP_HEIGHT = 240
+
+.equ ILI9341_RESET_DDR = DDRB
+.equ ILI9341_RESET_OUTPUT = PORTB
+.equ ILI9341_RESET_INPUT = PORTB
+.equ ILI9341_RESET_PIN = PORTB3
+
+.equ ILI9341_DC_DDR = DDRD
+.equ ILI9341_DC_OUTPUT = PORTD
+.equ ILI9341_DC_INPUT = PORTD
+.equ ILI9341_DC_PIN = PORTD4
+
+.equ ILI9341_LED_DDR = DDRD
+.equ ILI9341_LED_OUTPUT = PORTD
+.equ ILI9341_LED_INPUT = PORTD
+.equ ILI9341_LED_PIN = PORTD5
+
; ---------------------------------------------------------------------------
diff --git a/avr/modules/lcd2/ili9341/0BUILD b/avr/modules/lcd2/ili9341/0BUILD
new file mode 100644
index 0000000..febd367
--- /dev/null
+++ b/avr/modules/lcd2/ili9341/0BUILD
@@ -0,0 +1,11 @@
+
+
+
+
+
+ main.asm
+
+
+
+
+
diff --git a/avr/modules/lcd2/ili9341/defs.asm b/avr/modules/lcd2/ili9341/defs.asm
new file mode 100644
index 0000000..63c4903
--- /dev/null
+++ b/avr/modules/lcd2/ili9341/defs.asm
@@ -0,0 +1,38 @@
+
+
+
+#define ILI9341_FRAMERATE_61_HZ 0x1F
+#define ILI9341_FRAMERATE_63_HZ 0x1E
+#define ILI9341_FRAMERATE_65_HZ 0x1D
+#define ILI9341_FRAMERATE_68_HZ 0x1C
+#define ILI9341_FRAMERATE_70_HZ 0x1B
+#define ILI9341_FRAMERATE_73_HZ 0x1A
+#define ILI9341_FRAMERATE_76_HZ 0x19
+#define ILI9341_FRAMERATE_79_HZ 0x18
+#define ILI9341_FRAMERATE_83_HZ 0x17
+#define ILI9341_FRAMERATE_86_HZ 0x16
+#define ILI9341_FRAMERATE_90_HZ 0x15
+#define ILI9341_FRAMERATE_95_HZ 0x14
+#define ILI9341_FRAMERATE_100_HZ 0x13
+#define ILI9341_FRAMERATE_106_HZ 0x12
+#define ILI9341_FRAMERATE_112_HZ 0x11
+#define ILI9341_FRAMERATE_119_HZ 0x10
+
+#define ILI9341_MADCTL_MY 0x80 ; row address order
+#define ILI9341_MADCTL_MX 0x40 ; column address order
+#define ILI9341_MADCTL_MV 0x20 ; row/column exchange
+#define ILI9341_MADCTL_ML 0x10 ; vertical refresh order
+#define ILI9341_MADCTL_RGB 0x00 ; RGB color order
+#define ILI9341_MADCTL_BGR 0x08 ; BGR color order
+#define ILI9341_MADCTL_MH 0x04 ; horizontal refresh order
+
+
+#define ILI9341_CMD_CASET 0x2A
+#define ILI9341_CMD_PASET 0x2B
+#define ILI9341_CMD_RAMWR 0x2C
+#define ILI9341_CMD_RAMRD 0x2E
+
+#define ILI9341_CMD_COLORSET 0x2d
+#define ILI9341_CMD_SETDSPBRIGHTNESS 0x51
+#define ILI9341_CMD_WRITECTLDISPLAY 0x53
+
diff --git a/avr/modules/lcd2/ili9341/main.asm b/avr/modules/lcd2/ili9341/main.asm
new file mode 100644
index 0000000..d086b2c
--- /dev/null
+++ b/avr/modules/lcd2/ili9341/main.asm
@@ -0,0 +1,629 @@
+; ***************************************************************************
+; copyright : (C) 2025 by Martin Preuss
+; email : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome". *
+; * Please see toplevel file COPYING of that project for license details. *
+; ***************************************************************************
+
+
+; ***************************************************************************
+; defines
+
+#if 0
+.equ ILI9341_SPIMODE = (0<
+
+
+
+
+ main.asm
+
+
+
+
+
diff --git a/avr/modules/lcd2/xpt2046/main.asm b/avr/modules/lcd2/xpt2046/main.asm
new file mode 100644
index 0000000..4e899e5
--- /dev/null
+++ b/avr/modules/lcd2/xpt2046/main.asm
@@ -0,0 +1,11 @@
+; ***************************************************************************
+; copyright : (C) 2025 by Martin Preuss
+; email : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome". *
+; * Please see toplevel file COPYING of that project for license details. *
+; ***************************************************************************
+
+
+
diff --git a/avr/modules/spi_hw/0BUILD b/avr/modules/spi_hw/0BUILD
new file mode 100644
index 0000000..febd367
--- /dev/null
+++ b/avr/modules/spi_hw/0BUILD
@@ -0,0 +1,11 @@
+
+
+
+
+
+ main.asm
+
+
+
+
+
diff --git a/avr/modules/spi_hw/main.asm b/avr/modules/spi_hw/main.asm
new file mode 100644
index 0000000..ea6fd7b
--- /dev/null
+++ b/avr/modules/spi_hw/main.asm
@@ -0,0 +1,202 @@
+; ***************************************************************************
+; copyright : (C) 2025 by Martin Preuss
+; email : martin@libchipcard.de
+;
+; ***************************************************************************
+; * This file is part of the project "AqHome". *
+; * Please see toplevel file COPYING of that project for license details. *
+; ***************************************************************************
+
+
+; ***************************************************************************
+; defines
+
+.equ SPIHW_MODE_SPEED0_BIT = 0 ; 00=CLK/4, 01=CLK/16
+.equ SPIHW_MODE_SPEED1_BIT = 1 ; 10=CLK/64, 11=CLK/128
+.equ SPIHW_MODE_DOUBLESPEED_BIT = 2 ; 1=double speed from SPIHW_MODE_SPEED0/1_BIT
+.equ SPIHW_MODE_DATAORDER_BIT = 3 ; 1=LSB first, 0=MSB first
+.equ SPIHW_MODE_CPOL_BIT = 4 ; 0=leading edge rising/trailing edge falling
+.equ SPIHW_MODE_CPHA_BIT = 5 ; 0=sample on leading edge, setup on trailing edge
+
+
+
+; ***************************************************************************
+; data
+
+.dseg
+
+
+
+; ***************************************************************************
+; code
+
+.cseg
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_Init @global
+;
+
+SPIHW_Init:
+ sbi SPIHW_SS0_DDR, SPIHW_SS0_PIN ; SS0= output
+ sbi SPIHW_SS1_DDR, SPIHW_SS1_PIN ; SS1= output
+ sbi SPIHW_SS2_DDR, SPIHW_SS2_PIN ; SS2= output
+ sec
+ ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_Fini @global
+;
+
+SPIHW_Fini:
+ ret
+; @end
+
+
+
+; ---------------------------------------------------------------------------
+; @routine SPIHW_MasterStart @global
+;
+; Start SPI hardware master with the given mode (see @ref SPIHW_MODE_SPEED0_BIT
+; and others).
+
+; @param r16 mode
+; @param r17 device num (0-7)
+; @clobbers r17
+
+SPIHW_MasterStart:
+ ; setup pins
+ sbi SPIHW_SS_DDR, SPIHW_SS_PIN ; SS : output
+ sbi SPIHW_MOSI_DDR, SPIHW_MOSI_PIN ; MOSI: output
+ cbi SPIHW_MISO_DDR, SPIHW_MISO_PIN ; MISO: input
+ sbi SPIHW_SCK_DDR, SPIHW_SCK_PIN ; SCK: output
+
+ ; select device
+ sbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN ; SS high
+ rcall spiHwSelectDevice ; (none)
+; cbi SPIHW_SS_OUTPUT, SPIHW_SS_PIN ; SS low
+
+ ; setup SPCR
+ clr r17
+ sbrc r16, SPIHW_MODE_DATAORDER_BIT
+ sbr r17, (1<