From c02f3713507d64026a64577629e93d5c6a1df79d Mon Sep 17 00:00:00 2001 From: Martin Preuss Date: Wed, 4 Sep 2024 23:17:46 +0200 Subject: [PATCH] avr: started creating subdirs for every node. --- avr/0BUILD | 1 + avr/devices/0BUILD | 10 + avr/devices/n12/.gitignore | 2 + avr/devices/n12/0BUILD | 52 ++++ avr/devices/n12/n12_boot.asm | 158 ++++++++++++ avr/devices/n12/n12_defs.asm | 13 + avr/devices/n12/n12_main.asm | 486 +++++++++++++++++++++++++++++++++++ 7 files changed, 722 insertions(+) create mode 100644 avr/devices/0BUILD create mode 100644 avr/devices/n12/.gitignore create mode 100644 avr/devices/n12/0BUILD create mode 100644 avr/devices/n12/n12_boot.asm create mode 100644 avr/devices/n12/n12_defs.asm create mode 100644 avr/devices/n12/n12_main.asm diff --git a/avr/0BUILD b/avr/0BUILD index defbe7b..86149aa 100644 --- a/avr/0BUILD +++ b/avr/0BUILD @@ -60,6 +60,7 @@ common include modules + devices diff --git a/avr/devices/0BUILD b/avr/devices/0BUILD new file mode 100644 index 0000000..4c4f364 --- /dev/null +++ b/avr/devices/0BUILD @@ -0,0 +1,10 @@ + + + + + + n12 + + + + diff --git a/avr/devices/n12/.gitignore b/avr/devices/n12/.gitignore new file mode 100644 index 0000000..8e0618c --- /dev/null +++ b/avr/devices/n12/.gitignore @@ -0,0 +1,2 @@ +*.eep.hex +*.obj diff --git a/avr/devices/n12/0BUILD b/avr/devices/n12/0BUILD new file mode 100644 index 0000000..038d3d6 --- /dev/null +++ b/avr/devices/n12/0BUILD @@ -0,0 +1,52 @@ + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + n12_main.asm + + + + + + + + + + + -I $(builddir) + -I $(srcdir) + -I $(topsrcdir)/avr + -I $(topbuilddir)/avr + + + + + n12_boot.asm + + + + + + + + + + + n12_defs.asm + + + + + + diff --git a/avr/devices/n12/n12_boot.asm b/avr/devices/n12/n12_boot.asm new file mode 100644 index 0000000..bb1428e --- /dev/null +++ b/avr/devices/n12/n12_boot.asm @@ -0,0 +1,158 @@ +; *************************************************************************** +; Source file for base system node on AtTiny 84 +; +; This is for the maintenance system (i.e. the flash loader). +; +; All definitions and changes should go into this file. +; +; +; AtTiny84 +; -------- +; VCC 1 14 GND +; PB0 2 13 PA0 +; PB1 3 12 PA1 COM-DATA +; /RESET PB3 4 11 PA2 +; KEY1 PB2 5 10 PA3 LED +; COM_ATTN PA7 6 9 PA4 +; PA6 7 8 PA5 +; -------- +; +; *************************************************************************** + + + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "n12_defs.asm" +.include "defs.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.equ clock=1000000 ; Define the clock frequency + + +.include "common/utils_wait.asm" +.include "modules/com2/defs.asm" +.include "modules/comproto/defs.asm" + + + +; --------------------------------------------------------------------------- +; firmware settings + +#define FW_TYPE AQHOME_FW_TYPE_ATT84_BASE +#define FW_VERSION 0x0001 + + +#define BASE_SYSTEM +#define WITH_FLASH + + + +; --------------------------------------------------------------------------- +; COM module + +.equ COM_BIT_LENGTH = 52000 ; 104000=9600, 52000=19200, 26000=38400 + +.equ COM_DDR_DATA = DDRA +.equ COM_PORT_DATA = PORTA +.equ COM_PIN_DATA = PINA +.equ COM_PINNUM_DATA = PORTA1 + +.equ COM_DDR_ATTN = DDRA +.equ COM_PORT_ATTN = PORTA +.equ COM_PIN_ATTN = PINA +.equ COM_PINNUM_ATTN = PORTA7 + +.equ COM_IRQ_ADDR_ATTN = PCMSK0 +.equ COM_IRQ_BIT_ATTN = 7 ; bit 7 in PCMSK0 +.equ COM_IRQ_GIFR_ATTN = PCIF0 +.equ COM_IRQ_GIMSK_ATTN = PCIE0 + + +.equ LED_DDR = DDRA +.equ LED_PORT = PORTA +.equ LED_PIN = PINA +.equ LED_PINNUM = PORTA3 + + +; *************************************************************************** +; code segment + +.cseg +.org 0x0000 + + + +; --------------------------------------------------------------------------- +; Reset and interrupt vectors +; rjmp start ; Reset vector + rjmp main ; Reset vector + reti ; EXT_INT0 + reti ; PCI0 + reti ; PCI1 + reti ; WATCHDOG + reti ; ICP1 + reti ; OC1A + reti ; OC1B + reti ; OVF1 + reti ; OC0A + reti ; OC0B + reti ; OVF0 + reti ; ACI + reti ; ADCC + reti ; ERDY + reti ; USI_STR + reti ; USI_OVF + + +firmwareType: .dw FW_TYPE +firmwareVersion: .dw FW_VERSION +firmwareModules: .dw 0 +firmwareStart: rjmp main ; will be overwritten when flashing + + + +; *************************************************************************** +; main code + + +.org BOOTLOADER_ADDR + + +main: + rjmp bootLoader ; this routine is in modules/flash/proto.asm + + + + +; *************************************************************************** +; includes + +.include "modules/com2/lowlevel.asm" +.include "modules/com2/crc.asm" +.include "modules/com2/packets.asm" +.include "common/crc8.asm" +.include "common/utils_wait_fixed.asm" +.include "modules/flash/bootloader.asm" +.include "modules/flash/flash.asm" +.include "modules/flash/recv.asm" +.include "modules/flash/send.asm" +.include "modules/flash/wait.asm" +.include "modules/flash/hdl_flash_start.asm" +.include "modules/flash/hdl_flash_data.asm" +.include "modules/flash/hdl_flash_end.asm" +.include "modules/flash/flash_rsp.asm" +.include "modules/flash/flash_ready.asm" + + + + diff --git a/avr/devices/n12/n12_defs.asm b/avr/devices/n12/n12_defs.asm new file mode 100644 index 0000000..7404c12 --- /dev/null +++ b/avr/devices/n12/n12_defs.asm @@ -0,0 +1,13 @@ +; *************************************************************************** +; copyright : (C) 2023 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + + +.equ BOOTLOADER_ADDR = 0xd00 + diff --git a/avr/devices/n12/n12_main.asm b/avr/devices/n12/n12_main.asm new file mode 100644 index 0000000..1e6047d --- /dev/null +++ b/avr/devices/n12/n12_main.asm @@ -0,0 +1,486 @@ +; *************************************************************************** +; copyright : (C) 2023 by Martin Preuss +; email : martin@libchipcard.de +; +; *************************************************************************** +; * This file is part of the project "AqHome". * +; * Please see toplevel file COPYING of that project for license details. * +; *************************************************************************** + + + + +; *************************************************************************** +; Source file for temperature sensor node on AtTiny 84 +; +; This is for the full system (i.e. not the boot loader). +; +; All definitions and changes should go into this file. +; +; +; AtTiny84 +; -------- +; VCC 1 14 GND +; PB0 2 13 PA0 REED_OUT +; PB1 3 12 PA1 COM-DATA +; /RESET PB3 4 11 PA2 REED_IN1 +; [KEY1] PB2 5 10 PA3 LED +; COM_ATTN PA7 6 9 PA4 TWI-SCL +; TWI-SDA PA6 7 8 PA5 REED_IN2 +; -------- +; +; *************************************************************************** + + + +.nolist +.include "include/tn84def.inc" ; Define device ATtiny84 +.list + +.include "n12_defs.asm" +.include "defs.asm" + + + +; *************************************************************************** +; defines + +; --------------------------------------------------------------------------- +; generic + +.equ clock=1000000 ; Define the clock frequency + +.include "common/utils_wait.asm" + + +; --------------------------------------------------------------------------- +; firmware settings including list of modules used + +#define FW_TYPE AQHOME_FW_TYPE_ATT84_TEMP1 +#define FW_VERSION 0x0001 + + +#define MODULES_TIMER +#define MODULES_COM +#define MODULES_COM_WITH_ADDR_PROTO +#define MODULES_LED +#define MODULES_TWI_MASTER +;#define MODULES_LCD +#define MODULES_SI7021 +#define MODULES_STATS +;#define MODULES_CNY70 +#define MODULES_REED + + +.set MODULES_MASK = 0 +#ifdef MODULES_TIMER +.set MODULES_MASK = MODULES_MASK | (1<