avr: introduced network module

this will be the base module for network modules.
This commit is contained in:
Martin Preuss
2025-02-13 01:12:29 +01:00
parent c5ab06b6d0
commit bf61be029e
16 changed files with 501 additions and 838 deletions

View File

@@ -13,11 +13,11 @@
; @macro M_UART_HW_Uart_Init
;
; @param %0 UART number ("0" for UART0)
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
; @param Y pointer to interface data in SRAM
; @clobbers R16, R17, X
.macro M_UART_HW_Uart_Init
rcall UART_HW_InterfaceInit
rcall NET_Interface_Init
; set baudrate
.if clock == 8000000
@@ -75,7 +75,7 @@
; @macro M_UART_HW_Uart_StartTx
;
; @param %0 UART number ("0" for UART0)
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
; @param Y pointer to interface data in SRAM
; @clobbers R16
.macro M_UART_HW_Uart_StartTx
@@ -94,7 +94,7 @@
; @macro M_UART_HW_Uart_StopTx
;
; @param %0 UART number ("0" for UART0)
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_STATE)
; @param Y pointer to interface data in SRAM
; @clobbers R16
.macro M_UART_HW_Uart_StopTx
@@ -112,7 +112,7 @@
; Flush receiption buffer.
;
; @param %0 UART number ("0" for UART0)
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @param Y pointer to interface data in SRAM
; @clobbers R16
.macro M_UART_HW_Uart_Flush
@@ -122,7 +122,7 @@ l_loop_%:
rjmp l_end_%
lds r16, UDR@0
clr r16
std Y+UART_HW_IFACE_OFFS_READTIMER, r16
std Y+NET_IFACE_OFFS_READTIMER, r16
rjmp l_loop_%
l_end_%:
.endmacro
@@ -134,7 +134,7 @@ l_end_%:
; @macro M_UART_HW_Uart_RxCharIsr
;
; @param %0 UART number ("0" for UART0)
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @param Y pointer to interface data in SRAM
; @clobbers R16 (R17, R18, X)
.macro M_UART_HW_Uart_RxCharIsr
@@ -142,7 +142,7 @@ l_end_%:
lds r16, UCSR@0A ; check for errors
andi r16, (1<<FE@0) | (1<<DOR@0) | (1<<UPE@0)
breq l_recv_% ; no error, receive next char
ldd r16, Y+UART_HW_IFACE_OFFS_STATUS ; set error status
ldd r16, Y+NET_IFACE_OFFS_STATUS ; set error status
ori r16, (1<<UART_HW_STATUS_HWERR_BIT) ; -> HWERR
rjmp l_setStatusAndEnd_%
l_recv_%:
@@ -153,13 +153,13 @@ l_recv_%:
rcall UART_HW_InterfaceWriteToReadBuffer ; (R17, R18, X)
brcc l_overrun_%
clr r16
std Y+UART_HW_IFACE_OFFS_READTIMER, r16 ; reset read timer
std Y+NET_IFACE_OFFS_READTIMER, r16 ; reset read timer
rjmp l_end_%
l_overrun_%:
ldd r16, Y+UART_HW_IFACE_OFFS_STATUS ; set overrun error
ldd r16, Y+NET_IFACE_OFFS_STATUS ; set overrun error
ori r16, (1<<UART_HW_STATUS_OVERRUN_BIT) ; -> OVERRUN
l_setStatusAndEnd_%:
std Y+UART_HW_IFACE_OFFS_STATUS, r16
std Y+NET_IFACE_OFFS_STATUS, r16
l_end_%:
#endif
.endmacro
@@ -173,7 +173,7 @@ l_end_%:
; Handler for UDREn interrupt called when TX data register is empty.
;
; @param %0 UART number ("0" for UART0)
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @param Y pointer to interface data in SRAM
; @clobbers R16, R17, X
.macro M_UART_HW_Uart_TxUdreIsr
@@ -197,18 +197,18 @@ l_end_%:
breq l_disable_irq_% ; nothing left to write
; get read ptr, read byte, inc read ptr, store ptr and bytesLeft
ldd xl, Y+UART_HW_IFACE_OFFS_WRITEBUFPOSLOW
ldd xh, Y+UART_HW_IFACE_OFFS_WRITEBUFPOSHIGH
ldd xl, Y+UART_HW_IFACE_OFFS_WRITEBUFPOS_LOW
ldd xh, Y+UART_HW_IFACE_OFFS_WRITEBUFPOS_HIGH
ld r16, X+ ; r16=byte to write
std Y+UART_HW_IFACE_OFFS_WRITEBUFPOSLOW, xl
std Y+UART_HW_IFACE_OFFS_WRITEBUFPOSHIGH, xh
std Y+UART_HW_IFACE_OFFS_WRITEBUFPOS_LOW, xl
std Y+UART_HW_IFACE_OFFS_WRITEBUFPOS_HIGH, xh
dec r17
std Y+UART_HW_IFACE_OFFS_WRITEBUFLEFT, r17
; send byte, reset write timer
sts UDR@0, r16
clr r16
std Y+UART_HW_IFACE_OFFS_WRITETIMER, r16 ; reset write timer
std Y+NET_IFACE_OFFS_WRITETIMER, r16 ; reset write timer
; still bytes left to write?
tst r17
@@ -234,7 +234,7 @@ l_end_%:
; the data register is empty.
;
; @param %0 UART number ("0" for UART0)
; @param Y pointer to interface data in SRAM (see @ref UART_HW_IFACE_OFFS_MODE)
; @param Y pointer to interface data in SRAM
; @clobbers R16
.macro M_UART_HW_Uart_TxCharIsr