martin/aqhomecontrol
Public Access
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

avr: introduced network module

Browse Source 
this will be the base module for network modules.
This commit is contained in:
Martin Preuss
2025-02-13 01:12:29 +01:00
parent c5ab06b6d0
commit bf61be029e
16 changed files with 501 additions and 838 deletions
Download Patch File Download Diff File Expand all files Collapse all files

76
avr/modules/uart_hw/defs.asm
View File

@@ -8,58 +8,46 @@
; ***************************************************************************
.equ UART_HW_IFACE_READBUF_SIZE = 8
.equ UART_HW_IFACE_WRITEBUF_SIZE = 8
.equ UART_HW_IFACE_OUTMSGBUF_SIZE = 4
.equ UART_HW_BUFFER_INUSE_BIT = 7
.equ UART_HW_BUFFER_IFACENUM1_BIT = 1
.equ UART_HW_BUFFER_IFACENUM0_BIT = 0
.equ UART_HW_BUFFER_INUSE_BIT = 7
.equ UART_HW_BUFFER_IFACENUM1_BIT = 1
.equ UART_HW_BUFFER_IFACENUM0_BIT = 0
.equ UART_HW_READMODE_OFF = 0
.equ UART_HW_READMODE_IDLE = 1
.equ UART_HW_READMODE_READING = 2
.equ UART_HW_READMODE_SKIPPING = 3
.equ UART_HW_READMODE_OFF = 0
.equ UART_HW_READMODE_IDLE = 1
.equ UART_HW_READMODE_READING = 2
.equ UART_HW_READMODE_SKIPPING = 3
.equ UART_HW_WRITEMODE_OFF = 0
.equ UART_HW_WRITEMODE_IDLE = 1
.equ UART_HW_WRITEMODE_WRITING = 2
.equ UART_HW_WRITEMODE_WAITBUFFEREMPTY = 3
.equ UART_HW_WRITEMODE_WRITEBUFFEREMPTY = 4
.equ UART_HW_WRITEMODE_OFF = 0
.equ UART_HW_WRITEMODE_IDLE = 1
.equ UART_HW_WRITEMODE_WRITING = 2
.equ UART_HW_WRITEMODE_WAITBUFFEREMPTY = 3
.equ UART_HW_WRITEMODE_WRITEBUFFEREMPTY = 4
.equ UART_HW_STATUS_UNDERRUN_BIT = 0
.equ UART_HW_STATUS_OVERRUN_BIT = 1
.equ UART_HW_STATUS_HWERR_BIT = 2
.equ UART_HW_STATUS_SOFTERR_BIT = 3
.equ UART_HW_STATUS_ATTN_BIT = 7
.equ UART_HW_STATUS_UNDERRUN_BIT = 0
.equ UART_HW_STATUS_OVERRUN_BIT = 1
.equ UART_HW_STATUS_HWERR_BIT = 2
.equ UART_HW_STATUS_SOFTERR_BIT = 3
.equ UART_HW_STATUS_ATTN_BIT = 7
.equ UART_HW_IFACE_OFFS_IFACENUM = 0 ; interface number (put into received messages)
.equ UART_HW_IFACE_OFFS_STATUS = 1
.equ UART_HW_IFACE_OFFS_READTIMER = 2
.equ UART_HW_IFACE_OFFS_WRITETIMER = 3
.equ UART_HW_IFACE_OFFS_ERR_OVRLOW = 4
.equ UART_HW_IFACE_OFFS_ERR_OVRHIGH = 5
.equ UART_HW_IFACE_OFFS_ERR_CONTENTLOW = 6
.equ UART_HW_IFACE_OFFS_ERR_CONTENTHIGH = 7
.equ UART_HW_IFACE_OFFS_READ = NET_IFACE_SIZE
.equ UART_HW_IFACE_OFFS_READMODE = UART_HW_IFACE_OFFS_READ
.equ UART_HW_IFACE_OFFS_READBUFNUM = UART_HW_IFACE_OFFS_READ+1
.equ UART_HW_IFACE_OFFS_READBUFPOS_LOW = UART_HW_IFACE_OFFS_READ+2
.equ UART_HW_IFACE_OFFS_READBUFPOS_HIGH = UART_HW_IFACE_OFFS_READ+3
.equ UART_HW_IFACE_OFFS_READBUFUSED = UART_HW_IFACE_OFFS_READ+4
.equ UART_HW_IFACE_OFFS_READBUFLEFT = UART_HW_IFACE_OFFS_READ+5
.equ UART_HW_IFACE_OFFS_READMODE = 8
.equ UART_HW_IFACE_OFFS_READBUFNUM = 9
.equ UART_HW_IFACE_OFFS_READBUFPOSLOW = 10
.equ UART_HW_IFACE_OFFS_READBUFPOSHIGH = 11
.equ UART_HW_IFACE_OFFS_READBUFUSED = 12
.equ UART_HW_IFACE_OFFS_READBUFLEFT = 13
.equ UART_HW_IFACE_OFFS_WRITE = UART_HW_IFACE_OFFS_READBUFLEFT+1
.equ UART_HW_IFACE_OFFS_WRITEMODE = UART_HW_IFACE_OFFS_WRITE
.equ UART_HW_IFACE_OFFS_WRITEBUFNUM = UART_HW_IFACE_OFFS_WRITE+1
.equ UART_HW_IFACE_OFFS_WRITEBUFPOS_LOW = UART_HW_IFACE_OFFS_WRITE+2
.equ UART_HW_IFACE_OFFS_WRITEBUFPOS_HIGH = UART_HW_IFACE_OFFS_WRITE+3
.equ UART_HW_IFACE_OFFS_WRITEBUFUSED = UART_HW_IFACE_OFFS_WRITE+4
.equ UART_HW_IFACE_OFFS_WRITEBUFLEFT = UART_HW_IFACE_OFFS_WRITE+5
.equ UART_HW_IFACE_OFFS_WRITEMODE = 14
.equ UART_HW_IFACE_OFFS_WRITEBUFNUM = 15
.equ UART_HW_IFACE_OFFS_WRITEBUFPOSLOW = 16
.equ UART_HW_IFACE_OFFS_WRITEBUFPOSHIGH = 17
.equ UART_HW_IFACE_OFFS_WRITEBUFUSED = 18
.equ UART_HW_IFACE_OFFS_WRITEBUFLEFT = 19
.equ UART_HW_IFACE_OFFS_WRITEMSGRINGBUF = 20
.equ UART_HW_IFACE_SIZE = UART_HW_IFACE_OFFS_WRITEMSGRINGBUF+RINGBUFFERY_SIZE+UART_HW_IFACE_OUTMSGBUF_SIZE
.equ UART_HW_IFACE_SIZE = UART_HW_IFACE_OFFS_WRITEBUFLEFT+1